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[aaelf64-morello] Drop pointless GD/IE-to-LE relaxation
These LE "relaxations" do not change the instruction sequence at all compared with IE, they just change where the 16 bytes are stored, moving them from the GOT to somewhere in a read-only data section. This doesn't achieve anything and just complicates linker implementations to do, when instead they can just do nothing and let the existing implementation recognise that the GOT entries are constants. Thus, remove these relaxations, and note that there is no need for a dynamic relocation in the case where you would normally relax to LE.
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aaelf64-morello/aaelf64-morello.rst

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@@ -1057,7 +1057,7 @@ and offset of the TLS variable is stored in a GOT slot (first 8 bytes contains t
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offset and the second 8 bytes the size). This GOT slot is initialized by a
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``R_MORELLO_TPREL128`` dynamic relocation. The access must use the
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``R_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20`` and ``R_MORELLO_TLSIE_ADD_LO12``
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relocations in order to allow relaxation to Local Exec. There are no other
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relocations. There are no other
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requirements on how this is performed or the registers used. A possible
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instruction sequence could be:
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@@ -1073,37 +1073,13 @@ instruction sequence could be:
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Initial Exec to Local Exec relaxation
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The linker will generate 16 bytes in a read-only section, containing
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the offset in the static TLS block in the first 8 bytes and the size of the
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symbol in the next 8 bytes:
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.. code-block:: text
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.section .rodata
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_sym_data:
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.xword tlsoffset(sym)
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.xword sizeof(sym)
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.. note::
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``tlsoffset(sym)`` denotes the offset in the static TLS block of the symbol
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``sym``, while sizeof(sym) denotes the size of the symbol ``sym``. These are
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not valid assembler directives.
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The relaxation is performed by:
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- changing the ``R_MORELLO_TLSIE_ADR_GOTTPREL_PAGE20`` relocation on the symbol
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``sym`` to a ``R_MORELLO_ADR_PREL_PG_HI20`` with the symbol ``_sym_data``
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- changing the ``R_MORELLO_TLSIE_ADD_LO12`` relocation on symbol the ``sym`` to
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a ``R_AARCH64_ADD_ABS_LO12_NC`` relocation with the symbol ``_sym_data``.
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No such relaxation is specified.
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.. note::
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The symbol and section names in the example above are only used for explanation
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purposes. An implementation does not need to create an additional symbol when
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performing this relaxation. There is no constraint on the name of the read-only
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section where the data is placed.
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Both the offset in the TLS block and the size of ``S`` are known by the
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static linker and can be emitted as constants with no associated
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``R_MORELLO_TPREL128`` relocation.
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General Dynamic
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^^^^^^^^^^^^^^^
@@ -1144,29 +1120,11 @@ The relaxed sequence is:
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General Dynamic to Local Exec relaxation
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The linker will generate 16 bytes in a read-only section, containing
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the offset in the static TLS block in the first 8 bytes and the size of the
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symbol in the next 8 bytes:
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.. code-block:: text
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.section .rodata
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_sym_data:
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.xword tlsoffset(sym)
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.xword sizeof(sym)
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No such relaxation is specified; the static linker should instead relax to
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Initial Exec.
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.. note::
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``tlsoffset(sym)`` denotes the offset in the static TLS block of the symbol
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``sym``, while sizeof(sym) denotes the size of the symbol ``sym``. These are
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not valid assembler directives.
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The relaxed sequence is:
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.. code-block:: text
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adrp c0, _sym_data
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add c0, c0, :lo12:_sym_data
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ldp x0, x1, [c0]
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add c0, c2, x0
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scbnds c0, c0, x1
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Both the offset in the TLS block and the size of ``S`` are known by the
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static linker and can be emitted as constants with no associated
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``R_MORELLO_TPREL128`` relocation.

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