Update src/coreclr/vm/ceeload.cpp

simonferquel · jkotas · simonferquel · commit fca0bae80504 · 2025-04-04T17:10:23.000+02:00
Co-authored-by: Jan Kotas &lt;jkotas@microsoft.com&gt;
diff --git a/src/coreclr/vm/ceeload.cpp b/src/coreclr/vm/ceeload.cpp
@@ -492,10 +492,12 @@ void Module::Initialize(AllocMemTracker *pamTracker, LPCWSTR szName)
 
 #ifdef PROFILING_SUPPORTED
     // set profiler related JIT flags
-    if (CORProfilerDisableInlining()){
+    if (CORProfilerDisableInlining())
+    {
         m_dwTransientFlags |= PROF_DISABLE_INLINING;
     }
-    if (CORProfilerDisableOptimizations()){
+    if (CORProfilerDisableOptimizations())
+    {
         m_dwTransientFlags |= PROF_DISABLE_OPTIMIZATIONS;
     }
 

Original file line number	Diff line number	Diff line change
`@@ -492,10 +492,12 @@ void Module::Initialize(AllocMemTracker *pamTracker, LPCWSTR szName)`
`492`	`492`
`493`	`493`	`#ifdef PROFILING_SUPPORTED`
`494`	`494`	`// set profiler related JIT flags`
`495`		`- if (CORProfilerDisableInlining()){`
	`495`	`+ if (CORProfilerDisableInlining())`
	`496`	`+ {`
`496`	`497`	`m_dwTransientFlags \|= PROF_DISABLE_INLINING;`
`497`	`498`	`}`
`498`		`- if (CORProfilerDisableOptimizations()){`
	`499`	`+ if (CORProfilerDisableOptimizations())`
	`500`	`+ {`
`499`	`501`	`m_dwTransientFlags \|= PROF_DISABLE_OPTIMIZATIONS;`
`500`	`502`	`}`
`501`	`503`