@@ -3271,116 +3271,119 @@ Expression* TranslateToFuzzReader::makeBinary(Type type) {
32713271 }
32723272 case Type::v128: {
32733273 assert (wasm.features .hasSIMD ());
3274- return buildBinary ({pick (EqVecI8x16,
3275- NeVecI8x16,
3276- LtSVecI8x16,
3277- LtUVecI8x16,
3278- GtSVecI8x16,
3279- GtUVecI8x16,
3280- LeSVecI8x16,
3281- LeUVecI8x16,
3282- GeSVecI8x16,
3283- GeUVecI8x16,
3284- EqVecI16x8,
3285- NeVecI16x8,
3286- LtSVecI16x8,
3287- LtUVecI16x8,
3288- GtSVecI16x8,
3289- GtUVecI16x8,
3290- LeSVecI16x8,
3291- LeUVecI16x8,
3292- GeSVecI16x8,
3293- GeUVecI16x8,
3294- EqVecI32x4,
3295- NeVecI32x4,
3296- LtSVecI32x4,
3297- LtUVecI32x4,
3298- GtSVecI32x4,
3299- GtUVecI32x4,
3300- LeSVecI32x4,
3301- LeUVecI32x4,
3302- GeSVecI32x4,
3303- GeUVecI32x4,
3304- EqVecF16x8,
3305- EqVecF16x8,
3306- NeVecF16x8,
3307- LtVecF16x8,
3308- GtVecF16x8,
3309- LeVecF16x8,
3310- GeVecF16x8,
3311- EqVecF32x4,
3312- NeVecF32x4,
3313- LtVecF32x4,
3314- GtVecF32x4,
3315- LeVecF32x4,
3316- GeVecF32x4,
3317- EqVecF64x2,
3318- NeVecF64x2,
3319- LtVecF64x2,
3320- GtVecF64x2,
3321- LeVecF64x2,
3322- GeVecF64x2,
3323- AndVec128,
3324- OrVec128,
3325- XorVec128,
3326- AndNotVec128,
3327- AddVecI8x16,
3328- AddSatSVecI8x16,
3329- AddSatUVecI8x16,
3330- SubVecI8x16,
3331- SubSatSVecI8x16,
3332- SubSatUVecI8x16,
3333- MinSVecI8x16,
3334- MinUVecI8x16,
3335- MaxSVecI8x16,
3336- MaxUVecI8x16,
3337- // TODO: avgr_u
3338- // TODO: q15mulr_sat_s
3339- // TODO: extmul
3340- AddVecI16x8,
3341- AddSatSVecI16x8,
3342- AddSatUVecI16x8,
3343- SubVecI16x8,
3344- SubSatSVecI16x8,
3345- SubSatUVecI16x8,
3346- MulVecI16x8,
3347- MinSVecI16x8,
3348- MinUVecI16x8,
3349- MaxSVecI16x8,
3350- MaxUVecI16x8,
3351- AddVecI32x4,
3352- SubVecI32x4,
3353- MulVecI32x4,
3354- MinSVecI32x4,
3355- MinUVecI32x4,
3356- MaxSVecI32x4,
3357- MaxUVecI32x4,
3358- DotSVecI16x8ToVecI32x4,
3359- AddVecI64x2,
3360- SubVecI64x2,
3361- AddVecF16x8,
3362- SubVecF16x8,
3363- MulVecF16x8,
3364- DivVecF16x8,
3365- MinVecF16x8,
3366- MaxVecF16x8,
3367- AddVecF32x4,
3368- SubVecF32x4,
3369- MulVecF32x4,
3370- DivVecF32x4,
3371- MinVecF32x4,
3372- MaxVecF32x4,
3373- AddVecF64x2,
3374- SubVecF64x2,
3375- MulVecF64x2,
3376- DivVecF64x2,
3377- MinVecF64x2,
3378- MaxVecF64x2,
3379- NarrowSVecI16x8ToVecI8x16,
3380- NarrowUVecI16x8ToVecI8x16,
3381- NarrowSVecI32x4ToVecI16x8,
3382- NarrowUVecI32x4ToVecI16x8,
3383- SwizzleVecI8x16),
3274+ return buildBinary ({pick (FeatureOptions<BinaryOp>()
3275+ .add (FeatureSet::SIMD,
3276+ EqVecI8x16,
3277+ NeVecI8x16,
3278+ LtSVecI8x16,
3279+ LtUVecI8x16,
3280+ GtSVecI8x16,
3281+ GtUVecI8x16,
3282+ LeSVecI8x16,
3283+ LeUVecI8x16,
3284+ GeSVecI8x16,
3285+ GeUVecI8x16,
3286+ EqVecI16x8,
3287+ NeVecI16x8,
3288+ LtSVecI16x8,
3289+ LtUVecI16x8,
3290+ GtSVecI16x8,
3291+ GtUVecI16x8,
3292+ LeSVecI16x8,
3293+ LeUVecI16x8,
3294+ GeSVecI16x8,
3295+ GeUVecI16x8,
3296+ EqVecI32x4,
3297+ NeVecI32x4,
3298+ LtSVecI32x4,
3299+ LtUVecI32x4,
3300+ GtSVecI32x4,
3301+ GtUVecI32x4,
3302+ LeSVecI32x4,
3303+ LeUVecI32x4,
3304+ GeSVecI32x4,
3305+ GeUVecI32x4,
3306+ EqVecF32x4,
3307+ NeVecF32x4,
3308+ LtVecF32x4,
3309+ GtVecF32x4,
3310+ LeVecF32x4,
3311+ GeVecF32x4,
3312+ EqVecF64x2,
3313+ NeVecF64x2,
3314+ LtVecF64x2,
3315+ GtVecF64x2,
3316+ LeVecF64x2,
3317+ GeVecF64x2,
3318+ AndVec128,
3319+ OrVec128,
3320+ XorVec128,
3321+ AndNotVec128,
3322+ AddVecI8x16,
3323+ AddSatSVecI8x16,
3324+ AddSatUVecI8x16,
3325+ SubVecI8x16,
3326+ SubSatSVecI8x16,
3327+ SubSatUVecI8x16,
3328+ MinSVecI8x16,
3329+ MinUVecI8x16,
3330+ MaxSVecI8x16,
3331+ MaxUVecI8x16,
3332+ // TODO: avgr_u
3333+ // TODO: q15mulr_sat_s
3334+ // TODO: extmul
3335+ AddVecI16x8,
3336+ AddSatSVecI16x8,
3337+ AddSatUVecI16x8,
3338+ SubVecI16x8,
3339+ SubSatSVecI16x8,
3340+ SubSatUVecI16x8,
3341+ MulVecI16x8,
3342+ MinSVecI16x8,
3343+ MinUVecI16x8,
3344+ MaxSVecI16x8,
3345+ MaxUVecI16x8,
3346+ AddVecI32x4,
3347+ SubVecI32x4,
3348+ MulVecI32x4,
3349+ MinSVecI32x4,
3350+ MinUVecI32x4,
3351+ MaxSVecI32x4,
3352+ MaxUVecI32x4,
3353+ DotSVecI16x8ToVecI32x4,
3354+ AddVecI64x2,
3355+ SubVecI64x2,
3356+ AddVecF32x4,
3357+ SubVecF32x4,
3358+ MulVecF32x4,
3359+ DivVecF32x4,
3360+ MinVecF32x4,
3361+ MaxVecF32x4,
3362+ AddVecF64x2,
3363+ SubVecF64x2,
3364+ MulVecF64x2,
3365+ DivVecF64x2,
3366+ MinVecF64x2,
3367+ MaxVecF64x2,
3368+ NarrowSVecI16x8ToVecI8x16,
3369+ NarrowUVecI16x8ToVecI8x16,
3370+ NarrowSVecI32x4ToVecI16x8,
3371+ NarrowUVecI32x4ToVecI16x8,
3372+ SwizzleVecI8x16)
3373+ .add (FeatureSet::FP16,
3374+ EqVecF16x8,
3375+ EqVecF16x8,
3376+ NeVecF16x8,
3377+ LtVecF16x8,
3378+ GtVecF16x8,
3379+ LeVecF16x8,
3380+ GeVecF16x8,
3381+ AddVecF16x8,
3382+ SubVecF16x8,
3383+ MulVecF16x8,
3384+ DivVecF16x8,
3385+ MinVecF16x8,
3386+ MaxVecF16x8)),
33843387 make (Type::v128),
33853388 make (Type::v128)});
33863389 }
@@ -3586,7 +3589,9 @@ Expression* TranslateToFuzzReader::makeSIMDExtract(Type type) {
35863589 op = ExtractLaneVecI64x2;
35873590 break ;
35883591 case Type::f32 :
3589- op = ExtractLaneVecF32x4;
3592+ op = pick (FeatureOptions<SIMDExtractOp>()
3593+ .add (FeatureSet::SIMD, ExtractLaneVecF32x4)
3594+ .add (FeatureSet::FP16, ExtractLaneVecF16x8));
35903595 break ;
35913596 case Type::f64 :
35923597 op = ExtractLaneVecF64x2;
@@ -3621,12 +3626,16 @@ Expression* TranslateToFuzzReader::makeSIMDExtract(Type type) {
36213626}
36223627
36233628Expression* TranslateToFuzzReader::makeSIMDReplace () {
3624- SIMDReplaceOp op = pick (ReplaceLaneVecI8x16,
3625- ReplaceLaneVecI16x8,
3626- ReplaceLaneVecI32x4,
3627- ReplaceLaneVecI64x2,
3628- ReplaceLaneVecF32x4,
3629- ReplaceLaneVecF64x2);
3629+ SIMDReplaceOp op =
3630+ pick (FeatureOptions<SIMDReplaceOp>()
3631+ .add (FeatureSet::SIMD,
3632+ ReplaceLaneVecI8x16,
3633+ ReplaceLaneVecI16x8,
3634+ ReplaceLaneVecI32x4,
3635+ ReplaceLaneVecI64x2,
3636+ ReplaceLaneVecF32x4,
3637+ ReplaceLaneVecF64x2)
3638+ .add (FeatureSet::FeatureSet::FP16, ReplaceLaneVecF16x8));
36303639 Expression* vec = make (Type::v128);
36313640 uint8_t index;
36323641 Type lane_t ;
@@ -3647,6 +3656,10 @@ Expression* TranslateToFuzzReader::makeSIMDReplace() {
36473656 index = upTo (2 );
36483657 lane_t = Type::i64 ;
36493658 break ;
3659+ case ReplaceLaneVecF16x8:
3660+ index = upTo (8 );
3661+ lane_t = Type::f32 ;
3662+ break ;
36503663 case ReplaceLaneVecF32x4:
36513664 index = upTo (4 );
36523665 lane_t = Type::f32 ;
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