This repository was archived by the owner on Dec 22, 2021. It is now read-only.
File tree 3 files changed +19
-0
lines changed 3 files changed +19
-0
lines changed Original file line number Diff line number Diff line change @@ -201,3 +201,5 @@ The `v8x16.shuffle` instruction has 16 bytes after `simdop`.
201
201
| ` i64x2.load32x2_s ` | ` 0xd6 ` | m: memarg |
202
202
| ` i64x2.load32x2_u ` | ` 0xd7 ` | m: memarg |
203
203
| ` v128.andnot ` | ` 0xd8 ` | - |
204
+ | ` i8x16.avgr_u ` | ` 0xd9 ` | |
205
+ | ` i16x8.avgr_u ` | ` 0xda ` | |
Original file line number Diff line number Diff line change 91
91
| ` i8x16.min_u ` | ` -munimplemented-simd128 ` | :heavy_check_mark : | | |
92
92
| ` i8x16.max_s ` | ` -munimplemented-simd128 ` | :heavy_check_mark : | | |
93
93
| ` i8x16.max_u ` | ` -munimplemented-simd128 ` | :heavy_check_mark : | | |
94
+ | ` i8x16.avgr_u ` | | | | |
94
95
| ` i16x8.neg ` | ` -msimd128 ` | :heavy_check_mark : | :heavy_check_mark : | :heavy_check_mark : |
95
96
| ` i16x8.any_true ` | ` -msimd128 ` | :heavy_check_mark : | :heavy_check_mark : | :heavy_check_mark : |
96
97
| ` i16x8.all_true ` | ` -msimd128 ` | :heavy_check_mark : | :heavy_check_mark : | :heavy_check_mark : |
108
109
| ` i16x8.min_u ` | ` -munimplemented-simd128 ` | :heavy_check_mark : | | |
109
110
| ` i16x8.max_s ` | ` -munimplemented-simd128 ` | :heavy_check_mark : | | |
110
111
| ` i16x8.max_u ` | ` -munimplemented-simd128 ` | :heavy_check_mark : | | |
112
+ | ` i16x8.avgr_u ` | | | | |
111
113
| ` i32x4.neg ` | ` -msimd128 ` | :heavy_check_mark : | :heavy_check_mark : | :heavy_check_mark : |
112
114
| ` i32x4.any_true ` | ` -msimd128 ` | :heavy_check_mark : | :heavy_check_mark : | :heavy_check_mark : |
113
115
| ` i32x4.all_true ` | ` -msimd128 ` | :heavy_check_mark : | :heavy_check_mark : | :heavy_check_mark : |
Original file line number Diff line number Diff line change @@ -488,6 +488,21 @@ each pair.
488
488
def S.max(a, b):
489
489
return S.lanewise_binary(max , a, b)
490
490
```
491
+
492
+ ### Lane-wise integer rounding average
493
+ * ` i8x16.avgr_u(a: v128, b: v128) -> v128 `
494
+ * ` i16x8.avgr_u(a: v128, b: v128) -> v128 `
495
+
496
+ Lane-wise rounding average:
497
+
498
+ ``` python
499
+ def S.RoundingAverage(x, y):
500
+ return (x + y + 1 ) // 2
501
+
502
+ def S.avgr_u(a, b):
503
+ return S.lanewise_binary(S.RoundingAverage, S.AsUnsigned(a), S.AsUnsigned(b))
504
+ ```
505
+
491
506
## Bit shifts
492
507
493
508
### Left shift by scalar
You can’t perform that action at this time.
0 commit comments