Skip to content

Commit b56bc36

Browse files
authored
Merge pull request #1 from tkroo/lolin-s3-mini
Board files for LOLIN S3 MINI
2 parents cab9e36 + 437d8d7 commit b56bc36

File tree

5 files changed

+268
-0
lines changed

5 files changed

+268
-0
lines changed
Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,31 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
#include "supervisor/board.h"
28+
#include "mpconfigboard.h"
29+
#include "shared-bindings/microcontroller/Pin.h"
30+
31+
// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,44 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2019 Scott Shawcroft for Adafruit Industries
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
// Micropython setup
28+
29+
#define MICROPY_HW_BOARD_NAME "LOLIN S3 MINI 4MB Flash 2MB PSRAM"
30+
#define MICROPY_HW_MCU_NAME "ESP32S3"
31+
32+
#define MICROPY_HW_NEOPIXEL (&pin_GPIO47)
33+
34+
// #define MICROPY_HW_LED_STATUS (&pin_GPIO13)
35+
36+
#define DEFAULT_I2C_BUS_SCL (&pin_GPIO36)
37+
#define DEFAULT_I2C_BUS_SDA (&pin_GPIO35)
38+
39+
#define DEFAULT_SPI_BUS_SCK (&pin_GPIO12)
40+
#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO11)
41+
#define DEFAULT_SPI_BUS_MISO (&pin_GPIO13)
42+
43+
#define DEFAULT_UART_BUS_RX (&pin_GPIO44)
44+
#define DEFAULT_UART_BUS_TX (&pin_GPIO43)
Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,16 @@
1+
USB_VID = 0x303a
2+
USB_PID = 0x8168
3+
USB_PRODUCT = "LOLIN S3 MINI 4MB Flash 2MB PSRAM"
4+
USB_MANUFACTURER = "WEMOS"
5+
6+
IDF_TARGET = esp32s3
7+
8+
CIRCUITPY_ESP_FLASH_MODE = qio
9+
CIRCUITPY_ESP_FLASH_FREQ = 80m
10+
CIRCUITPY_ESP_FLASH_SIZE = 4MB
11+
12+
OPTIMIZATION_FLAGS = -Os
13+
CIRCUITPY_ESPCAMERA = 0
14+
15+
# Include these Python libraries in firmware.
16+
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
Lines changed: 129 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,129 @@
1+
#include "shared-bindings/board/__init__.h"
2+
3+
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
4+
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
5+
6+
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) },
7+
{ MP_ROM_QSTR(MP_QSTR_BOOT0), MP_ROM_PTR(&pin_GPIO0) },
8+
{ MP_ROM_QSTR(MP_QSTR_IO0), MP_ROM_PTR(&pin_GPIO0) },
9+
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO0) },
10+
11+
{ MP_ROM_QSTR(MP_QSTR_IO1), MP_ROM_PTR(&pin_GPIO1) },
12+
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO1) },
13+
{ MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) },
14+
15+
{ MP_ROM_QSTR(MP_QSTR_IO2), MP_ROM_PTR(&pin_GPIO2) },
16+
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO2) },
17+
{ MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO2) },
18+
19+
{ MP_ROM_QSTR(MP_QSTR_IO3), MP_ROM_PTR(&pin_GPIO3) },
20+
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO3) },
21+
{ MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO3) },
22+
23+
{ MP_ROM_QSTR(MP_QSTR_IO4), MP_ROM_PTR(&pin_GPIO4) },
24+
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO4) },
25+
{ MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) },
26+
27+
{ MP_ROM_QSTR(MP_QSTR_IO5), MP_ROM_PTR(&pin_GPIO5) },
28+
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO5) },
29+
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) },
30+
31+
{ MP_ROM_QSTR(MP_QSTR_IO6), MP_ROM_PTR(&pin_GPIO6) },
32+
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO6) },
33+
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) },
34+
35+
{ MP_ROM_QSTR(MP_QSTR_IO7), MP_ROM_PTR(&pin_GPIO7) },
36+
{ MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO7) },
37+
{ MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO7) },
38+
39+
40+
{ MP_ROM_QSTR(MP_QSTR_IO8), MP_ROM_PTR(&pin_GPIO8) },
41+
{ MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO8) },
42+
{ MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO8) },
43+
44+
{ MP_ROM_QSTR(MP_QSTR_IO9), MP_ROM_PTR(&pin_GPIO9) },
45+
{ MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO9) },
46+
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) },
47+
48+
{ MP_ROM_QSTR(MP_QSTR_IO10), MP_ROM_PTR(&pin_GPIO10) },
49+
{ MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO10) },
50+
{ MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) },
51+
52+
{ MP_ROM_QSTR(MP_QSTR_IO11), MP_ROM_PTR(&pin_GPIO11) },
53+
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO11) },
54+
{ MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO11) },
55+
{ MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) },
56+
57+
58+
{ MP_ROM_QSTR(MP_QSTR_IO12), MP_ROM_PTR(&pin_GPIO12) },
59+
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO12) },
60+
{ MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO12) },
61+
{ MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) },
62+
63+
{ MP_ROM_QSTR(MP_QSTR_IO13), MP_ROM_PTR(&pin_GPIO13) },
64+
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO13) },
65+
{ MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO13) },
66+
{ MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) },
67+
68+
{ MP_ROM_QSTR(MP_QSTR_IO14), MP_ROM_PTR(&pin_GPIO14) },
69+
{ MP_ROM_QSTR(MP_QSTR_A13), MP_ROM_PTR(&pin_GPIO14) },
70+
{ MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) },
71+
72+
{ MP_ROM_QSTR(MP_QSTR_IO15), MP_ROM_PTR(&pin_GPIO15) },
73+
{ MP_ROM_QSTR(MP_QSTR_A14), MP_ROM_PTR(&pin_GPIO15) },
74+
{ MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) },
75+
76+
{ MP_ROM_QSTR(MP_QSTR_IO16), MP_ROM_PTR(&pin_GPIO16) },
77+
{ MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_GPIO16) },
78+
{ MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO16) },
79+
80+
{ MP_ROM_QSTR(MP_QSTR_IO17), MP_ROM_PTR(&pin_GPIO17) },
81+
{ MP_ROM_QSTR(MP_QSTR_A16), MP_ROM_PTR(&pin_GPIO17) },
82+
{ MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO17) },
83+
84+
{ MP_ROM_QSTR(MP_QSTR_IO18), MP_ROM_PTR(&pin_GPIO18) },
85+
{ MP_ROM_QSTR(MP_QSTR_A17), MP_ROM_PTR(&pin_GPIO18) },
86+
{ MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO18) },
87+
88+
{ MP_ROM_QSTR(MP_QSTR_IO21), MP_ROM_PTR(&pin_GPIO21) },
89+
{ MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO21) },
90+
91+
{ MP_ROM_QSTR(MP_QSTR_IO33), MP_ROM_PTR(&pin_GPIO33) },
92+
{ MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO33) },
93+
94+
{ MP_ROM_QSTR(MP_QSTR_IO34), MP_ROM_PTR(&pin_GPIO34) },
95+
{ MP_ROM_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO34) },
96+
97+
{ MP_ROM_QSTR(MP_QSTR_IO37), MP_ROM_PTR(&pin_GPIO37) },
98+
{ MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO37) },
99+
100+
{ MP_ROM_QSTR(MP_QSTR_IO38), MP_ROM_PTR(&pin_GPIO38) },
101+
{ MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO38) },
102+
103+
{ MP_ROM_QSTR(MP_QSTR_IO47), MP_ROM_PTR(&pin_GPIO47) },
104+
{ MP_ROM_QSTR(MP_QSTR_D47), MP_ROM_PTR(&pin_GPIO47) },
105+
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO47) },
106+
107+
108+
{ MP_ROM_QSTR(MP_QSTR_IO35), MP_ROM_PTR(&pin_GPIO35) },
109+
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO35) },
110+
{ MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO35) },
111+
112+
{ MP_ROM_QSTR(MP_QSTR_IO36), MP_ROM_PTR(&pin_GPIO36) },
113+
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO36) },
114+
{ MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO36) },
115+
116+
117+
{ MP_ROM_QSTR(MP_QSTR_IO43), MP_ROM_PTR(&pin_GPIO43) },
118+
{ MP_ROM_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_GPIO43) },
119+
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) },
120+
121+
{ MP_ROM_QSTR(MP_QSTR_IO44), MP_ROM_PTR(&pin_GPIO44) },
122+
{ MP_ROM_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_GPIO44) },
123+
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) },
124+
125+
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
126+
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
127+
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }
128+
};
129+
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
#
2+
# Component config
3+
#
4+
#
5+
# ESP32S3-Specific
6+
#
7+
CONFIG_ESP32S3_SPIRAM_SUPPORT=y
8+
#
9+
# SPI RAM config
10+
#
11+
# CONFIG_SPIRAM_MODE_QUAD=y
12+
# CONFIG_SPIRAM_MODE_OCT is not set
13+
CONFIG_SPIRAM_TYPE_AUTO=y
14+
# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set
15+
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
16+
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
17+
CONFIG_SPIRAM_SIZE=2097152
18+
#
19+
# PSRAM Clock and CS IO for ESP32S3
20+
#
21+
CONFIG_DEFAULT_PSRAM_CLK_IO=30
22+
CONFIG_DEFAULT_PSRAM_CS_IO=26
23+
# end of PSRAM Clock and CS IO for ESP32S3
24+
25+
# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set
26+
# CONFIG_SPIRAM_RODATA is not set
27+
# CONFIG_SPIRAM_SPEED_120M is not set
28+
# CONFIG_SPIRAM_SPEED_40M=y
29+
# CONFIG_SPIRAM_SPEED_40M is not set
30+
CONFIG_SPIRAM=y
31+
CONFIG_SPIRAM_BOOT_INIT=y
32+
# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set
33+
CONFIG_SPIRAM_USE_MEMMAP=y
34+
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
35+
# CONFIG_SPIRAM_USE_MALLOC is not set
36+
CONFIG_SPIRAM_MEMTEST=y
37+
# CONFIG_SPIRAM_MODE_OCT=y
38+
# end of SPI RAM config
39+
40+
# end of ESP32S3-Specific
41+
42+
#
43+
# LWIP
44+
#
45+
CONFIG_LWIP_LOCAL_HOSTNAME="LOLIN-S3-MINI"
46+
# end of LWIP
47+
48+
# end of Component config

0 commit comments

Comments
 (0)