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iio:dac:ad5686: Add AD5691R/AD5692R/AD5693/AD5693R support
The AD5691R/AD5692R/AD5693/AD5693R are a family of one channel DACs with 12-bit, 14-bit and 16-bit precision respectively. The devices have either no built-in reference, or built-in 2.5V reference. These devices are pretty similar to AD5671R/AD5675R/AD5694/AD5694R/AD5695R/AD5696/AD5696R, except that they have only one channel. Another difference is that they use a write control register(addr 0x04) for setting the power down modes and the internal reference instead of separate registers for each function. Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5693R_5692R_5691R_5693.pdf Signed-off-by: Stefan Popa <[email protected]>
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-6
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3 files changed

+90
-6
lines changed

‎drivers/iio/dac/ad5686.c‎

Lines changed: 68 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,7 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
8282
bool readin;
8383
int ret;
8484
struct ad5686_state *st = iio_priv(indio_dev);
85+
unsigned int val;
8586

8687
ret = strtobool(buf, &readin);
8788
if (ret)
@@ -92,8 +93,14 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
9293
else
9394
st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
9495

95-
ret = ad5686_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
96-
st->pwr_down_mask & st->pwr_down_mode, 0);
96+
if (st->chip_info->regmap_type == AD5693_REGMAP) {
97+
val = ((st->pwr_down_mask & st->pwr_down_mode) << 13) |
98+
(st->use_internal_vref == true ? 0 : (1 << 12));
99+
} else {
100+
val = st->pwr_down_mask & st->pwr_down_mode;
101+
}
102+
103+
ret = ad5686_write(st, AD5686_CMD_POWERDOWN_DAC, 0, val, 0);
97104

98105
return ret ? ret : len;
99106
}
@@ -188,6 +195,11 @@ static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
188195
.ext_info = ad5686_ext_info, \
189196
}
190197

198+
#define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
199+
static struct iio_chan_spec name[] = { \
200+
AD5868_CHANNEL(0, 0, bits, _shift), \
201+
}
202+
191203
#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
192204
static struct iio_chan_spec name[] = { \
193205
AD5868_CHANNEL(0, 1, bits, _shift), \
@@ -213,72 +225,112 @@ DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
213225
DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
214226
DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
215227
DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
228+
DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
229+
DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
230+
DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
216231

217232
static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
218233
[ID_AD5671R] = {
219234
.channels = ad5672_channels,
220235
.int_vref_mv = 2500,
221236
.num_channels = 8,
237+
.regmap_type = AD5686_REGMAP,
222238
},
223239
[ID_AD5672R] = {
224240
.channels = ad5672_channels,
225241
.int_vref_mv = 2500,
226242
.num_channels = 8,
243+
.regmap_type = AD5686_REGMAP,
227244
},
228245
[ID_AD5675R] = {
229246
.channels = ad5676_channels,
230247
.int_vref_mv = 2500,
231248
.num_channels = 8,
249+
.regmap_type = AD5686_REGMAP,
232250
},
233251
[ID_AD5676] = {
234252
.channels = ad5676_channels,
235253
.num_channels = 8,
254+
.regmap_type = AD5686_REGMAP,
236255
},
237256
[ID_AD5676R] = {
238257
.channels = ad5676_channels,
239258
.int_vref_mv = 2500,
240259
.num_channels = 8,
260+
.regmap_type = AD5686_REGMAP,
241261
},
242262
[ID_AD5684] = {
243263
.channels = ad5684_channels,
244264
.num_channels = 4,
265+
.regmap_type = AD5686_REGMAP,
245266
},
246267
[ID_AD5684R] = {
247268
.channels = ad5684_channels,
248269
.int_vref_mv = 2500,
249270
.num_channels = 4,
271+
.regmap_type = AD5686_REGMAP,
250272
},
251273
[ID_AD5685R] = {
252274
.channels = ad5685r_channels,
253275
.int_vref_mv = 2500,
254276
.num_channels = 4,
277+
.regmap_type = AD5686_REGMAP,
255278
},
256279
[ID_AD5686] = {
257280
.channels = ad5686_channels,
258281
.num_channels = 4,
282+
.regmap_type = AD5686_REGMAP,
259283
},
260284
[ID_AD5686R] = {
261285
.channels = ad5686_channels,
262286
.int_vref_mv = 2500,
263287
.num_channels = 4,
288+
.regmap_type = AD5686_REGMAP,
289+
},
290+
[ID_AD5691R] = {
291+
.channels = ad5691r_channels,
292+
.int_vref_mv = 2500,
293+
.num_channels = 1,
294+
.regmap_type = AD5693_REGMAP,
295+
},
296+
[ID_AD5692R] = {
297+
.channels = ad5692r_channels,
298+
.int_vref_mv = 2500,
299+
.num_channels = 1,
300+
.regmap_type = AD5693_REGMAP,
301+
},
302+
[ID_AD5693] = {
303+
.channels = ad5693_channels,
304+
.num_channels = 1,
305+
.regmap_type = AD5693_REGMAP,
306+
},
307+
[ID_AD5693R] = {
308+
.channels = ad5693_channels,
309+
.int_vref_mv = 2500,
310+
.num_channels = 1,
311+
.regmap_type = AD5693_REGMAP,
264312
},
265313
[ID_AD5694] = {
266314
.channels = ad5684_channels,
267315
.num_channels = 4,
316+
.regmap_type = AD5686_REGMAP,
268317
},
269318
[ID_AD5694R] = {
270319
.channels = ad5684_channels,
271320
.int_vref_mv = 2500,
272321
.num_channels = 4,
322+
.regmap_type = AD5686_REGMAP,
273323
},
274324
[ID_AD5696] = {
275325
.channels = ad5686_channels,
276326
.num_channels = 4,
327+
.regmap_type = AD5686_REGMAP,
277328
},
278329
[ID_AD5696R] = {
279330
.channels = ad5686_channels,
280331
.int_vref_mv = 2500,
281332
.num_channels = 4,
333+
.regmap_type = AD5686_REGMAP,
282334
},
283335
};
284336

@@ -287,7 +339,8 @@ int ad5686_probe(struct device *dev, enum ad5686_supported_device_ids chip_type,
287339
{
288340
struct ad5686_state *st;
289341
struct iio_dev *indio_dev;
290-
int ret, voltage_uv = 0;
342+
u8 shift, cmd;
343+
int ret, i, voltage_uv = 0;
291344

292345
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
293346
if (indio_dev == NULL)
@@ -321,7 +374,8 @@ int ad5686_probe(struct device *dev, enum ad5686_supported_device_ids chip_type,
321374
st->vref_mv = st->chip_info->int_vref_mv;
322375

323376
/* Set all the power down mode for all channels to 1K pulldown */
324-
st->pwr_down_mode = 0x55;
377+
for (i = 0; i < st->chip_info->num_channels; i++)
378+
st->pwr_down_mode |= (0x01 << (i * 2));
325379

326380
indio_dev->dev.parent = dev;
327381
indio_dev->name = name;
@@ -330,7 +384,16 @@ int ad5686_probe(struct device *dev, enum ad5686_supported_device_ids chip_type,
330384
indio_dev->channels = st->chip_info->channels;
331385
indio_dev->num_channels = st->chip_info->num_channels;
332386

333-
ret = ad5686_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0, !!voltage_uv, 0);
387+
if (st->chip_info->regmap_type == AD5693_REGMAP) {
388+
st->use_internal_vref = !voltage_uv;
389+
cmd = AD5686_CMD_CONTROL_REG;
390+
shift = 12;
391+
} else {
392+
cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
393+
shift = 0;
394+
}
395+
396+
ret = ad5686_write(st, cmd, 0, !!voltage_uv, shift);
334397
if (ret)
335398
goto error_disable_reg;
336399

‎drivers/iio/dac/ad5686.h‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,8 @@
2828
#define AD5686_LDAC_PWRDN_100K 0x2
2929
#define AD5686_LDAC_PWRDN_3STATE 0x3
3030

31+
#define AD5686_CMD_CONTROL_REG 0x4
32+
3133
/**
3234
* ad5686_supported_device_ids:
3335
*/
@@ -42,13 +44,22 @@ enum ad5686_supported_device_ids {
4244
ID_AD5685R,
4345
ID_AD5686,
4446
ID_AD5686R,
47+
ID_AD5691R,
48+
ID_AD5692R,
49+
ID_AD5693,
50+
ID_AD5693R,
4551
ID_AD5694,
4652
ID_AD5694R,
4753
ID_AD5695R,
4854
ID_AD5696,
4955
ID_AD5696R,
5056
};
5157

58+
enum ad5686_regmap_type {
59+
AD5686_REGMAP,
60+
AD5693_REGMAP
61+
};
62+
5263
struct ad5686_state;
5364

5465
typedef int (*ad5686_write_func)(struct ad5686_state *st,
@@ -61,12 +72,14 @@ typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
6172
* @int_vref_mv: AD5620/40/60: the internal reference voltage
6273
* @num_channels: number of channels
6374
* @channel: channel specification
75+
* @regmap_type: register map layout variant
6476
*/
6577

6678
struct ad5686_chip_info {
6779
u16 int_vref_mv;
6880
unsigned int num_channels;
6981
struct iio_chan_spec *channels;
82+
enum ad5686_regmap_type regmap_type;
7083
};
7184

7285
/**
@@ -77,6 +90,8 @@ struct ad5686_chip_info {
7790
* @vref_mv: actual reference voltage used
7891
* @pwr_down_mask: power down mask
7992
* @pwr_down_mode: current power down mode
93+
* @use_internal_vref: set to true if the internal reference voltage should be
94+
* used.
8095
* @data: spi transfer buffers
8196
*/
8297

@@ -89,6 +104,7 @@ struct ad5686_state {
89104
unsigned pwr_down_mode;
90105
ad5686_write_func write;
91106
ad5686_read_func read;
107+
bool use_internal_vref;
92108

93109
/*
94110
* DMA (thus cache coherency maintenance) requires the

‎drivers/iio/dac/ad5696-i2c.c‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
/*
2-
* AD5671R, AD5675R, AD5694, AD5694R, AD5695R, AD5696, AD5696R
2+
* AD5671R, AD5675R, AD5691R, AD5692R, AD5693, AD5693R,
3+
* AD5694, AD5694R, AD5695R, AD5696, AD5696R
34
* Digital to analog converters driver
45
*
56
* Copyright 2018 Analog Devices Inc.
@@ -72,6 +73,10 @@ static int ad5686_i2c_remove(struct i2c_client *i2c)
7273
static const struct i2c_device_id ad5686_i2c_id[] = {
7374
{"ad5671r", ID_AD5671R},
7475
{"ad5675r", ID_AD5675R},
76+
{"ad5691r", ID_AD5691R},
77+
{"ad5692r", ID_AD5692R},
78+
{"ad5693", ID_AD5693},
79+
{"ad5693r", ID_AD5693R},
7580
{"ad5694", ID_AD5694},
7681
{"ad5694r", ID_AD5694R},
7782
{"ad5695r", ID_AD5695R},

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