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iio:dac:ad5686: Add AD5691R/AD5692R/AD5693/AD5693R support
The AD5691R/AD5692R/AD5693/AD5693R are a family of one channel DACs with 12-bit, 14-bit and 16-bit precision respectively. The devices have either no built-in reference, or built-in 2.5V reference. These devices are pretty similar to AD5671R/AD5675R and AD5694/AD5694R/AD5695R/AD5696/AD5696R, except that they have one channel. Another difference is that they use a write control register(addr 0x04) for setting the power down modes and the internal reference instead of separate registers for each function. Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5693R_5692R_5691R_5693.pdf Signed-off-by: Stefan Popa <[email protected]>
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‎drivers/iio/dac/ad5686.c‎

Lines changed: 83 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -82,6 +82,8 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
8282
bool readin;
8383
int ret;
8484
struct ad5686_state *st = iio_priv(indio_dev);
85+
unsigned int val, ref_bit_msk;
86+
u8 shift;
8587

8688
ret = strtobool(buf, &readin);
8789
if (ret)
@@ -92,8 +94,22 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
9294
else
9395
st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
9496

95-
ret = ad5686_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
96-
st->pwr_down_mask & st->pwr_down_mode, 0);
97+
switch (st->chip_info->regmap_type) {
98+
case AD5686_REGMAP:
99+
shift = 0;
100+
ref_bit_msk = 0;
101+
break;
102+
case AD5693_REGMAP:
103+
shift = 13;
104+
ref_bit_msk = AD5693_REF_BIT_MSK;
105+
break;
106+
}
107+
108+
val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
109+
if (!st->use_internal_vref)
110+
val |= ref_bit_msk;
111+
112+
ret = ad5686_write(st, AD5686_CMD_POWERDOWN_DAC, 0, val, 0);
97113

98114
return ret ? ret : len;
99115
}
@@ -188,6 +204,11 @@ static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
188204
.ext_info = ad5686_ext_info, \
189205
}
190206

207+
#define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
208+
static struct iio_chan_spec name[] = { \
209+
AD5868_CHANNEL(0, 0, bits, _shift), \
210+
}
211+
191212
#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
192213
static struct iio_chan_spec name[] = { \
193214
AD5868_CHANNEL(0, 1, bits, _shift), \
@@ -213,72 +234,112 @@ DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
213234
DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
214235
DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
215236
DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
237+
DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
238+
DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
239+
DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
216240

217241
static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
218242
[ID_AD5671R] = {
219243
.channels = ad5672_channels,
220244
.int_vref_mv = 2500,
221245
.num_channels = 8,
246+
.regmap_type = AD5686_REGMAP,
222247
},
223248
[ID_AD5672R] = {
224249
.channels = ad5672_channels,
225250
.int_vref_mv = 2500,
226251
.num_channels = 8,
252+
.regmap_type = AD5686_REGMAP,
227253
},
228254
[ID_AD5675R] = {
229255
.channels = ad5676_channels,
230256
.int_vref_mv = 2500,
231257
.num_channels = 8,
258+
.regmap_type = AD5686_REGMAP,
232259
},
233260
[ID_AD5676] = {
234261
.channels = ad5676_channels,
235262
.num_channels = 8,
263+
.regmap_type = AD5686_REGMAP,
236264
},
237265
[ID_AD5676R] = {
238266
.channels = ad5676_channels,
239267
.int_vref_mv = 2500,
240268
.num_channels = 8,
269+
.regmap_type = AD5686_REGMAP,
241270
},
242271
[ID_AD5684] = {
243272
.channels = ad5684_channels,
244273
.num_channels = 4,
274+
.regmap_type = AD5686_REGMAP,
245275
},
246276
[ID_AD5684R] = {
247277
.channels = ad5684_channels,
248278
.int_vref_mv = 2500,
249279
.num_channels = 4,
280+
.regmap_type = AD5686_REGMAP,
250281
},
251282
[ID_AD5685R] = {
252283
.channels = ad5685r_channels,
253284
.int_vref_mv = 2500,
254285
.num_channels = 4,
286+
.regmap_type = AD5686_REGMAP,
255287
},
256288
[ID_AD5686] = {
257289
.channels = ad5686_channels,
258290
.num_channels = 4,
291+
.regmap_type = AD5686_REGMAP,
259292
},
260293
[ID_AD5686R] = {
261294
.channels = ad5686_channels,
262295
.int_vref_mv = 2500,
263296
.num_channels = 4,
297+
.regmap_type = AD5686_REGMAP,
298+
},
299+
[ID_AD5691R] = {
300+
.channels = ad5691r_channels,
301+
.int_vref_mv = 2500,
302+
.num_channels = 1,
303+
.regmap_type = AD5693_REGMAP,
304+
},
305+
[ID_AD5692R] = {
306+
.channels = ad5692r_channels,
307+
.int_vref_mv = 2500,
308+
.num_channels = 1,
309+
.regmap_type = AD5693_REGMAP,
310+
},
311+
[ID_AD5693] = {
312+
.channels = ad5693_channels,
313+
.num_channels = 1,
314+
.regmap_type = AD5693_REGMAP,
315+
},
316+
[ID_AD5693R] = {
317+
.channels = ad5693_channels,
318+
.int_vref_mv = 2500,
319+
.num_channels = 1,
320+
.regmap_type = AD5693_REGMAP,
264321
},
265322
[ID_AD5694] = {
266323
.channels = ad5684_channels,
267324
.num_channels = 4,
325+
.regmap_type = AD5686_REGMAP,
268326
},
269327
[ID_AD5694R] = {
270328
.channels = ad5684_channels,
271329
.int_vref_mv = 2500,
272330
.num_channels = 4,
331+
.regmap_type = AD5686_REGMAP,
273332
},
274333
[ID_AD5696] = {
275334
.channels = ad5686_channels,
276335
.num_channels = 4,
336+
.regmap_type = AD5686_REGMAP,
277337
},
278338
[ID_AD5696R] = {
279339
.channels = ad5686_channels,
280340
.int_vref_mv = 2500,
281341
.num_channels = 4,
342+
.regmap_type = AD5686_REGMAP,
282343
},
283344
};
284345

@@ -287,7 +348,9 @@ int ad5686_probe(struct device *dev, enum ad5686_supported_device_ids chip_type,
287348
{
288349
struct ad5686_state *st;
289350
struct iio_dev *indio_dev;
290-
int ret, voltage_uv = 0;
351+
u8 cmd;
352+
unsigned int val, ref_bit_msk;
353+
int ret, i, voltage_uv = 0;
291354

292355
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
293356
if (indio_dev == NULL)
@@ -321,7 +384,8 @@ int ad5686_probe(struct device *dev, enum ad5686_supported_device_ids chip_type,
321384
st->vref_mv = st->chip_info->int_vref_mv;
322385

323386
/* Set all the power down mode for all channels to 1K pulldown */
324-
st->pwr_down_mode = 0x55;
387+
for (i = 0; i < st->chip_info->num_channels; i++)
388+
st->pwr_down_mode |= (0x01 << (i * 2));
325389

326390
indio_dev->dev.parent = dev;
327391
indio_dev->name = name;
@@ -330,7 +394,21 @@ int ad5686_probe(struct device *dev, enum ad5686_supported_device_ids chip_type,
330394
indio_dev->channels = st->chip_info->channels;
331395
indio_dev->num_channels = st->chip_info->num_channels;
332396

333-
ret = ad5686_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0, !!voltage_uv, 0);
397+
switch (st->chip_info->regmap_type) {
398+
case AD5686_REGMAP:
399+
cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
400+
ref_bit_msk = 0;
401+
break;
402+
case AD5693_REGMAP:
403+
cmd = AD5686_CMD_CONTROL_REG;
404+
ref_bit_msk = AD5693_REF_BIT_MSK;
405+
st->use_internal_vref = !voltage_uv;
406+
break;
407+
}
408+
409+
val = (voltage_uv | ref_bit_msk);
410+
411+
ret = ad5686_write(st, cmd, 0, !!val, 0);
334412
if (ret)
335413
goto error_disable_reg;
336414

‎drivers/iio/dac/ad5686.h‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,9 @@
2828
#define AD5686_LDAC_PWRDN_100K 0x2
2929
#define AD5686_LDAC_PWRDN_3STATE 0x3
3030

31+
#define AD5686_CMD_CONTROL_REG 0x4
32+
#define AD5693_REF_BIT_MSK BIT(12)
33+
3134
/**
3235
* ad5686_supported_device_ids:
3336
*/
@@ -42,13 +45,22 @@ enum ad5686_supported_device_ids {
4245
ID_AD5685R,
4346
ID_AD5686,
4447
ID_AD5686R,
48+
ID_AD5691R,
49+
ID_AD5692R,
50+
ID_AD5693,
51+
ID_AD5693R,
4552
ID_AD5694,
4653
ID_AD5694R,
4754
ID_AD5695R,
4855
ID_AD5696,
4956
ID_AD5696R,
5057
};
5158

59+
enum ad5686_regmap_type {
60+
AD5686_REGMAP,
61+
AD5693_REGMAP
62+
};
63+
5264
struct ad5686_state;
5365

5466
typedef int (*ad5686_write_func)(struct ad5686_state *st,
@@ -61,12 +73,14 @@ typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
6173
* @int_vref_mv: AD5620/40/60: the internal reference voltage
6274
* @num_channels: number of channels
6375
* @channel: channel specification
76+
* @regmap_type: register map layout variant
6477
*/
6578

6679
struct ad5686_chip_info {
6780
u16 int_vref_mv;
6881
unsigned int num_channels;
6982
struct iio_chan_spec *channels;
83+
enum ad5686_regmap_type regmap_type;
7084
};
7185

7286
/**
@@ -77,6 +91,7 @@ struct ad5686_chip_info {
7791
* @vref_mv: actual reference voltage used
7892
* @pwr_down_mask: power down mask
7993
* @pwr_down_mode: current power down mode
94+
* @use_internal_vref: set to true if the internal reference voltage is used
8095
* @data: spi transfer buffers
8196
*/
8297

@@ -89,6 +104,7 @@ struct ad5686_state {
89104
unsigned pwr_down_mode;
90105
ad5686_write_func write;
91106
ad5686_read_func read;
107+
bool use_internal_vref;
92108

93109
/*
94110
* DMA (thus cache coherency maintenance) requires the

‎drivers/iio/dac/ad5696-i2c.c‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
/*
2-
* AD5671R, AD5675R, AD5694, AD5694R, AD5695R, AD5696, AD5696R
2+
* AD5671R, AD5675R, AD5691R, AD5692R, AD5693, AD5693R,
3+
* AD5694, AD5694R, AD5695R, AD5696, AD5696R
34
* Digital to analog converters driver
45
*
56
* Copyright 2018 Analog Devices Inc.
@@ -72,6 +73,10 @@ static int ad5686_i2c_remove(struct i2c_client *i2c)
7273
static const struct i2c_device_id ad5686_i2c_id[] = {
7374
{"ad5671r", ID_AD5671R},
7475
{"ad5675r", ID_AD5675R},
76+
{"ad5691r", ID_AD5691R},
77+
{"ad5692r", ID_AD5692R},
78+
{"ad5693", ID_AD5693},
79+
{"ad5693r", ID_AD5693R},
7580
{"ad5694", ID_AD5694},
7681
{"ad5694r", ID_AD5694R},
7782
{"ad5695r", ID_AD5695R},

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