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Automerge: Revert "DAG: Preserve range metadata when load is narrowed" (#128948)
Reverts llvm/llvm-project#128144 Breaks clang prod x64 build (seen in Fuchsia toolchain)
2 parents 1fd1e23 + 0212834 commit 09d1d4f

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-79
lines changed

2 files changed

+14
-79
lines changed

‎llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 6 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -14903,29 +14903,12 @@ SDValue DAGCombiner::reduceLoadWidth(SDNode *N) {
1490314903
AddToWorklist(NewPtr.getNode());
1490414904

1490514905
SDValue Load;
14906-
if (ExtType == ISD::NON_EXTLOAD) {
14907-
const MDNode *OldRanges = LN0->getRanges();
14908-
const MDNode *NewRanges = nullptr;
14909-
// If LSBs are loaded and the truncated ConstantRange for the OldRanges
14910-
// metadata is not the full-set for the NewWidth then create a NewRanges
14911-
// metadata for the truncated load
14912-
if (ShAmt == 0 && OldRanges) {
14913-
ConstantRange CR = getConstantRangeFromMetadata(*OldRanges);
14914-
ConstantRange TruncatedCR = CR.truncate(VT.getScalarSizeInBits());
14915-
14916-
if (!TruncatedCR.isFullSet()) {
14917-
Metadata *Bounds[2] = {ConstantAsMetadata::get(ConstantInt::get(
14918-
*DAG.getContext(), TruncatedCR.getLower())),
14919-
ConstantAsMetadata::get(ConstantInt::get(
14920-
*DAG.getContext(), TruncatedCR.getUpper()))};
14921-
NewRanges = MDNode::get(*DAG.getContext(), Bounds);
14922-
}
14923-
}
14924-
Load = DAG.getLoad(
14925-
VT, DL, LN0->getChain(), NewPtr,
14926-
LN0->getPointerInfo().getWithOffset(PtrOff), LN0->getOriginalAlign(),
14927-
LN0->getMemOperand()->getFlags(), LN0->getAAInfo(), NewRanges);
14928-
} else
14906+
if (ExtType == ISD::NON_EXTLOAD)
14907+
Load = DAG.getLoad(VT, DL, LN0->getChain(), NewPtr,
14908+
LN0->getPointerInfo().getWithOffset(PtrOff),
14909+
LN0->getOriginalAlign(),
14910+
LN0->getMemOperand()->getFlags(), LN0->getAAInfo());
14911+
else
1492914912
Load = DAG.getExtLoad(ExtType, DL, VT, LN0->getChain(), NewPtr,
1493014913
LN0->getPointerInfo().getWithOffset(PtrOff), ExtVT,
1493114914
LN0->getOriginalAlign(),

‎llvm/test/CodeGen/AMDGPU/shl64_reduce.ll

Lines changed: 8 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -13,66 +13,23 @@
1313
; Test range with metadata
1414
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
1515

16+
; FIXME: This case should be reduced, but SelectionDAG::computeKnownBits() cannot
17+
; determine the minimum from metadata in this case. Match current results
18+
; for now.
19+
1620
define i64 @shl_metadata(i64 %arg0, ptr %arg1.ptr) {
1721
; CHECK-LABEL: shl_metadata:
1822
; CHECK: ; %bb.0:
1923
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
20-
; CHECK-NEXT: flat_load_dword v1, v[2:3]
21-
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
22-
; CHECK-NEXT: v_lshlrev_b32_e32 v1, v1, v0
23-
; CHECK-NEXT: v_mov_b32_e32 v0, 0
24-
; CHECK-NEXT: s_setpc_b64 s[30:31]
25-
%shift.amt = load i64, ptr %arg1.ptr, !range !0, !noundef !{}
26-
%shl = shl i64 %arg0, %shift.amt
27-
ret i64 %shl
28-
}
29-
30-
define i64 @shl_metadata_two_ranges(i64 %arg0, ptr %arg1.ptr) {
31-
; CHECK-LABEL: shl_metadata_two_ranges:
32-
; CHECK: ; %bb.0:
33-
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
34-
; CHECK-NEXT: flat_load_dword v1, v[2:3]
35-
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
36-
; CHECK-NEXT: v_lshlrev_b32_e32 v1, v1, v0
37-
; CHECK-NEXT: v_mov_b32_e32 v0, 0
38-
; CHECK-NEXT: s_setpc_b64 s[30:31]
39-
%shift.amt = load i64, ptr %arg1.ptr, !range !1, !noundef !{}
40-
%shl = shl i64 %arg0, %shift.amt
41-
ret i64 %shl
42-
}
43-
44-
; Known minimum is too low. Reduction must not be done.
45-
define i64 @shl_metadata_out_of_range(i64 %arg0, ptr %arg1.ptr) {
46-
; CHECK-LABEL: shl_metadata_out_of_range:
47-
; CHECK: ; %bb.0:
48-
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
49-
; CHECK-NEXT: flat_load_dword v2, v[2:3]
50-
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
51-
; CHECK-NEXT: v_lshlrev_b64 v[0:1], v2, v[0:1]
52-
; CHECK-NEXT: s_setpc_b64 s[30:31]
53-
%shift.amt = load i64, ptr %arg1.ptr, !range !2, !noundef !{}
54-
%shl = shl i64 %arg0, %shift.amt
55-
ret i64 %shl
56-
}
57-
58-
; Bounds cannot be truncated to i32 when load is narrowed to i32.
59-
; Reduction must not be done.
60-
; Bounds were chosen so that if bounds were truncated to i32 the
61-
; known minimum would be 32 and the shl would be erroneously reduced.
62-
define i64 @shl_metadata_cant_be_narrowed_to_i32(i64 %arg0, ptr %arg1.ptr) {
63-
; CHECK-LABEL: shl_metadata_cant_be_narrowed_to_i32:
64-
; CHECK: ; %bb.0:
65-
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6624
; CHECK-NEXT: flat_load_dword v2, v[2:3]
6725
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
6826
; CHECK-NEXT: v_lshlrev_b64 v[0:1], v2, v[0:1]
6927
; CHECK-NEXT: s_setpc_b64 s[30:31]
70-
%shift.amt = load i64, ptr %arg1.ptr, !range !3, !noundef !{}
28+
%shift.amt = load i64, ptr %arg1.ptr, !range !0
7129
%shl = shl i64 %arg0, %shift.amt
7230
ret i64 %shl
7331
}
7432

75-
; FIXME: This case should be reduced
7633
define <2 x i64> @shl_v2_metadata(<2 x i64> %arg0, ptr %arg1.ptr) {
7734
; CHECK-LABEL: shl_v2_metadata:
7835
; CHECK: ; %bb.0:
@@ -82,12 +39,11 @@ define <2 x i64> @shl_v2_metadata(<2 x i64> %arg0, ptr %arg1.ptr) {
8239
; CHECK-NEXT: v_lshlrev_b64 v[0:1], v4, v[0:1]
8340
; CHECK-NEXT: v_lshlrev_b64 v[2:3], v6, v[2:3]
8441
; CHECK-NEXT: s_setpc_b64 s[30:31]
85-
%shift.amt = load <2 x i64>, ptr %arg1.ptr, !range !0, !noundef !{}
42+
%shift.amt = load <2 x i64>, ptr %arg1.ptr, !range !0
8643
%shl = shl <2 x i64> %arg0, %shift.amt
8744
ret <2 x i64> %shl
8845
}
8946

90-
; FIXME: This case should be reduced
9147
define <3 x i64> @shl_v3_metadata(<3 x i64> %arg0, ptr %arg1.ptr) {
9248
; CHECK-LABEL: shl_v3_metadata:
9349
; CHECK: ; %bb.0:
@@ -99,12 +55,11 @@ define <3 x i64> @shl_v3_metadata(<3 x i64> %arg0, ptr %arg1.ptr) {
9955
; CHECK-NEXT: v_lshlrev_b64 v[0:1], v8, v[0:1]
10056
; CHECK-NEXT: v_lshlrev_b64 v[2:3], v10, v[2:3]
10157
; CHECK-NEXT: s_setpc_b64 s[30:31]
102-
%shift.amt = load <3 x i64>, ptr %arg1.ptr, !range !0, !noundef !{}
58+
%shift.amt = load <3 x i64>, ptr %arg1.ptr, !range !0
10359
%shl = shl <3 x i64> %arg0, %shift.amt
10460
ret <3 x i64> %shl
10561
}
10662

107-
; FIXME: This case should be reduced
10863
define <4 x i64> @shl_v4_metadata(<4 x i64> %arg0, ptr %arg1.ptr) {
10964
; CHECK-LABEL: shl_v4_metadata:
11065
; CHECK: ; %bb.0:
@@ -119,15 +74,12 @@ define <4 x i64> @shl_v4_metadata(<4 x i64> %arg0, ptr %arg1.ptr) {
11974
; CHECK-NEXT: v_lshlrev_b64 v[4:5], v13, v[4:5]
12075
; CHECK-NEXT: v_lshlrev_b64 v[6:7], v15, v[6:7]
12176
; CHECK-NEXT: s_setpc_b64 s[30:31]
122-
%shift.amt = load <4 x i64>, ptr %arg1.ptr, !range !0, !noundef !{}
77+
%shift.amt = load <4 x i64>, ptr %arg1.ptr, !range !0
12378
%shl = shl <4 x i64> %arg0, %shift.amt
12479
ret <4 x i64> %shl
12580
}
12681

12782
!0 = !{i64 32, i64 64}
128-
!1 = !{i64 32, i64 38, i64 42, i64 48}
129-
!2 = !{i64 31, i64 38, i64 42, i64 48}
130-
!3 = !{i64 32, i64 38, i64 2147483680, i64 2147483681}
13183

13284
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
13385
; Test range with an "or X, 16"

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