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kseniadobrovolskayaasi-sc
kseniadobrovolskaya
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asi-sc
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[snippy] Small refactoring
1 parent 11a0707 commit 922ec0c

18 files changed

+83
-60
lines changed

‎llvm/test/tools/llvm-snippy/codegen/rvv-no-available-instrs-pvill.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,4 +36,4 @@ histogram:
3636
- [VXOR_VX, 1.0]
3737
- [VZEXT_VF4, 1.0]
3838

39-
# CHECK: We can not create any primary instruction in this context.
39+
# CHECK: error: We can not create any primary instruction in this context.

‎llvm/test/tools/llvm-snippy/codegen/rvv-no-available-instrs.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,4 +25,4 @@ sections:
2525
histogram:
2626
- [VSEXT_VF8, 1.0]
2727

28-
# CHECK: We can not create any primary instruction in this context.
28+
# CHECK: error: We can not create any primary instruction in this context.

‎llvm/test/tools/llvm-snippy/rvv-config-biased/conf-all.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ histogram:
5252
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - VM Selection Rules:
5353
# CHECK-FULL-VLMAX1-DISABLED-NEXT: P: 0.66667 <all_ones>
5454
# CHECK-FULL-VLMAX1-DISABLED-NEXT: P: 0.33333 <any_legal>
55-
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - Configuration Bag Listing:
55+
# CHECK-FULL-VLMAX1-DISABLED: - Configuration Bag Listing:
5656
# CHECK-FULL-VLMAX1-DISABLED-COUNT-704: /MaxVL
5757
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - Configuration Bag Size: 704
5858
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - State Cardinality: 15104 ~ {MASKS}
@@ -69,7 +69,7 @@ histogram:
6969
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - VM Selection Rules:
7070
# CHECK-FULL-VLMAX1-ENABLED-NEXT: P: 0.66667 <all_ones>
7171
# CHECK-FULL-VLMAX1-ENABLED-NEXT: P: 0.33333 <any_legal>
72-
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - Configuration Bag Listing:
72+
# CHECK-FULL-VLMAX1-ENABLED: - Configuration Bag Listing:
7373
# CHECK-FULL-VLMAX1-ENABLED-COUNT-800: /MaxVL
7474
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - Configuration Bag Size: 800
7575
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - State Cardinality: 15200 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-biased/conf-nonsimplified.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ histogram:
4747
# CHECK-DEFAULT-NEXT: - VM Selection Rules:
4848
# CHECK-DEFAULT-NEXT: P: 0.66667 <all_ones>
4949
# CHECK-DEFAULT-NEXT: P: 0.33333 <any_legal>
50-
# CHECK-DEFAULT-NEXT: - Configuration Bag Listing:
50+
# CHECK-DEFAULT: - Configuration Bag Listing:
5151
# CHECK-DEFAULT-NEXT: P: 1 Conf: { e8, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 32768
5252
# CHECK-DEFAULT-NEXT: - Configuration Bag Size: 1
5353
# CHECK-DEFAULT-NEXT: - State Cardinality: 32768 ~ {MASKS}
@@ -65,7 +65,7 @@ histogram:
6565
# CHECK-VLEN512-NEXT: - VM Selection Rules:
6666
# CHECK-VLEN512-NEXT: P: 0.66667 <all_ones>
6767
# CHECK-VLEN512-NEXT: P: 0.33333 <any_legal>
68-
# CHECK-VLEN512-NEXT: - Configuration Bag Listing:
68+
# CHECK-VLEN512: - Configuration Bag Listing:
6969
# CHECK-VLEN512-NEXT: P: 1 Conf: { e8, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 256
7070
# CHECK-VLEN512-NEXT: - Configuration Bag Size: 1
7171
# CHECK-VLEN512-NEXT: - State Cardinality: 256 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-biased/conf-sew64-lmul1.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ histogram:
4949
# CHECK-SEW64-NEXT: - VM Selection Rules:
5050
# CHECK-SEW64-NEXT: P: 0.66667 <all_ones>
5151
# CHECK-SEW64-NEXT: P: 0.33333 <any_legal>
52-
# CHECK-SEW64-NEXT: - Configuration Bag Listing:
52+
# CHECK-SEW64: - Configuration Bag Listing:
5353
# CHECK-SEW64-NEXT: P: 1 Conf: { e64, m1, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 2
5454
# CHECK-SEW64-NEXT: - Configuration Bag Size: 1
5555
# CHECK-SEW64-NEXT: - State Cardinality: 2 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-biased/conf-sew64-lmulX.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ histogram:
5050
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: - VM Selection Rules:
5151
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.66667 <all_ones>
5252
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.33333 <any_legal>
53-
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: - Configuration Bag Listing:
53+
# CHECK-SEW64-LMULX-VLMAX1-DISABLED: - Configuration Bag Listing:
5454
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.25 Conf: { e64, m1, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 2
5555
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.25 Conf: { e64, m2, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 4
5656
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.25 Conf: { e64, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 8
@@ -70,7 +70,7 @@ histogram:
7070
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: - VM Selection Rules:
7171
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.66667 <all_ones>
7272
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.33333 <any_legal>
73-
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: - Configuration Bag Listing:
73+
# CHECK-SEW64-LMULX-VLMAX1-ENABLED: - Configuration Bag Listing:
7474
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.22222 Conf: { e64, m1, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 2
7575
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.22222 Conf: { e64, m2, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 4
7676
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.22222 Conf: { e64, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 8

‎llvm/test/tools/llvm-snippy/rvv-config-biased/conf-sew8-lmul4.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ histogram:
5454
# CHECK-SEW8-NEXT: - VM Selection Rules:
5555
# CHECK-SEW8-NEXT: P: 0.66667 <all_ones>
5656
# CHECK-SEW8-NEXT: P: 0.33333 <any_legal>
57-
# CHECK-SEW8-NEXT: - Configuration Bag Listing:
57+
# CHECK-SEW8: - Configuration Bag Listing:
5858
# CHECK-SEW8-NEXT: P: 1 Conf: { e8, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 64
5959
# CHECK-SEW8-NEXT: - Configuration Bag Size: 1
6060
# CHECK-SEW8-NEXT: - State Cardinality: 64 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-biased/conf-vill.yaml

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ histogram:
8585
# CHECK-BOTH-CONFIGS-NEXT: - VM Selection Rules:
8686
# CHECK-BOTH-CONFIGS-NEXT: P: 0.5 <all_ones>
8787
# CHECK-BOTH-CONFIGS-NEXT: P: 0.5 <any_legal>
88-
# CHECK-BOTH-CONFIGS-NEXT: - Configuration Bag Listing:
88+
# CHECK-BOTH-CONFIGS: - Configuration Bag Listing:
8989
# CHECK-BOTH-CONFIGS-COUNT-704: /MaxVL
9090
# CHECK-BOTH-CONFIGS-NEXT: P: 0.5 Conf: { Illegal Configurations: 1344 points }/MaxVL: 0
9191
# CHECK-BOTH-CONFIGS-NEXT: - Configuration Bag Size: 2048
@@ -103,7 +103,7 @@ histogram:
103103
# CHECK-ILLEGAL-ONLY-NEXT: - VM Selection Rules:
104104
# CHECK-ILLEGAL-ONLY-NEXT: P: 0.5 <all_ones>
105105
# CHECK-ILLEGAL-ONLY-NEXT: P: 0.5 <any_legal>
106-
# CHECK-ILLEGAL-ONLY-NEXT: - Configuration Bag Listing:
106+
# CHECK-ILLEGAL-ONLY: - Configuration Bag Listing:
107107
# CHECK-ILLEGAL-ONLY-NEXT: P: 1 Conf: { Illegal Configurations: 1344 points }/MaxVL: 0
108108
# CHECK-ILLEGAL-ONLY-NEXT: - Configuration Bag Size: 1344
109109
# CHECK-ILLEGAL-ONLY-NEXT: - State Cardinality: 0 ~ {MASKS}
@@ -120,7 +120,7 @@ histogram:
120120
# CHECK-LEGAL-ONLY-NEXT: - VM Selection Rules:
121121
# CHECK-LEGAL-ONLY-NEXT: P: 0.5 <all_ones>
122122
# CHECK-LEGAL-ONLY-NEXT: P: 0.5 <any_legal>
123-
# CHECK-LEGAL-ONLY-NEXT: - Configuration Bag Listing:
123+
# CHECK-LEGAL-ONLY: - Configuration Bag Listing:
124124
# CHECK-LEGAL-ONLY-COUNT-704: /MaxVL
125125
# CHECK-LEGAL-ONLY-NEXT: - Configuration Bag Size: 704
126126
# CHECK-LEGAL-ONLY-NEXT: - State Cardinality: 15104 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-biased/err-wrong-pvill.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,4 +33,4 @@ histogram:
3333
- [VXOR_VX, 1.0]
3434
- [VZEXT_VF4, 1.0]
3535

36-
# CHECK: error: riscv-vector-vlvm::Pvill should be from [0.0;1.0]
36+
# CHECK: error: riscv-vector-unit: Pvill probability should be from [0.0;1.0]

‎llvm/test/tools/llvm-snippy/rvv-config-histogram/conf-all.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -54,7 +54,7 @@ histogram:
5454
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - VM Selection Rules:
5555
# CHECK-FULL-VLMAX1-DISABLED-NEXT: P: 0.66667 <all_ones>
5656
# CHECK-FULL-VLMAX1-DISABLED-NEXT: P: 0.33333 <any_legal>
57-
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - Configuration Bag Listing:
57+
# CHECK-FULL-VLMAX1-DISABLED: - Configuration Bag Listing:
5858
# CHECK-FULL-VLMAX1-DISABLED-COUNT-704: /MaxVL
5959
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - Configuration Bag Size: 704
6060
# CHECK-FULL-VLMAX1-DISABLED-NEXT: - State Cardinality: 15104 ~ {MASKS}
@@ -71,7 +71,7 @@ histogram:
7171
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - VM Selection Rules:
7272
# CHECK-FULL-VLMAX1-ENABLED-NEXT: P: 0.66667 <all_ones>
7373
# CHECK-FULL-VLMAX1-ENABLED-NEXT: P: 0.33333 <any_legal>
74-
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - Configuration Bag Listing:
74+
# CHECK-FULL-VLMAX1-ENABLED: - Configuration Bag Listing:
7575
# CHECK-FULL-VLMAX1-ENABLED-COUNT-800: /MaxVL
7676
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - Configuration Bag Size: 800
7777
# CHECK-FULL-VLMAX1-ENABLED-NEXT: - State Cardinality: 15200 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-histogram/conf-sew64-lmul1.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ histogram:
5252
# CHECK-SEW64-NEXT: - VM Selection Rules:
5353
# CHECK-SEW64-NEXT: P: 0.66667 <all_ones>
5454
# CHECK-SEW64-NEXT: P: 0.33333 <any_legal>
55-
# CHECK-SEW64-NEXT: - Configuration Bag Listing:
55+
# CHECK-SEW64: - Configuration Bag Listing:
5656
# CHECK-SEW64-NEXT: P: 1 Conf: { e64, m1, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 2
5757
# CHECK-SEW64-NEXT: - Configuration Bag Size: 1
5858
# CHECK-SEW64-NEXT: - State Cardinality: 2 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-histogram/conf-sew64-lmulX.yaml

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ histogram:
5353
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: - VM Selection Rules:
5454
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.66667 <all_ones>
5555
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.33333 <any_legal>
56-
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: - Configuration Bag Listing:
56+
# CHECK-SEW64-LMULX-VLMAX1-DISABLED: - Configuration Bag Listing:
5757
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.25 Conf: { e64, m1, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 2
5858
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.25 Conf: { e64, m2, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 4
5959
# CHECK-SEW64-LMULX-VLMAX1-DISABLED-NEXT: P: 0.25 Conf: { e64, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 8
@@ -73,7 +73,7 @@ histogram:
7373
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: - VM Selection Rules:
7474
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.66667 <all_ones>
7575
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.33333 <any_legal>
76-
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: - Configuration Bag Listing:
76+
# CHECK-SEW64-LMULX-VLMAX1-ENABLED: - Configuration Bag Listing:
7777
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.22222 Conf: { e64, m1, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 2
7878
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.22222 Conf: { e64, m2, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 4
7979
# CHECK-SEW64-LMULX-VLMAX1-ENABLED-NEXT: P: 0.22222 Conf: { e64, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 8

‎llvm/test/tools/llvm-snippy/rvv-config-histogram/conf-sew8-lmul4.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ histogram:
5252
# CHECK-SEW8-NEXT: - VM Selection Rules:
5353
# CHECK-SEW8-NEXT: P: 0.66667 <all_ones>
5454
# CHECK-SEW8-NEXT: P: 0.33333 <any_legal>
55-
# CHECK-SEW8-NEXT: - Configuration Bag Listing:
55+
# CHECK-SEW8: - Configuration Bag Listing:
5656
# CHECK-SEW8-NEXT: P: 1 Conf: { e8, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 64
5757
# CHECK-SEW8-NEXT: - Configuration Bag Size: 1
5858
# CHECK-SEW8-NEXT: - State Cardinality: 64 ~ {MASKS}

‎llvm/test/tools/llvm-snippy/rvv-config-histogram/conf-vlsetivli-limits.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ histogram:
4242
# CHECK-SEW8-NEXT: - VM Selection Rules:
4343
# CHECK-SEW8-NEXT: P: 0.66667 <all_ones>
4444
# CHECK-SEW8-NEXT: P: 0.33333 <any_legal>
45-
# CHECK-SEW8-NEXT: - Configuration Bag Listing:
45+
# CHECK-SEW8: - Configuration Bag Listing:
4646
# CHECK-SEW8-NEXT: P: 1 Conf: { e8, m4, tu, mu, vxsat: 0, vxrm: rnu }/MaxVL: 64
4747
# CHECK-SEW8-NEXT: - Configuration Bag Size: 1
4848
# CHECK-SEW8-NEXT: - State Cardinality: 64 ~ {MASKS}

‎llvm/tools/llvm-snippy/lib/Target/RISCV/RVVUnitConfig.cpp

Lines changed: 22 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -220,6 +220,7 @@ struct RVVConfigurationSpace {
220220
BiasGuides Guides;
221221
RVVUnitInfo VUInfo;
222222

223+
static constexpr auto kUnitName = "riscv-vector-unit";
223224
static void mapYaml(llvm::yaml::IO &IO,
224225
std::optional<RVVConfigurationSpace> &CS);
225226
};
@@ -656,7 +657,7 @@ template <> struct GeneratorFactory<RVVConfigurationInfo::VMGeneratorHolder> {
656657
void RVVConfigurationSpace::mapYaml(llvm::yaml::IO &IO,
657658
std::optional<RVVConfigurationSpace> &CS) {
658659
yaml::EmptyContext Ctx;
659-
IO.mapOptionalWithContext("riscv-vector-unit", CS, Ctx);
660+
IO.mapOptionalWithContext(RVVConfigurationSpace::kUnitName, CS, Ctx);
660661
}
661662

662663
class RVVConfig : public RVVConfigInterface {
@@ -762,20 +763,30 @@ template <> struct yaml::MappingTraits<RVVUnitInfo> {
762763
}
763764
};
764765

766+
static bool isCorrectProbability(double Prob) {
767+
return Prob >= 0.0 && Prob <= 1.0;
768+
}
769+
765770
template <> struct yaml::MappingTraits<BiasGuides> {
771+
static constexpr auto kProbBounds = "probability should be from [0.0;1.0]";
772+
766773
static void mapping(yaml::IO &IO, BiasGuides &Guides) {
767774
Guides.Enabled = true;
768775
IO.mapRequired("P", Guides.ModeChangeP);
776+
IO.mapOptional("Pvill", Guides.SetVillP);
777+
}
769778

779+
static std::string validate(yaml::IO &IO, BiasGuides &Guides) {
770780
// TODO: implemenent alternative mode changing schemes and
771781
// replace probability with weight
772-
if (!(Guides.ModeChangeP >= 0.0 && Guides.ModeChangeP <= 1.0))
773-
snippy::fatal("riscv-vector-vlvm::P should be from [0.0;1.0]");
774-
775-
IO.mapOptional("Pvill", Guides.SetVillP);
776-
777-
if (!(Guides.SetVillP >= 0.0 && Guides.SetVillP <= 1.0))
778-
snippy::fatal("riscv-vector-vlvm::Pvill should be from [0.0;1.0]");
782+
if (!isCorrectProbability(Guides.ModeChangeP))
783+
return std::string(RVVConfigurationSpace::kUnitName) + ": P " +
784+
kProbBounds;
785+
786+
if (!isCorrectProbability(Guides.SetVillP))
787+
return std::string(RVVConfigurationSpace::kUnitName) + ": Pvill " +
788+
kProbBounds;
789+
return {};
779790
}
780791
};
781792

@@ -788,7 +799,7 @@ template <> struct yaml::MappingTraits<RVVConfigurationSpace> {
788799

789800
template <> struct yaml::MappingTraits<VectorUnitRules> {
790801
static void mapping(yaml::IO &IO, VectorUnitRules &VU) {
791-
IO.mapRequired("riscv-vector-unit", VU.Config);
802+
IO.mapRequired(RVVConfigurationSpace::kUnitName, VU.Config);
792803
}
793804
};
794805

@@ -818,12 +829,11 @@ unsigned computeVLMax(unsigned VLEN, unsigned SEW, RISCVII::VLMUL LMUL) {
818829

819830
std::pair<unsigned, bool> computeDecodedEMUL(unsigned SEW, unsigned EEW,
820831
RISCVII::VLMUL LMUL) {
821-
if (isReservedValues(SEW, LMUL) || !isLegalSEW(SEW)) {
832+
if (isReservedValues(SEW, LMUL) || !isLegalSEW(SEW) || !isLegalSEW(EEW)) {
822833
// Calculating EMUL doesn't make sense for illegal values of SEW or LMUL, so
823834
// just return {1, 0}
824835
return {1, 0};
825836
}
826-
assert(isLegalSEW(EEW));
827837

828838
auto [Multiplier, IsFractional] = RISCVVType::decodeVLMUL(LMUL);
829839
unsigned long long Dividend = EEW * (IsFractional ? 1u : Multiplier);
@@ -1264,6 +1274,7 @@ void RVVConfigurationInfo::print(raw_ostream &OS) const {
12641274
OS << "P: " << floatToString(Prob, 5) << " ";
12651275
OS << "<" << Gen->identify() << ">\n";
12661276
}
1277+
12671278
OS << " - Configuration Bag Listing:\n";
12681279
unsigned IllegalPointsSize = 0;
12691280
for (const auto &[Point, Prob] :

‎llvm/tools/llvm-snippy/lib/Target/RISCV/RVVUnitConfig.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,8 @@ std::unique_ptr<RVVConfigInterface> createRVVConfig();
5252

5353
// Compute EMUL = EEW / SEW * LMUL
5454
RISCVII::VLMUL computeEMUL(unsigned SEW, unsigned EEW, RISCVII::VLMUL LMUL);
55+
std::pair<unsigned, bool> computeDecodedEMUL(unsigned SEW, unsigned EEW,
56+
RISCVII::VLMUL LMUL);
5557
bool isValidEMUL(unsigned SEW, unsigned EEW, RISCVII::VLMUL LMUL);
5658

5759
inline static bool canBeEncoded(unsigned SEW) {
@@ -228,6 +230,10 @@ struct RVVConfigurationInfo final {
228230
bool isModeChangeArtificial() const { return ArtificialModeChange; }
229231
const ModeChangeInfo &getModeChangeInfo() const { return SwitchInfo; }
230232

233+
const std::vector<RVVConfiguration> &getConfigs() const {
234+
return CfgGen.elements();
235+
}
236+
231237
void print(raw_ostream &OS) const;
232238
void dump() const;
233239

@@ -238,7 +244,6 @@ struct RVVConfigurationInfo final {
238244
using ConfigGenerator = DiscreteGeneratorInfo<RVVConfiguration>;
239245
using VLGenerator = DiscreteGeneratorInfo<VLGeneratorHolder>;
240246
using VMGenerator = DiscreteGeneratorInfo<VMGeneratorHolder>;
241-
using ModeGenerator = DiscreteGeneratorInfo<int>;
242247

243248
RVVConfigurationInfo(unsigned VLEN, ConfigGenerator &&CfgGen,
244249
VLGenerator &&VLGen, VMGenerator &&VMGen,

‎llvm/tools/llvm-snippy/lib/Target/RISCV/Target.cpp

Lines changed: 29 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -399,12 +399,11 @@ static RegStorageType regToStorage(Register Reg) {
399399
return RegStorageType::VReg;
400400
}
401401

402-
static bool isLegalRVVInstr(unsigned Opcode, const MachineBasicBlock &MBB,
402+
static bool isLegalRVVInstr(unsigned Opcode, const RVVConfiguration &Cfg,
403+
unsigned VL, unsigned VLEN,
403404
const GeneratorContext &GC) {
404-
auto &RISCVCtx = GC.getTargetContext().getImpl<RISCVGeneratorContext>();
405405
if (!isRVV(Opcode))
406406
return false;
407-
auto &Cfg = RISCVCtx.getCurrentRVVCfg(MBB);
408407
auto SEW = Cfg.SEW;
409408
auto LMUL = Cfg.LMUL;
410409

@@ -806,6 +805,16 @@ breakDownAddrForInstrWithImmOffset(AddressInfo AddrInfo, const MachineInstr &MI,
806805

807806
using OpcodeFilter = GeneratorContext::OpcodeFilter;
808807

808+
static OpcodeFilter getRVVDefaultPolicyFilterImpl(const RVVConfiguration &Cfg,
809+
unsigned VL, unsigned VLEN,
810+
const GeneratorContext &GC) {
811+
return [&Cfg, VL, VLEN, &GC](unsigned Opcode) {
812+
if (!isRVV(Opcode))
813+
return true;
814+
return isLegalRVVInstr(Opcode, Cfg, VL, VLEN, GC);
815+
};
816+
}
817+
809818
static OpcodeFilter getDefaultPolicyFilterImpl(const MachineBasicBlock &MBB,
810819
const GeneratorContext &GC) {
811820
auto &RISCVCtx = GC.getTargetContext().getImpl<RISCVGeneratorContext>();
@@ -816,11 +825,11 @@ static OpcodeFilter getDefaultPolicyFilterImpl(const MachineBasicBlock &MBB,
816825
return true;
817826
};
818827

819-
return [&GC, &MBB](unsigned Opcode) {
820-
if (isRVV(Opcode) && !isLegalRVVInstr(Opcode, MBB, GC))
821-
return false;
822-
return true;
823-
};
828+
const auto &Cfg = RISCVCtx.getCurrentRVVCfg(MBB);
829+
auto VL = RISCVCtx.getVL(MBB);
830+
auto VLEN = RISCVCtx.getVLEN();
831+
832+
return getRVVDefaultPolicyFilterImpl(Cfg, VL, VLEN, GC);
824833
}
825834

826835
inline bool checkSupportedOrdering(const OpcodeHistogram &H) {
@@ -3247,7 +3256,7 @@ void SnippyRISCVTarget::rvvGenerateModeSwitchAndUpdateContext(
32473256
// Also in this case, the already selected NewVLVM.VL has a value exceeding
32483257
// the maximum possible for this instruction (due to its encoding), so we
32493258
// reselect the NewVLVM.VL, taking into account its possible values for
3250-
// VSEIVLI.
3259+
// VSETIVLI.
32513260
if (NewVLVM.VL > kMaxVLForVSETIVLI &&
32523261
(ModeChangeInfo.WeightVSETVL + ModeChangeInfo.WeightVSETVLI) <
32533262
std::numeric_limits<double>::epsilon())
@@ -3484,17 +3493,20 @@ static void dumpRvvConfigurationInfo(StringRef FilePath,
34843493
std::unique_ptr<TargetGenContextInterface>
34853494
SnippyRISCVTarget::createTargetContext(const GeneratorContext &Ctx) const {
34863495
auto RISCVCfg = RISCVConfigurationInfo::constructConfiguration(Ctx);
3487-
bool IsRVVPresent = RISCVCfg.getVUConfig().getModeChangeInfo().RVVPresent;
3488-
bool IsApplyValuegramEachInst =
3489-
Ctx.getGenSettings().Cfg.RegsHistograms.has_value();
3490-
if (IsRVVPresent && IsApplyValuegramEachInst)
3491-
snippy::fatal("Not implemented", "vector registers can't be initialized");
3496+
auto RGC = std::make_unique<RISCVGeneratorContext>(std::move(RISCVCfg));
3497+
const auto &VUInfo = RGC->getVUConfigInfo();
3498+
bool IsRVVPresent = VUInfo.getModeChangeInfo().RVVPresent;
3499+
if (IsRVVPresent) {
3500+
bool IsApplyValuegramEachInst =
3501+
Ctx.getGenSettings().Cfg.RegsHistograms.has_value();
3502+
if (IsApplyValuegramEachInst)
3503+
snippy::fatal("Not implemented", "vector registers can't be initialized");
3504+
}
34923505

34933506
if (DumpRVVConfigurationInfo.isSpecified())
3494-
dumpRvvConfigurationInfo(DumpRVVConfigurationInfo.getValue(),
3495-
RISCVCfg.getVUConfig());
3507+
dumpRvvConfigurationInfo(DumpRVVConfigurationInfo.getValue(), VUInfo);
34963508

3497-
return std::make_unique<RISCVGeneratorContext>(std::move(RISCVCfg));
3509+
return std::move(RGC);
34983510
}
34993511

35003512
std::unique_ptr<TargetConfigInterface>

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