Remove incomplete/unmaintained ARM32 backend (for now). (bytecodealliance#3799)

In bytecodealliance#3721, we have been discussing what to do about the ARM32 backend in
Cranelift. Currently, this backend supports only 32-bit types, which is
insufficient for full Wasm-MVP; it's missing other critical bits, like
floating-point support; and it has only ever been exercised, AFAIK, via
the filetests for the individual CLIF instructions that are implemented.

We were very very thankful for the original contribution of this
backend, even in its partial state, and we had hoped at the time that we
could eventually mature it in-tree until it supported e.g. Wasm and
other use-cases. But that hasn't yet happened -- to the blame of no-one,
to be clear, we just haven't had a contributor with sufficient time.

Unfortunately, the existence of the backend and lack of active
maintainer now potentially pose a bit of a burden as we hope to make
continuing changes to the backend framework. For example, the ISLE
migration, and the use of regalloc2 that it will allow, would need all
of the existing lowering patterns in the hand-written ARM32 backend to
be rewritten as ISLE rules.

Given that we don't currently have the resources to do this, we think
it's probably best if we, sadly, for now remove this partial backend.
This is not in any way a statement of what we might accept in the
future, though. If, in the future, an ARM32 backend updated to our
latest codebase with an active maintainer were to appear, we'd be happy
to merge it (and likewise for any other architecture!). But for now,
this is probably the best path. Thanks again to the original contributor
@jmkrauz and we hope that this work can eventually be brought back and
reused if someone has the time to do so!

Author: cfallin

.github/workflows/main.yml

@@ -150,11 +150,9 @@ jobs:
     # Check a few builds of the cranelift backend
     # - only x86 backend support,
     # - only arm64 backend support,
-    # - experimental arm32 support,
     # - no debug_assertions.
     - run: cargo check --manifest-path=./cranelift/Cargo.toml --bin clif-util --no-default-features --features=cranelift-codegen/arm64
     - run: cargo check --manifest-path=./cranelift/Cargo.toml --bin clif-util --no-default-features --features=cranelift-codegen/x86
-    - run: cargo check --manifest-path=./cranelift/Cargo.toml --bin clif-util --no-default-features --features=cranelift-codegen/arm32
     - run: cargo check --manifest-path=./cranelift/Cargo.toml --bin clif-util
       env:
         CARGO_PROFILE_DEV_DEBUG_ASSERTIONS: false

cranelift/Cargo.toml

@@ -47,6 +47,5 @@ structopt = "0.3.17"
 default = ["disas", "wasm", "cranelift-codegen/all-arch", "souper-harvest"]
 disas = ["capstone"]
 wasm = ["wat", "cranelift-wasm"]
-experimental_arm32 = ["cranelift-codegen/arm32", "cranelift-filetests/experimental_arm32"]
 souper-harvest = ["cranelift-codegen/souper-harvest", "rayon"]
 all-arch = ["cranelift-codegen/all-arch"]

cranelift/codegen/Cargo.toml

@@ -62,7 +62,6 @@ unwind = ["gimli"]
 x86 = []
 arm64 = []
 s390x = []
-arm32 = [] # Work-in-progress codegen backend for ARM.
 
 # Stub feature that does nothing, for Cargo-features compatibility: the new
 # backend is the default now.

cranelift/codegen/meta/src/isa/arm32.rs

@@ -3,7 +3,6 @@ use crate::cdsl::isa::TargetIsa;
 use crate::shared::Definitions as SharedDefinitions;
 use std::fmt;
 
-mod arm32;
 mod arm64;
 mod s390x;
 pub(crate) mod x86;
@@ -12,7 +11,6 @@ pub(crate) mod x86;
 #[derive(PartialEq, Copy, Clone)]
 pub enum Isa {
     X86,
-    Arm32,
     Arm64,
     S390x,
 }
@@ -32,14 +30,13 @@ impl Isa {
             "aarch64" => Some(Isa::Arm64),
             "s390x" => Some(Isa::S390x),
             x if ["x86_64", "i386", "i586", "i686"].contains(&x) => Some(Isa::X86),
-            x if x.starts_with("arm") || arch.starts_with("thumb") => Some(Isa::Arm32),
             _ => None,
         }
     }
 
     /// Returns all supported isa targets.
     pub fn all() -> &'static [Isa] {
-        &[Isa::X86, Isa::Arm32, Isa::Arm64, Isa::S390x]
+        &[Isa::X86, Isa::Arm64, Isa::S390x]
     }
 }
 
@@ -48,7 +45,6 @@ impl fmt::Display for Isa {
     fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
         match *self {
             Isa::X86 => write!(f, "x86"),
-            Isa::Arm32 => write!(f, "arm32"),
             Isa::Arm64 => write!(f, "arm64"),
             Isa::S390x => write!(f, "s390x"),
         }
@@ -59,7 +55,6 @@ pub(crate) fn define(isas: &[Isa], shared_defs: &mut SharedDefinitions) -> Vec<T
     isas.iter()
         .map(|isa| match isa {
             Isa::X86 => x86::define(shared_defs),
-            Isa::Arm32 => arm32::define(shared_defs),
             Isa::Arm64 => arm64::define(shared_defs),
             Isa::S390x => s390x::define(shared_defs),
         })