[AVR] Update data layout alignments

This causes all types to have minimum alignments of their size.

Author: Dylan McKay

lib/Target/AVR/AVRTargetMachine.cpp

@@ -25,6 +25,8 @@
 
 namespace llvm {
 
+static const char *AVRDataLayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-n8";
+
 /// Processes a CPU name.
 static StringRef getCPU(StringRef CPU) {
   if (CPU.empty() || CPU == "generic") {
@@ -44,7 +46,7 @@ AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT,
                                    Optional<Reloc::Model> RM, CodeModel::Model CM,
                                    CodeGenOpt::Level OL)
     : LLVMTargetMachine(
-          T, "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8-i64:8:8-f32:8:8-f64:8:8-n8", TT,
+          T, AVRDataLayout, TT,
           getCPU(CPU), FS, Options, getEffectiveRelocModel(RM), CM, OL),
       SubTarget(TT, getCPU(CPU), FS, *this) {
   this->TLOF = make_unique<AVRTargetObjectFile>();

test/CodeGen/AVR/call.ll

@@ -30,9 +30,9 @@ define i8 @calli8_reg() {
 
 define i8 @calli8_stack() {
 ; CHECK-LABEL: calli8_stack:
-; CHECK: ldi [[REG1:r[0-9]+]], 10
-; CHECK: ldi [[REG2:r[0-9]+]], 11
-; CHECK: push [[REG2]]
+; CHECK: ldi [[REG1:r[0-9]+]], 11
+; CHECK: push [[REG1]]
+; CHECK: ldi [[REG1]], 10
 ; CHECK: push [[REG1]]
 ; CHECK: call foo8_3
     %result1 = call i8 @foo8_3(i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11)
@@ -141,7 +141,7 @@ define void @testcallprologue() {
 ; CHECK-LABEL: testcallprologue:
 ; CHECK: push r28
 ; CHECK: push r29
-; CHECK: sbiw r28, 27
+; CHECK: sbiw r28, 28
 ; CHECK: ldi [[REG1:r[0-9]+]], 88
 ; CHECK: std Y+9, [[REG1]]
 ; CHECK: ldi [[REG1:r[0-9]+]], 11

test/CodeGen/AVR/directmem.ll

@@ -34,9 +34,9 @@ define i8 @global8_load() {
 define void @array8_store() {
 ; CHECK-LABEL: array8_store:
 ; CHECK: ldi [[REG1:r[0-9]+]], 1
+; CHECK: sts char.array, [[REG1]]
 ; CHECK: ldi [[REG2:r[0-9]+]], 2
 ; CHECK: sts char.array+1, [[REG2]]
-; CHECK: sts char.array, [[REG1]]
 ; CHECK: ldi [[REG:r[0-9]+]], 3
 ; CHECK: sts char.array+2, [[REG]]
   store i8 1, i8* getelementptr inbounds ([3 x i8], [3 x i8]* @char.array, i32 0, i64 0)

test/CodeGen/AVR/varargs.ll

@@ -27,8 +27,8 @@ define i16 @varargs1(i8* nocapture %x, ...) {
 
 define i16 @varargs2(i8* nocapture %x, ...) {
 ; CHECK-LABEL: varargs2:
-; CHECK: ldd r24, Y+9
-; CHECK: ldd r25, Y+10
+; CHECK: ld r24, Z
+; CHECK: ldd r25, Z+1
   %ap = alloca i8*
   %ap1 = bitcast i8** %ap to i8*
   call void @llvm.va_start(i8* %ap1)