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Merge pull request fastmachinelearning#334 from Duchstf/master
Remove io_serial as io_stream and add some more info in docs.
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docs/api/configuration.rst

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@@ -68,7 +68,7 @@ It looks like this:
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Device: xcku115-flvb2104-2-i
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ClockPeriod: 5
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IOType: io_parallel # options: io_serial/io_parallel
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IOType: io_parallel # options: io_parallel/io_stream
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HLSConfig:
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Model:
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Precision: ap_fixed<16,6>
@@ -91,7 +91,7 @@ There are a number of configuration options that you have. Let's go through the
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* **Device**\ : the particular FPGA part number that you are considering, here it's a Xilinx Virtex-7 FPGA
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* **ClockPeriod**\ : the clock period, in ns, at which your algorithm runs
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Then you have some optimization parameters for how your algorithm runs:
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* **IOType**\ : your options are ``io_parallel`` or ``io_serial`` where this really defines if you are pipelining your algorithm or not
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* **IOType**\ : your options are ``io_parallel`` or ``io_stream`` which defines the type of data structure used for inputs, intermediate activations between layers, and outputs. For ``io_parallel``, arrays are used that, in principle, can be fully unrolled and are typically implemented in RAMs. For ``io_stream``, HLS streams are used, which are a more efficient/scalable mechanism to represent data that are produced and consumed in a sequential manner. Typically, HLS streams are implemented with FIFOs instead of RAMs. For more information see `here <https://docs.xilinx.com/r/en-US/ug1399-vitis-hls/pragma-HLS-stream>`__.
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* **ReuseFactor**\ : in the case that you are pipelining, this defines the pipeline interval or initiation interval
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* **Strategy**\ : Optimization strategy on FPGA, either "Latency" or "Resource". If none is supplied then hl4ml uses "Latency" as default. Note that a reuse factor larger than 1 should be specified when using "resource" strategy. An example of using larger reuse factor can be found `here. <https://github.com/hls-fpga-machine-learning/models/tree/master/keras/KERAS_dense>`__
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* **Precision**\ : this defines the precsion of your inputs, outputs, weights and biases. It is denoted by ``ap_fixed<X,Y>``\ , where ``Y`` is the number of bits representing the signed number above the binary point (i.e. the integer part), and ``X`` is the total number of bits.

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