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| 1 | +from miasm.analysis.data_flow import State |
| 2 | +from miasm.expression.expression import * |
| 3 | + |
| 4 | +""" |
| 5 | +Test memory interferences |
| 6 | +
|
| 7 | +A memory interference may appear when two ExprMem objects relate to the same area of memory: editing one may impact the other. |
| 8 | +""" |
| 9 | + |
| 10 | +a32 = ExprId('a', 32) |
| 11 | +b32 = ExprId('b', 32) |
| 12 | + |
| 13 | +a64 = ExprId('a', 64) |
| 14 | +b64 = ExprId('b', 64) |
| 15 | + |
| 16 | +mem_a32_32 = ExprMem(a32, 32) |
| 17 | +mem_b32_32 = ExprMem(b32, 32) |
| 18 | + |
| 19 | +mem_a64_32 = ExprMem(a64, 32) |
| 20 | + |
| 21 | +mem_a32_m1_8 = ExprMem(a32 + ExprInt(-1, 32), 8) |
| 22 | +mem_a32_p0_8 = ExprMem(a32, 8) |
| 23 | +mem_a32_p1_8 = ExprMem(a32 + ExprInt(1, 32), 8) |
| 24 | +mem_a32_p2_8 = ExprMem(a32 + ExprInt(2, 32), 8) |
| 25 | +mem_a32_p3_8 = ExprMem(a32 + ExprInt(3, 32), 8) |
| 26 | +mem_a32_p4_8 = ExprMem(a32 + ExprInt(4, 32), 8) |
| 27 | + |
| 28 | + |
| 29 | +mem_a32_m4_32 = ExprMem(a32 + ExprInt(-4, 32), 32) |
| 30 | +mem_a32_m3_32 = ExprMem(a32 + ExprInt(-3, 32), 32) |
| 31 | +mem_a32_m2_32 = ExprMem(a32 + ExprInt(-2, 32), 32) |
| 32 | +mem_a32_m1_32 = ExprMem(a32 + ExprInt(-1, 32), 32) |
| 33 | +mem_a32_p0_32 = ExprMem(a32, 32) |
| 34 | +mem_a32_p1_32 = ExprMem(a32 + ExprInt(1, 32), 32) |
| 35 | +mem_a32_p2_32 = ExprMem(a32 + ExprInt(2, 32), 32) |
| 36 | +mem_a32_p3_32 = ExprMem(a32 + ExprInt(3, 32), 32) |
| 37 | +mem_a32_p4_32 = ExprMem(a32 + ExprInt(4, 32), 32) |
| 38 | + |
| 39 | + |
| 40 | +mem_a64_m4_32 = ExprMem(a64 + ExprInt(-4, 64), 32) |
| 41 | +mem_a64_m3_32 = ExprMem(a64 + ExprInt(-3, 64), 32) |
| 42 | +mem_a64_m2_32 = ExprMem(a64 + ExprInt(-2, 64), 32) |
| 43 | +mem_a64_m1_32 = ExprMem(a64 + ExprInt(-1, 64), 32) |
| 44 | +mem_a64_p0_32 = ExprMem(a64, 32) |
| 45 | +mem_a64_p1_32 = ExprMem(a64 + ExprInt(1, 64), 32) |
| 46 | +mem_a64_p2_32 = ExprMem(a64 + ExprInt(2, 64), 32) |
| 47 | +mem_a64_p3_32 = ExprMem(a64 + ExprInt(3, 64), 32) |
| 48 | +mem_a64_p4_32 = ExprMem(a64 + ExprInt(4, 64), 32) |
| 49 | + |
| 50 | + |
| 51 | +state = State() |
| 52 | + |
| 53 | + |
| 54 | +assert state.may_interfere(set([mem_a32_32]), mem_b32_32) == True |
| 55 | +assert state.may_interfere(set([mem_b32_32]), mem_a32_32) == True |
| 56 | + |
| 57 | +# Test 8 bit accesses |
| 58 | +assert state.may_interfere(set([mem_a32_m1_8]), mem_a32_32) == False |
| 59 | +assert state.may_interfere(set([mem_a32_p0_8]), mem_a32_32) == True |
| 60 | +assert state.may_interfere(set([mem_a32_p1_8]), mem_a32_32) == True |
| 61 | +assert state.may_interfere(set([mem_a32_p2_8]), mem_a32_32) == True |
| 62 | +assert state.may_interfere(set([mem_a32_p3_8]), mem_a32_32) == True |
| 63 | +assert state.may_interfere(set([mem_a32_p4_8]), mem_a32_32) == False |
| 64 | + |
| 65 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_m1_8) == False |
| 66 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p0_8) == True |
| 67 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p1_8) == True |
| 68 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p2_8) == True |
| 69 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p3_8) == True |
| 70 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p4_8) == False |
| 71 | + |
| 72 | + |
| 73 | +# Test 32 bit accesses |
| 74 | +assert state.may_interfere(set([mem_a32_m4_32]), mem_a32_32) == False |
| 75 | +assert state.may_interfere(set([mem_a32_m3_32]), mem_a32_32) == True |
| 76 | +assert state.may_interfere(set([mem_a32_m2_32]), mem_a32_32) == True |
| 77 | +assert state.may_interfere(set([mem_a32_m1_32]), mem_a32_32) == True |
| 78 | +assert state.may_interfere(set([mem_a32_p0_32]), mem_a32_32) == True |
| 79 | +assert state.may_interfere(set([mem_a32_p1_32]), mem_a32_32) == True |
| 80 | +assert state.may_interfere(set([mem_a32_p2_32]), mem_a32_32) == True |
| 81 | +assert state.may_interfere(set([mem_a32_p3_32]), mem_a32_32) == True |
| 82 | +assert state.may_interfere(set([mem_a32_p4_32]), mem_a32_32) == False |
| 83 | + |
| 84 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_m4_32) == False |
| 85 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_m3_32) == True |
| 86 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_m2_32) == True |
| 87 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_m1_32) == True |
| 88 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p0_32) == True |
| 89 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p1_32) == True |
| 90 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p2_32) == True |
| 91 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p3_32) == True |
| 92 | +assert state.may_interfere(set([mem_a32_32]), mem_a32_p4_32) == False |
| 93 | + |
| 94 | +# Test 32 bit accesses with 64 bit memory address |
| 95 | +assert state.may_interfere(set([mem_a64_m4_32]), mem_a64_32) == False |
| 96 | +assert state.may_interfere(set([mem_a64_m3_32]), mem_a64_32) == True |
| 97 | +assert state.may_interfere(set([mem_a64_m2_32]), mem_a64_32) == True |
| 98 | +assert state.may_interfere(set([mem_a64_m1_32]), mem_a64_32) == True |
| 99 | +assert state.may_interfere(set([mem_a64_p0_32]), mem_a64_32) == True |
| 100 | +assert state.may_interfere(set([mem_a64_p1_32]), mem_a64_32) == True |
| 101 | +assert state.may_interfere(set([mem_a64_p2_32]), mem_a64_32) == True |
| 102 | +assert state.may_interfere(set([mem_a64_p3_32]), mem_a64_32) == True |
| 103 | +assert state.may_interfere(set([mem_a64_p4_32]), mem_a64_32) == False |
| 104 | + |
| 105 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_m4_32) == False |
| 106 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_m3_32) == True |
| 107 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_m2_32) == True |
| 108 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_m1_32) == True |
| 109 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_p0_32) == True |
| 110 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_p1_32) == True |
| 111 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_p2_32) == True |
| 112 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_p3_32) == True |
| 113 | +assert state.may_interfere(set([mem_a64_32]), mem_a64_p4_32) == False |
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