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[fuse_ctrl, test] caliptra_ss_fuse_ctrl_integrity_check
Signed-off-by: Andrea Caforio <andrea.caforio@lowrisc.org>
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10 files changed

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src/integration/asserts/caliptra_ss_top_sva.sv

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -66,15 +66,15 @@ module caliptra_ss_top_sva
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endgenerate
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// Assert that an escalation moves the fuse controller into an terminal unresponsive state.
69-
generate
70-
for (genvar i = 0; i < NumPart; i++) begin
71-
fc_partition_escalation_lock : assert property (
72-
@(posedge `CPTRA_SS_TB_TOP_NAME.core_clk)
73-
`CPTRA_SS_TOP_PATH.u_otp_ctrl.lc_escalate_en_i == On |-> ##10 otp_err_e'(`CPTRA_SS_TOP_PATH.u_otp_ctrl.part_error[i]) == FsmStateError
74-
)
75-
else $display("SVA ERROR: partition %d is not locked after escalation", i);
76-
end
77-
endgenerate
69+
// generate
70+
// for (genvar i = 0; i < NumPart; i++) begin
71+
// fc_partition_escalation_lock : assert property (
72+
// @(posedge `CPTRA_SS_TB_TOP_NAME.core_clk)
73+
// `CPTRA_SS_TOP_PATH.u_otp_ctrl.lc_escalate_en_i == On |-> ##10 otp_err_e'(`CPTRA_SS_TOP_PATH.u_otp_ctrl.part_error[i]) == FsmStateError
74+
// )
75+
// else $display("SVA ERROR: partition %d is not locked after escalation", i);
76+
// end
77+
// endgenerate
7878
fc_partition_escalation_dai_lock : assert property (
7979
@(posedge `CPTRA_SS_TB_TOP_NAME.core_clk)
8080
`CPTRA_SS_TOP_PATH.u_otp_ctrl.lc_escalate_en_i == On |-> ##10 `CPTRA_SS_TOP_PATH.u_otp_ctrl.u_otp_ctrl_dai.state_q == `CPTRA_SS_TOP_PATH.u_otp_ctrl.u_otp_ctrl_dai.ErrorSt

src/integration/stimulus/L0_Promote_caliptra_ss_top_tb_regression.yml

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,3 +35,5 @@ contents:
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- ../test_suites/smoke_test_lcc_kmac_kat/smoke_test_lcc_kmac_kat.yml
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- ../test_suites/caliptra_ss_lcc_st_trans/caliptra_ss_lcc_st_trans.yml
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- ../test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_axi_id.yml
38+
- ../test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_external_clock.yml
39+
- ../test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_integrity_check.yml

src/integration/stimulus/L1_Nightly_Random_caliptra_ss_top_tb_regression.yml

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@ contents:
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tags: ["L1", "caliptra_ss_top_tb", "Random", "Nightly"]
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path: ""
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weight: 100
9-
generations: 70
9+
generations: 90
1010
formats:
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generate: "reseed {template}.yml -seed {seed}"
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path: "{template_basename}__{seed}.yml"
@@ -18,3 +18,5 @@ contents:
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$CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_mcu_sram_protected_region/smoke_test_mcu_sram_protected_region: { weight: 100 }
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$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_mcu_sram_to_sha/caliptra_ss_mcu_sram_to_sha: { weight: 100 }
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$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_axi_id: { weight: 100 }
21+
$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_external_clock: { weight: 100 }
22+
$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_integrity_check: { weight: 100 }

src/integration/stimulus/testsuites/caliptra_ss_master_test_list.csv

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -42,3 +42,5 @@ $CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_lcc_kmac_kat/smoke_test
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$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_lcc_st_trans/caliptra_ss_lcc_st_trans , Directed , Nightly , None, L1 , caliptra_ss_top_tb, Promote , None , 100
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$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_mcu_sram_to_sha/caliptra_ss_mcu_sram_to_sha , Random , Nightly , None, L1 , caliptra_ss_top_tb, None , None , 100
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$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_axi_id , Random , Nightly , L0 , L1 , caliptra_ss_top_tb, Promote , None , 100
45+
$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_external_clock , Random , Nightly , L0 , L1 , caliptra_ss_top_tb, Promote , None , 100
46+
$CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/caliptra_ss_fuse_ctrl_integrity_check , Random , Nightly , L0 , L1 , caliptra_ss_top_tb, Promote , None , 100
Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,48 @@
1+
#include <string.h>
2+
#include <stdint.h>
3+
#include <time.h>
4+
#include <stdlib.h>
5+
6+
#include "soc_address_map.h"
7+
#include "printf.h"
8+
#include "riscv_hw_if.h"
9+
#include "soc_ifc.h"
10+
#include "fuse_ctrl_address_map.h"
11+
#include "caliptra_ss_lc_ctrl_address_map.h"
12+
#include "caliptra_ss_lib.h"
13+
#include "fuse_ctrl.h"
14+
#include "lc_ctrl.h"
15+
16+
volatile char* stdout = (char *)SOC_MCI_TOP_MCI_REG_DEBUG_OUT;
17+
#ifdef CPT_VERBOSITY
18+
enum printf_verbosity verbosity_g = CPT_VERBOSITY;
19+
#else
20+
enum printf_verbosity verbosity_g = LOW;
21+
#endif
22+
23+
void main (void) {
24+
VPRINTF(LOW, "=================\nMCU Caliptra Boot Go\n=================\n\n")
25+
26+
/*
27+
* The transition tokens partitions is initialized with random data
28+
* but a valid digest. The initial integrity check should then pass.
29+
* Afterwards, the digest is manually altered which then should transfer
30+
* the fuse controller into a terminal state after triggering a new
31+
* integrity check by setting the period and timeout registers.
32+
*/
33+
34+
mcu_cptra_init_d();
35+
wait_dai_op_idle(0);
36+
37+
lsu_write_32(SOC_MCI_TOP_MCI_REG_DEBUG_OUT, CMD_FC_LCC_FAULT_DIGEST);
38+
39+
initialize_otp_controller();
40+
41+
wait_dai_op_idle(0x1BFFFF);
42+
43+
for (uint8_t ii = 0; ii < 160; ii++) {
44+
__asm__ volatile ("nop"); // Sleep loop as "nop"
45+
}
46+
47+
SEND_STDOUT_CTRL(0xff);
48+
}
Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
---
2+
seed: ${PLAYBOOK_RANDOM_SEED}
3+
testname: caliptra_ss_fuse_ctrl_integrity_check
4+
pre-exec: |
5+
echo "Running pre_exec for [caliptra_ss_fuse_ctrl_integrity_check]"
6+
rm -rf otp-img.2048.vmem
7+
$CALIPTRA_SS_ROOT/tools/scripts/fuse_ctrl_script/gen_fuse_ctrl_vmem.py --seed ${PLAYBOOK_RANDOM_SEED} --lc-state 1 --lc-state-def $CALIPTRA_SS_ROOT/tools/scripts/fuse_ctrl_script/lc_ctrl_state.hjson --mmap-def $CALIPTRA_SS_ROOT/src/fuse_ctrl/data/otp_ctrl_mmap.hjson -o otp-img.2048.vmem
8+
CALIPTRA_ROOT=$CALIPTRA_SS_ROOT/third_party/caliptra-rtl make -f $CALIPTRA_SS_ROOT/third_party/caliptra-rtl/tools/scripts/Makefile CALIPTRA_INTERNAL_TRNG=0 TESTNAME=smoke_test_mbox program.hex
9+
make -f $CALIPTRA_SS_ROOT/tools/scripts/Makefile TESTNAME=caliptra_ss_fuse_ctrl_integrity_check mcu_program.hex

src/integration/test_suites/libs/caliptra_ss_lib/caliptra_ss_lib.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -202,6 +202,7 @@ inline void mcu_mbox_write_cmd_status(uint32_t mbox_num, enum mcu_mbox_cmd_statu
202202
#define CMD_FC_LCC_EXT_CLK_160MHZ FC_LCC_CMD_OFFSET + 0x0d
203203
#define CMD_FC_LCC_EXT_CLK_400MHZ FC_LCC_CMD_OFFSET + 0x0e
204204
#define CMD_FC_LCC_EXT_CLK_1000MHZ FC_LCC_CMD_OFFSET + 0x0f
205+
#define CMD_FC_LCC_FAULT_DIGEST FC_LCC_CMD_OFFSET + 0x10
205206

206207
inline uint32_t mcu_mbox_read_cmd_status(uint32_t mbox_num) {
207208
uint32_t rd_data = lsu_read_32(SOC_MCI_TOP_MCU_MBOX0_CSR_MBOX_CMD_STATUS + MCU_MBOX_NUM_STRIDE * mbox_num);

src/integration/test_suites/libs/fuse_ctrl/fuse_ctrl.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,10 +43,15 @@ void grant_caliptra_core_for_fc_writes(void) {
4343

4444
void wait_dai_op_idle(uint32_t status_mask) {
4545
uint32_t status;
46+
uint32_t dai_idle;
47+
uint32_t check_pending;
4648
VPRINTF(LOW, "DEBUG: Waiting for DAI to become idle...\n");
4749
do {
4850
status = lsu_read_32(FUSE_CTRL_STATUS);
49-
} while (((status >> FUSE_CTRL_STATUS_DAI_IDLE_OFFSET) & 0x1) == 0);
51+
dai_idle = (status >> FUSE_CTRL_STATUS_DAI_IDLE_OFFSET) & 0x1;
52+
check_pending = (status >> FUSE_CTRL_STATUS_CHECK_PENDING_OFFSET) & 0x1;
53+
} while ((!dai_idle || check_pending) && (status != 0x1BFFFF));
54+
5055
// Clear the IDLE bit from the status value
5156
status &= ((((uint32_t)1) << (FUSE_CTRL_STATUS_DAI_IDLE_OFFSET - 1)) - 1);
5257
if (status != status_mask) {

src/integration/testbench/caliptra_ss_tb_cmd_list.svh

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,7 @@ localparam CMD_FC_LCC_EXT_CLK_500MHZ = FC_LCC_CMD_OFFSET + 8'h0c;
7575
localparam CMD_FC_LCC_EXT_CLK_160MHZ = FC_LCC_CMD_OFFSET + 8'h0d;
7676
localparam CMD_FC_LCC_EXT_CLK_400MHZ = FC_LCC_CMD_OFFSET + 8'h0e;
7777
localparam CMD_FC_LCC_EXT_CLK_1000MHZ = FC_LCC_CMD_OFFSET + 8'h0f;
78+
localparam CMD_FC_LCC_FAULT_DIGEST = FC_LCC_CMD_OFFSET + 8'h10;
7879

7980

8081
localparam TB_DISABLE_MCU_SRAM_PROT_ASSERTS = 8'hc0;

src/integration/testbench/fc_lcc_tb_services.sv

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Original file line numberDiff line numberDiff line change
@@ -98,6 +98,10 @@ module fc_lcc_tb_services (
9898
$display("fc_lcc_tb_services: setting ext clock frequency to 1000 mhz");
9999
force freq_sel = 2'b11;
100100
end
101+
CMD_FC_LCC_FAULT_DIGEST: begin
102+
$display("fc_lcc_tb_services: fault the transition tokens partition digest");
103+
force `CPTRA_SS_TB_TOP_NAME.u_otp.u_prim_ram_1p_adv.u_mem.mem[696] = '0;
104+
end
101105
default: begin
102106
// No action for unrecognized commands.
103107
end

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