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engdoreisantmarzam
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[FC] Add ratchet_seed_lock_en test
Testplan: - Configure OCP_LOCK_EN pin using plusargs argument in yml file; - From MCU - Programs racthet seed and reads it; - Populates Caliptra-core's HEK_SEED registers with the read value; - Releases the caliptra core by setting CPTRA_FUSE_WR_DONE; - Wait for OCP_LOCK_PROGRESS; - From Caliptra core - Read HEK_SEED from FC and check correctness; - Set OCP_LOCK_PROGRESS Signed-off-by: Douglas Reis <doreis@lowrisc.org>
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‎src/integration/test_suites/smoke_test_fc_ratchet_seed_lock_en/caliptra_isr.h‎

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// SPDX-License-Identifier: Apache-2.0
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//
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// ---------------------------------------------------------------------
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// File: caliptra_isr.h
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// Description:
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// Provides function declarations for use by external test files, so
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// that the ISR functionality may behave like a library.
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// TODO:
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// This header file includes inline function definitions for event and
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// test specific interrupt service behavior, so it should be copied and
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// modified for each test.
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// ---------------------------------------------------------------------
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#ifndef CALIPTRA_ISR_H
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#define CALIPTRA_ISR_H
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#define EN_ISR_PRINTS 1
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#include "caliptra_defines.h"
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#include <stdint.h>
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#include "printf.h"
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/* --------------- symbols/typedefs --------------- */
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typedef struct {
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uint32_t doe_error;
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uint32_t doe_notif;
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uint32_t ecc_error;
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uint32_t ecc_notif;
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uint32_t hmac_error;
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uint32_t hmac_notif;
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uint32_t kv_error;
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uint32_t kv_notif;
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uint32_t sha512_error;
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uint32_t sha512_notif;
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uint32_t sha256_error;
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uint32_t sha256_notif;
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uint32_t soc_ifc_error;
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uint32_t soc_ifc_notif;
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uint32_t sha512_acc_error;
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uint32_t sha512_acc_notif;
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uint32_t abr_error;
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uint32_t abr_notif;
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uint32_t axi_dma_error;
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uint32_t axi_dma_notif;
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} caliptra_intr_received_s;
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extern volatile caliptra_intr_received_s cptra_intr_rcv;
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//////////////////////////////////////////////////////////////////////////////
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// Function Declarations
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//
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// Performs all the CSR setup to configure and enable vectored external interrupts
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void init_interrupts(void);
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// These inline functions are used to insert event-specific functionality into the
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// otherwise generic ISR that gets laid down by the parameterized macro "nonstd_veer_isr"
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inline void service_doe_error_intr() {return;}
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inline void service_doe_notif_intr() {
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uint32_t * reg = (uint32_t *) (CLP_DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) {
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*reg = DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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cptra_intr_rcv.doe_notif |= DOE_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad doe_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_ecc_error_intr() {return;}
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inline void service_ecc_notif_intr() {
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uint32_t * reg = (uint32_t *) (CLP_ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) {
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*reg = ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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cptra_intr_rcv.ecc_notif |= ECC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad ecc_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_hmac_error_intr() {return;}
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inline void service_hmac_notif_intr() {
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uint32_t * reg = (uint32_t *) (CLP_HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) {
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*reg = HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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cptra_intr_rcv.hmac_notif |= HMAC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad hmac_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_kv_error_intr() {return;}
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inline void service_kv_notif_intr() {return;}
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inline void service_sha512_error_intr() {return;}
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inline void service_sha512_notif_intr() {
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uint32_t * reg = (uint32_t *) (CLP_SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) {
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*reg = SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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cptra_intr_rcv.sha512_notif |= SHA512_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad sha512_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_sha256_error_intr() {return;}
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inline void service_sha256_notif_intr() {
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uint32_t * reg = (uint32_t *) (CLP_SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) {
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*reg = SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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cptra_intr_rcv.sha256_notif |= SHA256_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad sha256_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_soc_ifc_error_intr() {
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uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK;
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cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INTERNAL_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK;
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cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_INV_DEV_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK;
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cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_CMD_FAIL_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK;
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cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_BAD_FUSE_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK;
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cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_ICCM_BLOCKED_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK;
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cptra_intr_rcv.soc_ifc_error |= SOC_IFC_REG_INTR_BLOCK_RF_ERROR_INTERNAL_INTR_R_ERROR_MBOX_ECC_UNC_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad soc_ifc_error_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_soc_ifc_notif_intr () {
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uint32_t * reg = (uint32_t *) (CLP_SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK;
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cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_AVAIL_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK;
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cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_MBOX_ECC_COR_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK;
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cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_DEBUG_LOCKED_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK;
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cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SCAN_MODE_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK;
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cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_SOC_REQ_LOCK_STS_MASK;
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}
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if (sts & SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK) {
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*reg = SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK;
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cptra_intr_rcv.soc_ifc_notif |= SOC_IFC_REG_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_GEN_IN_TOGGLE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad soc_ifc_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_sha512_acc_error_intr() {return;}
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inline void service_sha512_acc_notif_intr() {
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uint32_t * reg = (uint32_t *) (CLP_SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R);
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uint32_t sts = *reg;
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/* Write 1 to Clear the pending interrupt */
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if (sts & SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK) {
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*reg = SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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cptra_intr_rcv.sha512_acc_notif |= SHA512_ACC_CSR_INTR_BLOCK_RF_NOTIF_INTERNAL_INTR_R_NOTIF_CMD_DONE_STS_MASK;
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}
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if (sts == 0) {
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VPRINTF(ERROR,"bad sha512_acc_notif_intr sts:%x\n", sts);
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SEND_STDOUT_CTRL(0x1);
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while(1);
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}
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}
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inline void service_abr_error_intr() {return;}
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inline void service_abr_notif_intr() {return;}
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inline void service_axi_dma_error_intr() {return;}
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inline void service_axi_dma_notif_intr() {return;}
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#endif //CALIPTRA_ISR_H

‎src/integration/test_suites/smoke_test_fc_ratchet_seed_lock_en/cptra_ratchet_seed_lock_en.c‎

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// SPDX-License-Identifier: Apache-2.0
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//
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//
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#include "caliptra_defines.h"
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#include "printf.h"
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#include "riscv-csr.h"
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#include "soc_ifc.h"
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#include "veer-csr.h"
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#include "riscv_hw_if.h"
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#include <string.h>
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#include <stdint.h>
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#include "caliptra_isr.h"
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#include "soc_address_map.h"
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volatile uint32_t* stdout = (uint32_t *)STDOUT;
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volatile uint32_t intr_count = 0;
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#ifdef CPT_VERBOSITY
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enum printf_verbosity verbosity_g = CPT_VERBOSITY;
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#else
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enum printf_verbosity verbosity_g = LOW;
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#endif
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volatile caliptra_intr_received_s cptra_intr_rcv = {0};
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const uint32_t testData[] = {0xA5A5A5A5, 0x96969696};
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static inline void sleep (const uint32_t cycles) {
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for (uint8_t ii = 0; ii < cycles; ii++) {
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__asm__ volatile ("nop"); // Sleep loop as "nop"
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}
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}
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void check_ratched_seeds() {
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uint32_t base_address = CLP_SOC_IFC_REG_FUSE_HEK_SEED_3;
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for (uint32_t i=0;i<2;i++){
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uint32_t data = lsu_read_32(base_address + i*4);
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if (data != testData[0]) {
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VPRINTF(LOW, "CLP_CORE ERROR: HEK read failed at index %d: expected %08X, got 0x%08X \n", i, testData, data);
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return;
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}
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}
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}
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void main(void) {
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VPRINTF(LOW,"----------------------------------------\n"
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"Caliptra: Mimicking ROM from Subsystem!!\n"
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"----------------------------------------\n");
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check_ratched_seeds();
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uint32_t status_reg = SOC_IFC_REG_SS_OCP_LOCK_CTRL_LOCK_IN_PROGRESS_MASK;
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lsu_write_32(CLP_SOC_IFC_REG_SS_OCP_LOCK_CTRL, status_reg);
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VPRINTF(LOW, "CLP_CORE: \n\nSet OCP_LOCK_CTRL_LOCK_IN_PROGRESS high 0x%X...\n\n", status_reg);
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sleep(50000);
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}

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