diff --git a/.github/workflow_metadata/pr_hash b/.github/workflow_metadata/pr_hash index f8befa807..fc70d76f4 100644 --- a/.github/workflow_metadata/pr_hash +++ b/.github/workflow_metadata/pr_hash @@ -1 +1 @@ -2c0f3ea990b1a65a0c3ed0d3b041435d6c33b4036c6b996b480b545af6a2fbc93a60ec6c522bed3e96639819d29fc10a \ No newline at end of file +9fdd43fb58491bb02742914100779236c914a8c637201f2e08df3c477992fab67b10859af8d675b2b67ab0933a502618 \ No newline at end of file diff --git a/.github/workflow_metadata/pr_timestamp b/.github/workflow_metadata/pr_timestamp index 11630f0bb..cad02ed3b 100644 --- a/.github/workflow_metadata/pr_timestamp +++ b/.github/workflow_metadata/pr_timestamp @@ -1 +1 @@ -1759512824 \ No newline at end of file +1759520158 \ No newline at end of file diff --git a/.github/workflows/pre-run-check.yml b/.github/workflows/pre-run-check.yml index 07dad024b..13e69e1c8 100644 --- a/.github/workflows/pre-run-check.yml +++ b/.github/workflows/pre-run-check.yml @@ -18,7 +18,7 @@ on: workflow_call: env: - MSFT_ACTORS: ( "Nitsirks" "calebofearth" "mojtaba-bisheh" "anjpar" "upadhyayulakiran" "nileshbpat" "ekarabu" "clayton8" "kedjenks" "andrea-caforio" "nasahlpa" ) + MSFT_ACTORS: ( "Nitsirks" "calebofearth" "mojtaba-bisheh" "anjpar" "upadhyayulakiran" "nileshbpat" "ekarabu" "clayton8" "kedjenks" "andrea-caforio" "nasahlpa" "andreaskurth" ) jobs: # Fail if any compile.yml has been modified diff --git a/docs/CaliptraSSCoverage.md b/docs/CaliptraSSCoverage.md index 1ed832a1d..9398afe19 100644 --- a/docs/CaliptraSSCoverage.md +++ b/docs/CaliptraSSCoverage.md @@ -178,7 +178,6 @@ OpenTitan counterparts: - otp_ctrl_part_buf - otp_ctrl_part_unbuf - otp_ctrl_scrmbl - - otp_ctrl_token_const For these units, the reader can refer to the OpenTitan coverage dashboard. diff --git a/docs/CaliptraSSIntegrationSpecification.md b/docs/CaliptraSSIntegrationSpecification.md index 5125b7d3b..8507e4a63 100644 --- a/docs/CaliptraSSIntegrationSpecification.md +++ b/docs/CaliptraSSIntegrationSpecification.md @@ -403,6 +403,7 @@ File at this path in the repository includes parameters and defines for Caliptra | External | output | na | `cptra_ss_lc_axi_wr_rsp_o` | LC controller AXI write response output | | External | input | na | `cptra_ss_lc_axi_rd_req_i` | LC controller AXI read request input | | External | output | na | `cptra_ss_lc_axi_rd_rsp_o` | LC controller AXI read response output | +| External | input | 128 | `cptra_ss_raw_unlock_token_hashed_i` | Hashed token for RAW unlock | | External | input | na | `cptra_ss_otp_core_axi_wr_req_i` | OTP controller AXI write request input | | External | output | na | `cptra_ss_otp_core_axi_wr_rsp_o` | OTP controller AXI write response output | | External | input | na | `cptra_ss_otp_core_axi_rd_req_i` | OTP controller AXI read request input | @@ -1300,6 +1301,7 @@ Facing | Type | width | Name | External Name in So External |input | 1 | `clk_i` | `cptra_ss_clk_i` | clock | External |input | 1 | `rst_ni` | `cptra_ss_rst_b_i` | LC controller reset input, active low| External |input | 1 | `lc_sec_volatile_raw_unlock_en_i` | `cptra_ss_lc_sec_volatile_raw_unlock_en_i` | Enables Volatile TEST_UNLOCKED0 state transition infra| +External |input | 1 | `raw_unlock_token_hashed_i` | `cptra_ss_raw_unlock_token_hashed_i` | Hashed token for RAW unlock | External |input | 1 | `Allow_RMA_or_SCRAP_on_PPD` | `cptra_ss_lc_Allow_RMA_or_SCRAP_on_PPD_i` | This is GPIO strap pin. This pin should be high until LC completes its state transition to RMA or SCRAP.| External |interface | 1 | `axi_wr_req` | `cptra_ss_lc_axi_wr_req_i` | LC controller AXI write request input | External |interface | 1 | `axi_wr_rsp` | `cptra_ss_lc_axi_wr_rsp_o` | LC controller AXI write response output| diff --git a/src/fuse_ctrl/config/compile.yml b/src/fuse_ctrl/config/compile.yml index 29380eee1..14a959b22 100644 --- a/src/fuse_ctrl/config/compile.yml +++ b/src/fuse_ctrl/config/compile.yml @@ -60,7 +60,6 @@ targets: - $COMPILE_ROOT/rtl/otp_ctrl_part_buf.sv - $COMPILE_ROOT/rtl/otp_ctrl_part_unbuf.sv - $COMPILE_ROOT/rtl/otp_ctrl_scrmbl.sv - # - $COMPILE_ROOT/rtl/otp_ctrl_token_const.sv # - $COMPILE_ROOT/rtl/prim_generic_otp.sv - $COMPILE_ROOT/rtl/otp_ctrl.sv #- $COMPILE_ROOT/rtl/otp_ctrl_top.sv diff --git a/src/fuse_ctrl/rtl/otp_ctrl_token_const.sv b/src/fuse_ctrl/rtl/otp_ctrl_token_const.sv deleted file mode 100644 index fb8d7b3e2..000000000 --- a/src/fuse_ctrl/rtl/otp_ctrl_token_const.sv +++ /dev/null @@ -1,70 +0,0 @@ -// Copyright lowRISC contributors (OpenTitan project). -// Licensed under the Apache License, Version 2.0, see LICENSE for details. -// SPDX-License-Identifier: Apache-2.0 - -// This module contains the hash post-image constants for the all-zero and raw unlock tokens. -// This implementation relies on constant propagation to precompute these constants from the -// random netlist constants at compile time, and hence does not contain any "real" logic. - -module otp_ctrl_token_const - import otp_ctrl_pkg::*; - import otp_ctrl_part_pkg::*; - #( - // Compile time random constants, to be overriden by topgen. - parameter digest_const_array_t RndCnstDigestConst = RndCnstDigestConstDefault, - parameter digest_iv_array_t RndCnstDigestIV = RndCnstDigestIVDefault, - parameter lc_ctrl_state_pkg::lc_token_t RndCnstRawUnlockToken = lc_ctrl_state_pkg::RndCnstRawUnlockTokenDefault -) ( - output lc_ctrl_state_pkg::lc_token_t all_zero_token_hashed_o, - output lc_ctrl_state_pkg::lc_token_t raw_unlock_token_hashed_o -); - - localparam int NumHashes = 2; - localparam int AllZeroIdx = 0; - localparam int RawUnlockIdx = 1; - //[anjpar] Adding localpram LcRawDigest and initializing to 0 - localparam int LcRawDigest = 0; - - logic [NumHashes-1:0][1:0][ScrmblKeyWidth-1:0] data; - logic [NumHashes-1:0][4:0][ScrmblBlockWidth-1:0] state; - - // First digest is for the all zero token, the second is for the raw unlock token. - assign data[AllZeroIdx][0] = '0; - assign data[RawUnlockIdx][0] = RndCnstRawUnlockToken; - - // Repeat for all precomputed hashes. - for (genvar j = 0; j < NumHashes; j++) begin : gen_hashes - // Initialize all hashes with digest IV. - assign state[j][0] = RndCnstDigestIV[LcRawDigest]; - // Second data block is always the digest finalization constant. - assign data[j][1] = RndCnstDigestConst[LcRawDigest]; - - // Each hash takes four invocations, see diagram c) on - // https://docs.opentitan.org/hw/ip/otp_ctrl/doc/index.html#scrambling-datapath - for (genvar k = 0; k < 4; k++) begin : gen_invocations - logic [ScrmblBlockWidth-1:0] next_state; - - // This relies on constant propagation to - // statically precompute the hashed token values. - caliptra_prim_present #( - .KeyWidth(128), - .NumRounds(NumPresentRounds) - ) u_prim_present_enc_0 ( - .data_i ( state[j][k] ), - .key_i ( data[j][k%2] ), - .idx_i ( 5'h1 ), - .data_o ( next_state ), - .key_o ( ), - .idx_o ( ) - ); - - // XOR in last state according to the Davies-Meyer scheme. - assign state[j][k+1] = next_state ^ state[j][k]; - end - end - - // Concatenate the two 64bit hash results to form the final digests. - assign all_zero_token_hashed_o = {state[AllZeroIdx][4], state[AllZeroIdx][2]}; - assign raw_unlock_token_hashed_o = {state[RawUnlockIdx][4], state[RawUnlockIdx][2]}; - -endmodule : otp_ctrl_token_const diff --git a/src/integration/config/avery_vip.vf b/src/integration/config/avery_vip.vf index e42043107..4ebb236d1 100644 --- a/src/integration/config/avery_vip.vf +++ b/src/integration/config/avery_vip.vf @@ -1,36 +1,36 @@ +incdir+${CALIPTRA_SS_ROOT}/src/integration/vip -+incdir+${AVERY_SIM} -+incdir+${AVERY_SIM}/src -+incdir+${AVERY_SIM}/src.IEEE -+incdir+${AVERY_PLI} -+incdir+${AVERY_AXI}/src.axi.VCS -+incdir+${AVERY_AXI}/src.axi ++incdir+/home${AVERY_SIM} ++incdir+/home${AVERY_SIM}/src ++incdir+/home${AVERY_SIM}/src.IEEE ++incdir+/home${AVERY_PLI} ++incdir+/home${AVERY_HOME}/aaxivip-2025.2/src.axi.VCS ++incdir+/home${AVERY_HOME}/aaxivip-2025.2/src.axi +incdir+${CALIPTRA_AXI4PC_DIR} -+incdir+${AVERY_AXI}/testbench -+incdir+${AVERY_I3C}/ -+incdir+${AVERY_I3C}/src -+incdir+${AVERY_I3C}/src.i3c -+incdir+${AVERY_I3C}/src.VCS -+incdir+${AVERY_I3C}/testsuite.i3c/examples -+incdir+${AVERY_I3C}/testsuite.i3c/examples.uvm -+incdir+${AVERY_I3C}/testsuite.i3c/dut -+incdir+${AVERY_I3C}/testsuite.i3c/dut1_1 -+incdir+${AVERY_I3C}/testsuite.i3c/dut_slave -+incdir+${AVERY_I3C}/testsuite.i3c/dut_master -+incdir+${AVERY_I3C}/testsuite.i3c/dut_master_stby -+incdir+${AVERY_I3C}/testbench ++incdir+/home${AVERY_HOME}/aaxivip-2025.2/testbench ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/ ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/src ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/src.i3c ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/src.VCS ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/examples ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/examples.uvm ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut1_1 ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut_slave ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut_master ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut_master_stby ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testbench ${CALIPTRA_AXI4PC_DIR}/Axi4PC.sv -${AVERY_SIM}/src/avery_pkg.sv -${AVERY_SIM}/src/avery_pkg_test.sv -${AVERY_AXI}/src.axi/aaxi_pkg.sv -${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv -${AVERY_AXI}/src.axi/aaxi_class_pll.sv -${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv -${AVERY_AXI}/src.VCS/aaxi_busmonitor.v -${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv -${AVERY_AXI}/src.axi/aaxi_pkg_test.sv -${AVERY_AXI}/src.axi/aaxi_intf.sv -${AVERY_I3C}/src/ai2c_pkg.sv -${AVERY_I3C}/src.i3c/ai3c_pkg.sv -${AVERY_I3C}/src/ai2c_intf.sv -${AVERY_I3C}/src.i3c/ai3c_intf.sv \ No newline at end of file +/home${AVERY_SIM}/src/avery_pkg.sv +/home${AVERY_SIM}/src/avery_pkg_test.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_pkg.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_pkg_xactor.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_class_pll.sv +/home${AVERY_HOME}/aaxivip-2025.2/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.VCS/aaxi_busmonitor.v +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_coverage_metrics.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_pkg_test.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_intf.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src/ai2c_pkg.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src.i3c/ai3c_pkg.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src/ai2c_intf.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src.i3c/ai3c_intf.sv \ No newline at end of file diff --git a/src/integration/config/caliptra_ss_top.vf b/src/integration/config/caliptra_ss_top.vf index e1f66c62d..8b9e69ff4 100644 --- a/src/integration/config/caliptra_ss_top.vf +++ b/src/integration/config/caliptra_ss_top.vf @@ -2,6 +2,7 @@ +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/integration/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl ++incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl +incdir+${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl +incdir+${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/design +incdir+${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/defines @@ -10,7 +11,6 @@ +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/csrng/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/edn/rtl +incdir+${CALIPTRA_SS_ROOT}/src/tlul/rtl -+incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl +incdir+${CALIPTRA_SS_ROOT}/src/ast/rtl +incdir+${CALIPTRA_SS_ROOT}/src/fuse_ctrl/rtl @@ -103,6 +103,10 @@ ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_esc_pkg.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_count_pkg.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/keymgr_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_reg_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_state_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_pkg.sv +${CALIPTRA_SS_ROOT}/src/integration/rtl/caliptra_ss_top_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/jtag_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/top_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/alert_handler_reg_pkg.sv @@ -166,9 +170,6 @@ ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/edn/rtl/edn_pkg.sv ${CALIPTRA_SS_ROOT}/src/tlul/rtl/tlul_pkg.sv ${CALIPTRA_SS_ROOT}/src/tlul/rtl/tlul_assert_multiple.sv ${CALIPTRA_SS_ROOT}/src/tlul/rtl/tlul_assert.sv -${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_reg_pkg.sv -${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_state_pkg.sv -${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_pkg.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop_en.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl/caliptra_prim_generic_buf.sv diff --git a/src/integration/config/caliptra_ss_top_pkg.vf b/src/integration/config/caliptra_ss_top_pkg.vf new file mode 100644 index 000000000..9893598cb --- /dev/null +++ b/src/integration/config/caliptra_ss_top_pkg.vf @@ -0,0 +1,36 @@ ++incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/integration/rtl ++incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl ++incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl ++incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl ++incdir+${CALIPTRA_SS_ROOT}/src/integration/rtl +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/integration/rtl/config_defines.svh +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/caliptra_sva.svh +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/caliptra_macros.svh +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/caliptra_sram.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/ahb_defines_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/caliptra_ahb_srom.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/ahb_slv_sif.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/caliptra_icg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/clk_gate.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/caliptra_2ff_sync.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/ahb_to_reg_adapter.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl/skidbuffer.v +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_util_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_alert_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_subreg_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_mubi_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_cipher_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_sparse_fsm_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_trivium_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_secded_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_otp_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_ram_1p_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_esc_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_count_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/keymgr_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_reg_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_state_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_pkg.sv +${CALIPTRA_SS_ROOT}/src/integration/rtl/caliptra_ss_top_pkg.sv +${CALIPTRA_SS_ROOT}/src/integration/rtl/caliptra_ss_top_pkg.sv \ No newline at end of file diff --git a/src/integration/config/caliptra_ss_top_tb.vf b/src/integration/config/caliptra_ss_top_tb.vf index 2f4aa029d..e9d61c298 100644 --- a/src/integration/config/caliptra_ss_top_tb.vf +++ b/src/integration/config/caliptra_ss_top_tb.vf @@ -94,25 +94,25 @@ +incdir+${CALIPTRA_SS_ROOT}/src/axi_mem/testbench +incdir+${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/tb +incdir+${CALIPTRA_SS_ROOT}/src/integration/vip -+incdir+${AVERY_SIM} -+incdir+${AVERY_SIM}/src -+incdir+${AVERY_SIM}/src.IEEE -+incdir+${AVERY_PLI} -+incdir+${AVERY_AXI}/src.axi.VCS -+incdir+${AVERY_AXI}/src.axi -+incdir+${AVERY_AXI}/testbench -+incdir+${AVERY_I3C}/ -+incdir+${AVERY_I3C}/src -+incdir+${AVERY_I3C}/src.i3c -+incdir+${AVERY_I3C}/src.VCS -+incdir+${AVERY_I3C}/testsuite.i3c/examples -+incdir+${AVERY_I3C}/testsuite.i3c/examples.uvm -+incdir+${AVERY_I3C}/testsuite.i3c/dut -+incdir+${AVERY_I3C}/testsuite.i3c/dut1_1 -+incdir+${AVERY_I3C}/testsuite.i3c/dut_slave -+incdir+${AVERY_I3C}/testsuite.i3c/dut_master -+incdir+${AVERY_I3C}/testsuite.i3c/dut_master_stby -+incdir+${AVERY_I3C}/testbench ++incdir+/home${AVERY_SIM} ++incdir+/home${AVERY_SIM}/src ++incdir+/home${AVERY_SIM}/src.IEEE ++incdir+/home${AVERY_PLI} ++incdir+/home${AVERY_HOME}/aaxivip-2025.2/src.axi.VCS ++incdir+/home${AVERY_HOME}/aaxivip-2025.2/src.axi ++incdir+/home${AVERY_HOME}/aaxivip-2025.2/testbench ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/ ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/src ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/src.i3c ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/src.VCS ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/examples ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/examples.uvm ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut1_1 ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut_slave ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut_master ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testsuite.i3c/dut_master_stby ++incdir+/home${AVERY_HOME}/ai3cvip-2025.2/testbench +incdir+${CALIPTRA_SS_ROOT}/src/mci/coverage +incdir+${CALIPTRA_SS_ROOT}/src/integration/coverage +incdir+${CALIPTRA_SS_ROOT}/src/integration/testbench @@ -548,6 +548,7 @@ ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/top_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/alert_handler_reg_pkg.sv ${CALIPTRA_SS_ROOT}/src/axi_mem/rtl/axi_mem_if.sv ${CALIPTRA_SS_ROOT}/src/axi_mem/rtl/axi_mem.sv +${CALIPTRA_SS_ROOT}/src/integration/rtl/caliptra_ss_top_pkg.sv ${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/defines/css_mcu0_el2_pdef.vh ${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/design/include/css_mcu0_el2_def.sv ${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/defines/css_mcu0_common_defines.vh @@ -953,20 +954,20 @@ ${CALIPTRA_SS_ROOT}/src/integration/asserts/caliptra_ss_top_sva.sv ${CALIPTRA_SS_ROOT}/src/axi_mem/testbench/rom.sv ${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/tb/icache_macros.svh ${CALIPTRA_SS_ROOT}/src/i3c_core/../../third_party/i3c-core/src/i3c_defines.svh -${AVERY_SIM}/src/avery_pkg.sv -${AVERY_SIM}/src/avery_pkg_test.sv -${AVERY_AXI}/src.axi/aaxi_pkg.sv -${AVERY_AXI}/src.axi/aaxi_pkg_xactor.sv -${AVERY_AXI}/src.axi/aaxi_class_pll.sv -${AVERY_AXI}/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv -${AVERY_AXI}/src.VCS/aaxi_busmonitor.v -${AVERY_AXI}/src.axi/aaxi_coverage_metrics.sv -${AVERY_AXI}/src.axi/aaxi_pkg_test.sv -${AVERY_AXI}/src.axi/aaxi_intf.sv -${AVERY_I3C}/src/ai2c_pkg.sv -${AVERY_I3C}/src.i3c/ai3c_pkg.sv -${AVERY_I3C}/src/ai2c_intf.sv -${AVERY_I3C}/src.i3c/ai3c_intf.sv +/home${AVERY_SIM}/src/avery_pkg.sv +/home${AVERY_SIM}/src/avery_pkg_test.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_pkg.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_pkg_xactor.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_class_pll.sv +/home${AVERY_HOME}/aaxivip-2025.2/checker/monitor_wrapper/BP063/aaxi_monitor_wrapper.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.VCS/aaxi_busmonitor.v +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_coverage_metrics.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_pkg_test.sv +/home${AVERY_HOME}/aaxivip-2025.2/src.axi/aaxi_intf.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src/ai2c_pkg.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src.i3c/ai3c_pkg.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src/ai2c_intf.sv +/home${AVERY_HOME}/ai3cvip-2025.2/src.i3c/ai3c_intf.sv ${CALIPTRA_SS_ROOT}/src/mci/coverage/mci_top_cov_if.sv ${CALIPTRA_SS_ROOT}/src/mci/coverage/mci_top_cov_bind.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/coverage/lc_ctrl_cov_if.sv diff --git a/src/integration/config/caliptra_ss_top_w_stub.vf b/src/integration/config/caliptra_ss_top_w_stub.vf index 65ed28b02..3e9ff6473 100644 --- a/src/integration/config/caliptra_ss_top_w_stub.vf +++ b/src/integration/config/caliptra_ss_top_w_stub.vf @@ -2,6 +2,7 @@ +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/integration/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/libs/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl ++incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl +incdir+${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl +incdir+${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/design +incdir+${CALIPTRA_SS_ROOT}/src/riscv_core/veer_el2/rtl/defines @@ -10,7 +11,6 @@ +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/csrng/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/edn/rtl +incdir+${CALIPTRA_SS_ROOT}/src/tlul/rtl -+incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl +incdir+${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl +incdir+${CALIPTRA_SS_ROOT}/src/ast/rtl +incdir+${CALIPTRA_SS_ROOT}/src/fuse_ctrl/rtl @@ -103,6 +103,10 @@ ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_esc_pkg.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/caliptra_prim_count_pkg.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim/rtl/keymgr_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_reg_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_state_pkg.sv +${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_pkg.sv +${CALIPTRA_SS_ROOT}/src/integration/rtl/caliptra_ss_top_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/jtag_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/top_pkg.sv ${CALIPTRA_SS_ROOT}/src/lc_ctrl/rtl/alert_handler_reg_pkg.sv @@ -166,9 +170,6 @@ ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/edn/rtl/edn_pkg.sv ${CALIPTRA_SS_ROOT}/src/tlul/rtl/tlul_pkg.sv ${CALIPTRA_SS_ROOT}/src/tlul/rtl/tlul_assert_multiple.sv ${CALIPTRA_SS_ROOT}/src/tlul/rtl/tlul_assert.sv -${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_reg_pkg.sv -${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_state_pkg.sv -${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/lc_ctrl/rtl/lc_ctrl_pkg.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop_en.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl/caliptra_prim_generic_flop.sv ${CALIPTRA_SS_ROOT}/third_party/caliptra-rtl/src/caliptra_prim_generic/rtl/caliptra_prim_generic_buf.sv diff --git a/src/integration/config/compile.yml b/src/integration/config/compile.yml index 5f8baace1..4c4ab3648 100644 --- a/src/integration/config/compile.yml +++ b/src/integration/config/compile.yml @@ -70,10 +70,27 @@ targets: - $COMPILE_ROOT/rtl/soc_address_map/soc_address_map_defines.svh - $COMPILE_ROOT/rtl/caliptra_ss_includes.svh --- +provides: [caliptra_ss_top_pkg] +schema_version: 2.4.0 +requires: + - lc_ctrl_pkg +targets: + tb: + directories: + - $COMPILE_ROOT/rtl + files: + - $COMPILE_ROOT/rtl/caliptra_ss_top_pkg.sv + rtl: + directories: + - $COMPILE_ROOT/rtl + files: + - $COMPILE_ROOT/rtl/caliptra_ss_top_pkg.sv +--- provides: [caliptra_ss_top] schema_version: 2.4.0 requires: - caliptra_ss_top_defines + - caliptra_ss_top_pkg - caliptra_ss_lc_ctrl_pkg - css_mcu0_veer_el2_rtl_pkg - tlul_pkg diff --git a/src/integration/rtl/caliptra_ss_top.sv b/src/integration/rtl/caliptra_ss_top.sv index be891fb53..095b5a1fa 100644 --- a/src/integration/rtl/caliptra_ss_top.sv +++ b/src/integration/rtl/caliptra_ss_top.sv @@ -110,6 +110,9 @@ module caliptra_ss_top input axi_struct_pkg::axi_rd_req_t cptra_ss_lc_axi_rd_req_i, output axi_struct_pkg::axi_rd_rsp_t cptra_ss_lc_axi_rd_rsp_o, +// Caliptra SS LC Controller Raw Unlock Token (hashed) + input lc_ctrl_state_pkg::lc_token_t cptra_ss_raw_unlock_token_hashed_i, + // Caliptra SS FC / OTP Controller AXI Sub Interface input axi_struct_pkg::axi_wr_req_t cptra_ss_otp_core_axi_wr_req_i, output axi_struct_pkg::axi_wr_rsp_t cptra_ss_otp_core_axi_wr_rsp_o, @@ -1178,6 +1181,7 @@ module caliptra_ss_top .clk_i(cptra_ss_clk_i), .rst_ni(cptra_ss_rst_b_o), .lc_sec_volatile_raw_unlock_en_i(cptra_ss_lc_sec_volatile_raw_unlock_en_i), + .raw_unlock_token_hashed_i(cptra_ss_raw_unlock_token_hashed_i), .Allow_RMA_or_SCRAP_on_PPD(cptra_ss_lc_Allow_RMA_or_SCRAP_on_PPD_i), .axi_wr_req(cptra_ss_lc_axi_wr_req_i), .axi_wr_rsp(cptra_ss_lc_axi_wr_rsp_o), diff --git a/src/integration/rtl/caliptra_ss_top_pkg.sv b/src/integration/rtl/caliptra_ss_top_pkg.sv new file mode 100644 index 000000000..9d8db1432 --- /dev/null +++ b/src/integration/rtl/caliptra_ss_top_pkg.sv @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: Apache-2.0 +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +package caliptra_ss_top_pkg; + + parameter lc_ctrl_state_pkg::lc_token_t RndCnstRawUnlockTokenHashed = { + 128'h4748d3f5_358f685c_1e213794_3c8ff2b6 + }; + +endpackage diff --git a/src/integration/rtl/caliptra_ss_top_w_stub.sv b/src/integration/rtl/caliptra_ss_top_w_stub.sv index 4790919f9..a3423734a 100644 --- a/src/integration/rtl/caliptra_ss_top_w_stub.sv +++ b/src/integration/rtl/caliptra_ss_top_w_stub.sv @@ -445,6 +445,8 @@ module caliptra_ss_top_w_stub( .cptra_ss_lc_axi_rd_req_i, .cptra_ss_lc_axi_rd_rsp_o, + .cptra_ss_raw_unlock_token_hashed_i (caliptra_ss_top_pkg::RndCnstRawUnlockTokenHashed), + .cptra_ss_otp_core_axi_wr_req_i, .cptra_ss_otp_core_axi_wr_rsp_o, .cptra_ss_otp_core_axi_rd_req_i, diff --git a/src/integration/testbench/caliptra_ss_top_tb.sv b/src/integration/testbench/caliptra_ss_top_tb.sv index 5218b2c66..7a1dd9d5d 100644 --- a/src/integration/testbench/caliptra_ss_top_tb.sv +++ b/src/integration/testbench/caliptra_ss_top_tb.sv @@ -1633,6 +1633,8 @@ module caliptra_ss_top_tb .cptra_ss_lc_axi_rd_req_i, .cptra_ss_lc_axi_rd_rsp_o, + .cptra_ss_raw_unlock_token_hashed_i (caliptra_ss_top_pkg::RndCnstRawUnlockTokenHashed), + .cptra_ss_otp_core_axi_wr_req_i, .cptra_ss_otp_core_axi_wr_rsp_o, .cptra_ss_otp_core_axi_rd_req_i, diff --git a/src/lc_ctrl/rtl/lc_ctrl.sv b/src/lc_ctrl/rtl/lc_ctrl.sv index a08454a0d..595006399 100644 --- a/src/lc_ctrl/rtl/lc_ctrl.sv +++ b/src/lc_ctrl/rtl/lc_ctrl.sv @@ -38,6 +38,10 @@ module lc_ctrl // transition to RMA or SCRAP. input lc_sec_volatile_raw_unlock_en_i, // Note: This is GPIO strap pin. This pin should be high if volatile unlock wants to be // enabled. This pin should be low if volatile unlock is not needed. + + // Raw Unlock Token (hashed) + input lc_ctrl_state_pkg::lc_token_t raw_unlock_token_hashed_i, + // Clock for KMAC interface // input clk_kmac_i, // input rst_kmac_ni, @@ -173,6 +177,13 @@ module lc_ctrl import caliptra_prim_mubi_pkg::mubi8_test_true_strict; import caliptra_prim_mubi_pkg::mubi8_test_false_loose; + // Assert that the width of tokens equals the width of the `raw_unlock_token_hashed_i` input + // signal. If this assertion fails, either the lc_ctrl RTL (and hence `LcTokenWidth`) needs to be + // changed to handle an input signal of a different width, or the width of the input signal needs + // to be changed (also in all hierarchies above this module through which the signal propagates). + `CALIPTRA_ASSERT_INIT(RawUnlockTokenHashedWidth_A, + LcTokenWidth == $bits(raw_unlock_token_hashed_i)) + // AXI2TLUL interface signals tlul_pkg::tl_h2d_t regs_tl_i; tlul_pkg::tl_d2h_t regs_tl_o; @@ -915,6 +926,7 @@ module lc_ctrl .rst_ni, .Allow_RMA_or_SCRAP_on_PPD, .lc_sec_volatile_raw_unlock_en_i, + .raw_unlock_token_hashed_i ( lc_token_t'(raw_unlock_token_hashed_i) ), .init_req_i ( lc_init ), .init_done_o ( lc_done_d ), .idle_o ( lc_idle_d ), diff --git a/src/lc_ctrl/rtl/lc_ctrl_fsm.sv b/src/lc_ctrl/rtl/lc_ctrl_fsm.sv index ac1b17ef1..768523fe0 100644 --- a/src/lc_ctrl/rtl/lc_ctrl_fsm.sv +++ b/src/lc_ctrl/rtl/lc_ctrl_fsm.sv @@ -25,6 +25,7 @@ module lc_ctrl_fsm input Allow_RMA_or_SCRAP_on_PPD, input lc_sec_volatile_raw_unlock_en_i, // Note: This is GPIO strap pin. This pin should be high if volatile unlock wants to be // enabled. This pin should be low if volatile unlock is not needed. + input lc_token_t raw_unlock_token_hashed_i, // Initialization request from power manager. input init_req_i, output logic init_done_o, @@ -302,7 +303,7 @@ module lc_ctrl_fsm trans_target_i == {DecLcStateNumRep{DecLcStTestUnlocked0}} && !trans_invalid_error_o) begin // 128bit token check (without passing it through the KMAC) - if (unhashed_token_i == RndCnstRawUnlockTokenHashed) begin + if (unhashed_token_i == raw_unlock_token_hashed_i) begin // We stay in Idle, but update the life cycle state register (volatile). lc_state_d = LcStTestUnlocked0; // If the count is 0, we set it to 1 - otherwise we just leave it as is so that the @@ -701,7 +702,7 @@ module lc_ctrl_fsm {hashed_tokens_lower[ZeroTokenIdx], hashed_tokens_upper[ZeroTokenIdx]} = AllZeroTokenHashed; {hashed_tokens_lower[RawUnlockTokenIdx], - hashed_tokens_upper[RawUnlockTokenIdx]} = RndCnstRawUnlockTokenHashed; + hashed_tokens_upper[RawUnlockTokenIdx]} = raw_unlock_token_hashed_i; // This mux has two separate halves, steered with separately buffered life cycle signals. if (lc_tx_test_true_strict(test_tokens_valid[0])) begin hashed_tokens_lower[TestUnlockTokenIdx] = test_unlock_token_lower;