[ARM] Emit an error when the hard-float ABI is enabled but can't be used.

chrisnc · chrisnc · commit 990320636c8d · 2024-11-06T05:46:33.000-08:00
Currently, compiling for an eabihf target with a CPU lacking floating-point registers will silently use the soft-float ABI instead, even though the Arm attributes section still has Tag_ABI_VFP_args: VFP registers, which leads to silent ABI mismatches at link time. Update all ARM tests that were using an affected combination to enable the necessary FPU features or use a soft-float ABI. [clang] Remove the warning from clang that detected this case only if -mfloat-abi=hard or -mhard-float were specified explicitly. Fixes llvm#110383.
diff --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -459,9 +459,6 @@ def warn_drv_assuming_mfloat_abi_is : Warning<
 def warn_drv_unsupported_float_abi_by_lib : Warning<
   "float ABI '%0' is not supported by current library">,
   InGroup<UnsupportedABI>;
-def warn_drv_no_floating_point_registers: Warning<
-  "'%0': selected processor lacks floating point registers">,
-  InGroup<UnsupportedABI>;
 def warn_ignoring_ftabstop_value : Warning<
   "ignoring invalid -ftabstop value '%0', using default value %1">;
 def warn_drv_overriding_option : Warning<
diff --git a/clang/lib/Driver/ToolChains/Arch/ARM.cpp b/clang/lib/Driver/ToolChains/Arch/ARM.cpp
@@ -158,22 +158,6 @@ static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
         << A->getSpelling() << A->getValue();
 }
 
-// If -mfloat-abi=hard or -mhard-float are specified explicitly then check that
-// floating point registers are available on the target CPU.
-static void checkARMFloatABI(const Driver &D, const ArgList &Args,
-                             bool HasFPRegs) {
-  if (HasFPRegs)
-    return;
-  const Arg *A =
-      Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
-                      options::OPT_mfloat_abi_EQ);
-  if (A && (A->getOption().matches(options::OPT_mhard_float) ||
-            (A->getOption().matches(options::OPT_mfloat_abi_EQ) &&
-             A->getValue() == StringRef("hard"))))
-    D.Diag(clang::diag::warn_drv_no_floating_point_registers)
-        << A->getAsString(Args);
-}
-
 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
   // The backend is hardwired to assume AAPCS for M-class processors, ensure
   // the frontend matches that.
@@ -985,8 +969,6 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver &D,
   if (Args.getLastArg(options::OPT_mno_bti_at_return_twice))
     Features.push_back("+no-bti-at-return-twice");
 
-  checkARMFloatABI(D, Args, HasFPRegs);
-
   return FPUKind;
 }
 
diff --git a/clang/test/Driver/arm-float-abi-lto.c b/clang/test/Driver/arm-float-abi-lto.c
@@ -4,7 +4,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=full -c -o %t.call_full.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=full -c -o %t.define_full.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_full -save-temps %t.call_full.bc %t.define_full.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_full -save-temps %t.call_full.bc %t.define_full.bc \
 // RUN:  -r %t.call_full.bc,fn,px \
 // RUN:  -r %t.call_full.bc,fwrite,l \
 // RUN:  -r %t.call_full.bc,putchar,l \
@@ -16,7 +16,7 @@
 
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=thin -c -o %t.call_thin.bc -DCALL_LIB
 // RUN: %clang --target=arm-none-eabi -mcpu=cortex-m33 -mfloat-abi=hard -O1 %s -flto=thin -c -o %t.define_thin.bc -DDEFINE_LIB
-// RUN: llvm-lto2 run -o %t.lto_thin -save-temps %t.call_thin.bc %t.define_thin.bc \
+// RUN: llvm-lto2 run --mcpu=cortex-m33 --float-abi=hard -o %t.lto_thin -save-temps %t.call_thin.bc %t.define_thin.bc \
 // RUN:  -r %t.call_thin.bc,fn,px \
 // RUN:  -r %t.call_thin.bc,fwrite,l \
 // RUN:  -r %t.call_thin.bc,putchar,l \
diff --git a/clang/test/Driver/arm-no-float-regs.c b/clang/test/Driver/arm-no-float-regs.c
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -311,11 +311,15 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
     // function that reside in TargetOptions.
     resetTargetOptions(F);
     I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
-                                        F.hasMinSize());
+                                       F.hasMinSize());
 
     if (!I->isThumb() && !I->hasARMOps())
       F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
           "instructions, but the target does not support ARM mode execution.");
+
+    if (I->isTargetHardFloat() && !I->hasFPRegs())
+      F.getContext().emitError("The hard-float ABI is enabled, but the target "
+                               "lacks floating-point registers.");
   }
 
   return I.get();
diff --git a/llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll b/llvm/test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll
@@ -1,5 +1,5 @@
 ;PR15293: ARM codegen ice - expected larger existing stack allocation
-;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
 
 ;CHECK-LABEL: foo:
 ;CHECK: 	sub	sp, sp, #16
diff --git a/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll b/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll
@@ -1,5 +1,5 @@
 ;PR15293: ARM codegen ice - expected larger existing stack allocation
-;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
 
 %struct.S227 = type { [49 x i32], i32 }
 
diff --git a/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll b/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll
@@ -1,5 +1,5 @@
 ;PR15293: ARM codegen ice - expected larger existing stack allocation
-;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+;RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
 
 %struct4bytes = type { i32 }
 %struct20bytes = type { i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll b/llvm/test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
+; RUN: llc -mtriple=arm-linux-gnueabi < %s | FileCheck %s
 
 %struct4bytes = type { i32 }
 %struct8bytes8align = type { i64 }
diff --git a/llvm/test/CodeGen/ARM/arm-eabi.ll b/llvm/test/CodeGen/ARM/arm-eabi.ll
@@ -1,31 +1,31 @@
 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=gnu -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI
 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=4 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-eabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-eabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+fpregs -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-androideabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+fpregs -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 ; RUN: llc < %s -mtriple=arm-none-musleabi -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
-; RUN: llc < %s -mtriple=arm-none-musleabihf -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+fpregs -meabi=5 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI
 
 %struct.my_s = type { [18 x i32] }
 
diff --git a/llvm/test/CodeGen/ARM/block-order.mir b/llvm/test/CodeGen/ARM/block-order.mir
@@ -1,6 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabihf -run-pass=block-placement -verify-machineinstrs | FileCheck %s
-# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabihf -run-pass=block-placement -force-loop-cold-block -verify-machineinstrs | FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabi -run-pass=block-placement -verify-machineinstrs | FileCheck %s
+# RUN: llc -o - %s -mtriple=thumbv7em-arm-none-eabi -run-pass=block-placement -force-loop-cold-block -verify-machineinstrs | FileCheck %s
 ---
 name:            fn
 tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/ARM/constantpool-promote.ll b/llvm/test/CodeGen/ARM/constantpool-promote.ll
@@ -1,15 +1,15 @@
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-STATIC
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-PIC
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
-; RUN: llc -mtriple armv7--linux-gnueabihf -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv7--linux-gnueabihf -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
-; RUN: llc -mtriple thumbv6m--linux-gnueabihf -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-STATIC
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM,CHECK-PIC
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
+; RUN: llc -mtriple armv7-linux-gnueabi -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7ARM
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv7-linux-gnueabi -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V7,CHECK-V7THUMB
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=static -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=pic -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=ropi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
+; RUN: llc -mtriple thumbv6m-none-eabi -relocation-model=rwpi -arm-promote-constant < %s | FileCheck %s --check-prefixes=CHECK,CHECK-V6M
 
 @.str = private unnamed_addr constant [2 x i8] c"s\00", align 1
 @.str1 = private unnamed_addr constant [69 x i8] c"this string is far too long to fit in a literal pool by far and away\00", align 1
diff --git a/llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll b/llvm/test/CodeGen/ARM/eabihf-no-float-regs.ll
@@ -0,0 +1,15 @@
+; RUN: llc -asm-verbose=false --mtriple=armv7-none-eabihf --mattr=+vfp3 < %s | FileCheck %s --check-prefix=CHECK-VFP
+; RUN: llc -asm-verbose=false --mtriple=armv7-none-eabi --mattr=-fpregs < %s | FileCheck %s -check-prefix=CHECK-NOVFP
+; RUN: not llc -asm-verbose=false --mtriple=armv7-none-eabihf --mattr=-fpregs < %s 2>&1 | FileCheck %s -check-prefix=CHECK-ERROR -check-prefix=CHECK-NOVFP
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
+
+; CHECK-VFP: vadd.f32
+; CHECK-ERROR: error: The hard-float ABI is enabled, but the target lacks floating-point registers.
+; CHECK-NOVFP: bl __aeabi_fadd
+define float @test_fadd(float %a, float %b) #0 {
+  %r = fadd float %a, %b
+  ret float %r
+}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/ARM/fp16-promote.ll b/llvm/test/CodeGen/ARM/fp16-promote.ll
@@ -1,9 +1,8 @@
-; RUN: llc -asm-verbose=false < %s -mattr=+vfp3,+fp16 | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FP16  --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
-; RUN: llc -asm-verbose=false < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL --check-prefix=CHECK-LIBCALL-VFP
-; RUN: llc -asm-verbose=false < %s -mattr=-fpregs | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-LIBCALL -check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
+; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabihf --mattr=+vfp3,+fp16 | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FP16  --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL
+; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabihf | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-LIBCALL --check-prefix=CHECK-VFP -check-prefix=CHECK-ALL --check-prefix=CHECK-LIBCALL-VFP
+; RUN: llc -asm-verbose=false < %s --mtriple=armv7-none-eabi --mattr=-fpregs | FileCheck -allow-deprecated-dag-overlap %s --check-prefix=CHECK-LIBCALL -check-prefix=CHECK-NOVFP -check-prefix=CHECK-ALL
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
-target triple = "armv7---eabihf"
 
 ; CHECK-ALL-LABEL: test_fadd:
 ; CHECK-FP16: vcvtb.f32.f16
diff --git a/llvm/test/CodeGen/ARM/macho-extern-hidden.ll b/llvm/test/CodeGen/ARM/macho-extern-hidden.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7em-apple-unknown-macho | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv7-apple-unknown-macho | FileCheck %s
 
 ; CHECK: movw   r0, :lower16:(L_bar$non_lazy_ptr-(LPC0_0+4))
 ; CHECK: movt   r0, :upper16:(L_bar$non_lazy_ptr-(LPC0_0+4))
diff --git a/llvm/test/CodeGen/ARM/memfunc.ll b/llvm/test/CodeGen/ARM/memfunc.ll
@@ -1,12 +1,12 @@
 ; RUN: llc < %s -mtriple=armv7-apple-ios -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-IOS --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=thumbv7m-none-macho -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-DARWIN --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-eabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-eabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-eabihf -mattr=+vfp3 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-androideabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-EABI --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-gnueabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-gnueabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-gnueabihf -mattr=+vfp3 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
 ; RUN: llc < %s -mtriple=arm-none-musleabi -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
-; RUN: llc < %s -mtriple=arm-none-musleabihf -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
+; RUN: llc < %s -mtriple=arm-none-musleabihf -mattr=+vfp3 -disable-post-ra -o - | FileCheck %s --check-prefix=CHECK-GNUEABI --check-prefix=CHECK
 
 define void @f1(ptr %dest, ptr %src) "frame-pointer"="all" {
 entry:
diff --git a/llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll b/llvm/test/CodeGen/ARM/no-expand-memcpy-no-builtins.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=thumbv7em-apple-unknown-macho < %s | FileCheck %s
+; RUN: llc -mtriple=thumbv7em-apple-unknown-macho -mattr=+vfp3 < %s | FileCheck %s
 
 target datalayout = "e-m:o-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
 
diff --git a/llvm/test/CodeGen/ARM/readtp.ll b/llvm/test/CodeGen/ARM/readtp.ll
diff --git a/llvm/test/CodeGen/ARM/subtarget-align.ll b/llvm/test/CodeGen/ARM/subtarget-align.ll
diff --git a/llvm/test/CodeGen/Thumb2/emit-unwinding.ll b/llvm/test/CodeGen/Thumb2/emit-unwinding.ll
diff --git a/llvm/test/DebugInfo/COFF/jump-table.ll b/llvm/test/DebugInfo/COFF/jump-table.ll
diff --git a/llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir b/llvm/test/DebugInfo/MIR/ARM/dbgcallsite-noreg-is-imm-check.mir

Original file line number	Diff line number	Diff line change
`@@ -1,4 +1,4 @@`
`1`		`-; RUN: llc -mtriple=arm-linux-gnueabihf < %s \| FileCheck %s`
	`1`	`+; RUN: llc -mtriple=arm-linux-gnueabi < %s \| FileCheck %s`
`2`	`2`
`3`	`3`	`%struct4bytes = type { i32 }`
`4`	`4`	`%struct8bytes8align = type { i64 }`