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Test IA32_PACKAGE_THERM_INTERRUPT before clearing Package Log bits
1 parent 1119d6d commit 0ac6c83

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2 files changed

+55
-49
lines changed

2 files changed

+55
-49
lines changed

corefreqk.c

Lines changed: 48 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -6704,56 +6704,60 @@ void ThermalMonitor_Set(CORE_RO *Core)
67046704
RDMSR(ThermStatus, MSR_IA32_THERM_STATUS);
67056705
}
67066706
}
6707-
Core->PowerThermal.Events = ( (ThermStatus.StatusBit
6708-
|ThermStatus.StatusLog ) << 0)
6709-
| (ThermStatus.PROCHOTLog << 1)
6710-
| (ThermStatus.CriticalTempLog << 2)
6711-
| ( (ThermStatus.Threshold1Log
6712-
|ThermStatus.Threshold2Log ) << 3)
6713-
| (ThermStatus.PwrLimitLog << 4)
6714-
| (ThermStatus.CurLimitLog << 5)
6715-
| (ThermStatus.XDomLimitLog << 6);
6707+
Core->PowerThermal.Events = \
6708+
( (ThermStatus.StatusBit | ThermStatus.StatusLog ) << 0 )
6709+
| (ThermStatus.PROCHOTLog << 1)
6710+
| (ThermStatus.CriticalTempLog << 2)
6711+
| ((ThermStatus.Threshold1Log | ThermStatus.Threshold2Log) << 3)
6712+
| (ThermStatus.PwrLimitLog << 4)
6713+
| (ThermStatus.CurLimitLog << 5)
6714+
| (ThermStatus.XDomLimitLog << 6);
6715+
6716+
if (PUBLIC(RO(Proc))->Features.Power.EAX.PTM
6717+
&& (Core->Bind == PUBLIC(RO(Proc))->Service.Core))
6718+
{
6719+
ClearBit = 0;
6720+
ThermStatus.value = 0;
6721+
RDMSR(ThermStatus, MSR_IA32_PACKAGE_THERM_STATUS);
67166722

6717-
if (PUBLIC(RO(Proc))->Features.Power.EAX.PTM
6718-
&& (Core->Bind == PUBLIC(RO(Proc))->Service.Core))
6723+
if (Clear_Events & EVENT_THERM_SENSOR) {
6724+
ThermStatus.StatusLog = 0;
6725+
ClearBit = 1;
6726+
}
6727+
if (Clear_Events & EVENT_THERM_PROCHOT) {
6728+
ThermStatus.PROCHOTLog = 0;
6729+
ClearBit = 1;
6730+
}
6731+
if (Clear_Events & EVENT_THERM_CRIT) {
6732+
ThermStatus.CriticalTempLog = 0;
6733+
ClearBit = 1;
6734+
}
6735+
if (Clear_Events & EVENT_THERM_THOLD) {
6736+
ThermStatus.Threshold1Log = 0;
6737+
ThermStatus.Threshold2Log = 0;
6738+
ClearBit = 1;
6739+
}
6740+
if (Clear_Events & EVENT_POWER_LIMIT) {
6741+
ThermStatus.PwrLimitLog = 0;
6742+
ClearBit = 1;
6743+
}
6744+
if (ClearBit)
67196745
{
6720-
ClearBit = 0;
6721-
ThermStatus.value = 0;
6722-
RDMSR(ThermStatus, MSR_IA32_PACKAGE_THERM_STATUS);
6723-
6724-
if (Clear_Events & EVENT_THERM_SENSOR) {
6725-
ThermStatus.StatusLog = 0;
6726-
ClearBit = 1;
6727-
}
6728-
if (Clear_Events & EVENT_THERM_PROCHOT) {
6729-
ThermStatus.PROCHOTLog = 0;
6730-
ClearBit = 1;
6731-
}
6732-
if (Clear_Events & EVENT_THERM_CRIT) {
6733-
ThermStatus.CriticalTempLog = 0;
6734-
ClearBit = 1;
6735-
}
6736-
if (Clear_Events & EVENT_THERM_THOLD) {
6737-
ThermStatus.Threshold1Log = 0;
6738-
ThermStatus.Threshold2Log = 0;
6739-
ClearBit = 1;
6740-
}
6741-
if (Clear_Events & EVENT_POWER_LIMIT) {
6742-
ThermStatus.PwrLimitLog = 0;
6743-
ClearBit = 1;
6744-
}
6745-
if (ClearBit) {
6746+
THERM_INTERRUPT ThermInterrupt = {.value = 0};
6747+
RDMSR(ThermInterrupt, MSR_IA32_PACKAGE_THERM_INTERRUPT);
6748+
if (!(ThermInterrupt.High_Temp_Int|ThermInterrupt.Low_Temp_Int))
6749+
{
67466750
WRMSR(ThermStatus, MSR_IA32_PACKAGE_THERM_STATUS);
67476751
RDMSR(ThermStatus, MSR_IA32_PACKAGE_THERM_STATUS);
67486752
}
6749-
PUBLIC(RO(Proc))->PowerThermal.Events = ((ThermStatus.StatusBit
6750-
|ThermStatus.StatusLog) << 0)
6751-
| (ThermStatus.PROCHOTLog << 1)
6752-
| (ThermStatus.CriticalTempLog << 2)
6753-
| ( (ThermStatus.Threshold1Log
6754-
|ThermStatus.Threshold2Log)<< 3)
6755-
| (ThermStatus.PwrLimitLog << 4);
67566753
}
6754+
PUBLIC(RO(Proc))->PowerThermal.Events = \
6755+
( (ThermStatus.StatusBit | ThermStatus.StatusLog) << 0 )
6756+
| (ThermStatus.PROCHOTLog << 1)
6757+
| (ThermStatus.CriticalTempLog << 2)
6758+
| ((ThermStatus.Threshold1Log | ThermStatus.Threshold2Log) << 3)
6759+
| (ThermStatus.PwrLimitLog << 4);
6760+
}
67576761

67586762
RDMSR(PfInfo, MSR_PLATFORM_INFO);
67596763

intelmsr.h

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1096,7 +1096,7 @@ typedef union
10961096
} CORE_FIXED_PERF_CONTROL;
10971097

10981098
typedef union
1099-
{ /* R/W: IA32_THERM_INTERRUPT(19Bh) Core or Unique scope */
1099+
{ /* R/W: IA32_{PACKAGE_}THERM_INTERRUPT(19Bh{1B2h}) Core|Unique scope */
11001100
unsigned long long value;
11011101
struct
11021102
{
@@ -1111,13 +1111,14 @@ typedef union
11111111
Threshold1_Int : 16-15,
11121112
Threshold2_Value: 23-16,
11131113
Threshold2_Int : 24-23,
1114-
PLN_Enable : 25-24, /* Power Limit Notification */
1115-
ReservedBits2 : 64-25;
1114+
PLN_Enable : 25-24, /* Power Limit Notification */
1115+
HWP_Interrupt : 26-25, /* IA32_PACKAGE_THERM_INTERRUPT */
1116+
ReservedBits2 : 64-26;
11161117
};
11171118
} THERM_INTERRUPT;
11181119

11191120
typedef union
1120-
{
1121+
{ /* R/O-R/WC0: IA32_{PACKAGE_}THERM_STATUS(19Ch{1B1h}) */
11211122
unsigned long long value;
11221123
struct
11231124
{
@@ -1139,7 +1140,8 @@ typedef union
11391140
XDomLimitStatus : 15-14, /* HWP Feedback */
11401141
XDomLimitLog : 16-15, /* HWP Feedback */
11411142
DTS : 23-16,
1142-
ReservedBits1 : 27-23,
1143+
ReservedBits1 : 26-23,
1144+
HWP_Status : 27-26, /* IA32_PACKAGE_THERM_STATUS */
11431145
Resolution : 31-27,
11441146
ReadingValid : 32-31,
11451147
ReservedBits2 : 64-32;

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