[vm] Update CPU register comments on runtime/vm/constants_<arch>.h

TEST=ci

Change-Id: Ibc2225314a18818ac14c8b3047c369017e524210
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/273140
Commit-Queue: Martin Kustermann <[email protected]>
Reviewed-by: Tess Strickland <[email protected]>

Author: mkustermann

runtime/vm/constants_arm.h

@@ -89,12 +89,12 @@ enum Register {
   R3 = 3,
   R4 = 4,
   R5 = 5,  // PP
-  R6 = 6,  // CODE
-  R7 = 7,  // iOS FP
+  R6 = 6,  // CODE_REG
+  R7 = 7,  // FP on iOS, DISPATCH_TABLE_REG on non-iOS (AOT only)
   R8 = 8,
   R9 = 9,
   R10 = 10,  // THR
-  R11 = 11,  // Linux/Android/Windows FP
+  R11 = 11,  // FP on non-iOS, DISPATCH_TABLE_REG on iOS (AOT only)
   R12 = 12,  // IP aka TMP
   R13 = 13,  // SP
   R14 = 14,  // LR

runtime/vm/constants_arm64.h

@@ -53,10 +53,10 @@ enum Register {
   R18 = 18,  // reserved on iOS, shadow call stack on Fuchsia, TEB on Windows.
   R19 = 19,
   R20 = 20,
-  R21 = 21,  // DISPATCH_TABLE_REG
+  R21 = 21,  // DISPATCH_TABLE_REG (AOT only)
   R22 = 22,  // NULL_REG
   R23 = 23,
-  R24 = 24,
+  R24 = 24,  // CODE_REG
   R25 = 25,
   R26 = 26,  // THR
   R27 = 27,  // PP