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SVA-to-Buechi: s_always
This adds conversion for SVA s_always to the SVA-to-Buechi translation.
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2 files changed

+24
-1
lines changed

2 files changed

+24
-1
lines changed
Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
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KNOWNBUG
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../../verilog/SVA/s_always1.sv
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--buechi --bound 20
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^\[main\.p0\] s_always \[0:9\] main\.x < 10: PROVED up to bound 20$
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^\[main\.p1\] not \(s_always \[0:9\] main\.x < 10\): REFUTED$
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^EXIT=10$
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^SIGNAL=0$
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--
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^warning: ignoring
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--
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main.p1 is not refuted.

src/temporal-logic/ltl_sva_to_string.cpp

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,19 @@ ltl_sva_to_stringt::rec(const exprt &expr, modet mode)
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}
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else if(expr.id() == ID_sva_s_always)
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{
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throw ebmc_errort{} << "cannot convert " << expr.id() << " to Buechi";
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auto &always = to_sva_s_always_expr(expr);
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auto new_expr = unary_exprt{ID_sva_s_always, always.op()};
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auto from = numeric_cast_v<mp_integer>(always.from());
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if(!always.is_range())
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return prefix("G[" + integer2string(from) + "]", new_expr, mode);
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else
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{
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auto to = numeric_cast_v<mp_integer>(always.to());
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return prefix(
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"G[" + integer2string(from) + ":" + integer2string(to) + "]",
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new_expr,
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mode);
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}
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}
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else if(expr.id() == ID_sva_s_eventually)
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{

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