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Merge pull request NETMF#1 from doingnz/ARM_DS5
Merge in support for Arm DS5 toolset.
2 parents c2affe0 + 7cbf6a3 commit 8c84532

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16 files changed

+1586
-9
lines changed

16 files changed

+1586
-9
lines changed

DeviceCode/Targets/Native/STM32/STM32.settings

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@@ -19,7 +19,10 @@
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<PropertyGroup>
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<OEMSystemInfoString>Copyright Oberon microsystems, Inc.</OEMSystemInfoString>
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</PropertyGroup>
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<PropertyGroup Condition="'$(COMPILER_TOOL)'=='DS5'">
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<DEVICE_TYPE Condition="'$(DEVICE_TYPE)' == ''">Cortex-M3</DEVICE_TYPE>
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<BUILD_TOOL_GUID>{F7823E3C-8BCE-4D9A-AD56-9E06063C47CD}</BUILD_TOOL_GUID>
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</PropertyGroup>
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<PropertyGroup Condition="'$(COMPILER_TOOL)'=='RVDS'">
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<DEVICE_TYPE Condition="'$(DEVICE_TYPE)' == ''">Cortex-M3</DEVICE_TYPE>
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<BUILD_TOOL_GUID>{1942C531-3AAC-4abb-8B4F-C3111012F9D9}</BUILD_TOOL_GUID>

DeviceCode/Targets/Native/STM32F4/STM32F2.settings

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<ItemGroup>
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<CC_CPP_Defines Include="__CORTEX_M3" />
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</ItemGroup>
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<PropertyGroup Condition="'$(COMPILER_TOOL)'=='DS5'">
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<DEVICE_TYPE Condition="'$(DEVICE_TYPE)' == ''">Cortex-M3</DEVICE_TYPE>
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<BUILD_TOOL_GUID>{F7823E3C-8BCE-4D9A-AD56-9E06063C47CD}</BUILD_TOOL_GUID>
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</PropertyGroup>
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<PropertyGroup Condition="'$(COMPILER_TOOL)'=='RVDS'">
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<DEVICE_TYPE Condition="'$(DEVICE_TYPE)' == ''">Cortex-M3</DEVICE_TYPE>
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<BUILD_TOOL_GUID>{1942C531-3AAC-4abb-8B4F-C3111012F9D9}</BUILD_TOOL_GUID>

DeviceCode/Targets/Native/STM32F4/STM32F4.settings

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@@ -20,7 +20,10 @@
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<CC_CPP_Defines Include="__CORTEX_M4F" />
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<CC_CPP_Defines Include="CORTEX_M4" />
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</ItemGroup>
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<PropertyGroup Condition="'$(COMPILER_TOOL)'=='DS5'">
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<DEVICE_TYPE Condition="'$(DEVICE_TYPE)' == ''">Cortex-M3</DEVICE_TYPE>
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<BUILD_TOOL_GUID>{F7823E3C-8BCE-4D9A-AD56-9E06063C47CD}</BUILD_TOOL_GUID>
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</PropertyGroup>
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<PropertyGroup Condition="'$(COMPILER_TOOL)'=='RVDS'">
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<DEVICE_TYPE Condition="'$(DEVICE_TYPE)' == ''">Cortex-M4.fp</DEVICE_TYPE>
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<BUILD_TOOL_GUID>{00C50096-00DD-00E7-BBA9-7FC84D408562}</BUILD_TOOL_GUID>

Framework/Tools/BuildTasks/ScatterFile.cs

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@@ -573,7 +573,7 @@ internal object Parse( System.Xml.XmlNode node )
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string name = node.Name;
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IParse o = null;
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if (GetVariable("COMPILER_TOOL").ToUpper() == "RVDS" || GetVariable("COMPILER_TOOL").ToUpper() == "MDK")
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if (GetVariable("COMPILER_TOOL").ToUpper() == "RVDS" || GetVariable("COMPILER_TOOL").ToUpper() == "MDK" || GetVariable("COMPILER_TOOL").ToUpper() == "DS5")
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{
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if (name == "ScatterFile") o = new Group();
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else if (name == "Set") o = new Variable();
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<?xml version="1.0"?>
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<ScatterFile xmlns="http://schemas.microsoft.com/netmf/ScatterfileSchema.xsd">
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<!-- Freescale MC9328L, NO SRAM, SDRAM 32M/64M -->
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<Set Name="Valid" Value="false"/>
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<!-- ################################################################################ -->
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<Set Name="Heap_Begin" Value="0x08100000"/>
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<Set Name="Heap_End" Value="0x084FFFF8"/>
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<Set Name="Stack_Bottom" Value="+0"/>
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<Set Name="Stack_Top" Value="0x08502000"/>
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<If Name="TARGETLOCATION" In="FLASH">
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<!-- iMXS has 8MB of 32-bit FLASH at 0x10000000 -->
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<Set Name="Code_BaseAddress" Value="0x10000000"/>
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<Set Name="Code_Size" Value="0x00020000"/>
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<Set Name="RAM_RO_Base" Value="0x00000000"/>
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<Set Name="Valid" Value="true"/>
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</If>
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<If Name="TARGETLOCATION" In="RAM">
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<Set Name="Code_BaseAddress" Value="0x08200000"/>
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<Set Name="Code_Size" Value="0x00030000"/>
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<Set Name="RAM_RO_Base" Value="+0"/>
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<Set Name="Valid" Value="true"/>
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</If>
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<!-- ################################################################################ -->
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<If Name="Valid" Value="false">
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<Error Message="Configuration not recognized"/>
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</If>
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<!-- we start at 0x10080000 since PortBooter lives at 0x10000000 -->
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<!-- the address and sizes for both load regions (LR_*) are chosen to start and completely fill a flash partition in the 28F320W18 flash chip -->
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<LoadRegion Name="LR_%TARGETLOCATION%" Base="%Code_BaseAddress%" Options="ABSOLUTE" Size="%Code_Size%">
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<!-- we have arbitrarily asigned 0x00080000 offset in FLASH for the CLR code, and size of 0x00080000 -->
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<ExecRegion Name="ER_%TARGETLOCATION%" Base="%Code_BaseAddress%" Options="FIXED" Size="">
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<FileMapping Name="FirstEntry.obj" Options="(+RO, +FIRST)" /> <!-- the entry pointer section goes into this region -->
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<FileMapping Name="*" Options="(SectionForBootstrapOperations)" />
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<FileMapping Name="*" Options="(+RO)" />
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</ExecRegion>
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<!-- skip vector area -->
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<ExecRegion Name="ER_RAM_RO" Base="%RAM_RO_Base%" Options="ABSOLUTE" Size="">
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<FileMapping Name="VectorsTrampolines.obj" Options="(+RO, +FIRST)" /> <!-- for vector handlers to be far from the vectors -->
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<FileMapping Name="*" Options="(i.IDelayLoop)" Comment="00004a98 24 16 IDelayLoop" />
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<FileMapping Name="*" Options="(i._Z23Time_Sleep_MicroSecondsj)" Comment="_Z23Time_Sleep_MicroSecondsj" />
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<FileMapping Name="*" Options="(i._Z40Time_Sleep_MicroSeconds_InterruptEnabledj)" Comment="_Z40Time_Sleep_MicroSeconds_InterruptEnabledj" />
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<FileMapping Name="*" Options="(i._Z23CPU_MicrosecondsToTicksj)" Comment="_Z23CPU_MicrosecondsToTicksj" />
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<FileMapping Name="*" Options="(i._Z17Events_MaskedReadj)" Comment="000070ec 20 20787 Events_MaskedRead__FUi" />
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<FileMapping Name="*" Options="(i._ZN16MC9328MXL_Driver5PauseEv)" />
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<FileMapping Name="*" Options="(i._ZN21MC9328MXL_TIME_Driver12CounterValueEv)" Comment="00007840 40 712150 _ZN21MC9328MXL_TIME_Driver12CounterValueEv" />
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<FileMapping Name="*" Options="(i._ZN21MC9328MXL_AITC_Driver17ActivateInterruptEjjPFvPvES0_h)" Comment="00007604 76 231095 _ZN21MC9328MXL_AITC_Driver17ActivateInterruptEjjPFvPvES0_h" />
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<FileMapping Name="*" Options="(i._ZN21MC9328MXL_AITC_Driver19DeactivateInterruptEj)" Comment="00007604 76 231095 _ZN21MC9328MXL_AITC_Driver19DeactivateInterruptEj" />
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<FileMapping Name="*" Options="(i._ZN21MC9328MXL_TIME_Driver15SetCompareValueEy)" Comment="00007868 96 181492 _ZN21MC9328MXL_TIME_Driver15SetCompareValueEy" />
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<FileMapping Name="*" Options="(i._ZN21MC9328MXL_TIME_Driver11CurrentTimeEv)" Comment="000079d0 88 94500 _ZN21MC9328MXL_TIME_Driver11CurrentTimeEv" />
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<FileMapping Name="*" Options="(i._ZN25MC9328MXL_WATCHDOG_Driver12ResetCounterEv)" Comment="00007adc 24 22218 _ZN25MC9328MXL_WATCHDOG_Driver12ResetCounterEv" />
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<FileMapping Name="*" Options="(i._Z18SUPPORT_ComputeCRCPKvij)" Comment="00006654 72 1709347 SUPPORT_ComputeCRC__FPCviUi" />
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<FileMapping Name="rt_sdiv.o" Options="(+RO)" />
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<FileMapping Name="rt_memclr.o" Options="(+RO)" />
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<FileMapping Name="rt_memclr_w.o" Options="(+RO)" />
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<FileMapping Name="rt_memcpy.o" Options="(+RO)" />
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<FileMapping Name="rt_memcpy_w.o" Options="(+RO)" />
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<FileMapping Name="llshl.o" Options="(+RO)" />
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<FileMapping Name="llsdiv.o" Options="(+RO)" />
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<FileMapping Name="llushr.o" Options="(+RO)" />
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<FileMapping Name="lludiv.o" Options="(+RO)" />
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<FileMapping Name="*" Options="(SectionForFlashOperations)" />
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</ExecRegion>
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<ExecRegion Name="ER_RAM_RW" Base="+0" Options="ABSOLUTE" Size="">
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<FileMapping Name="*" Options="(+RW-DATA, +ZI)" />
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</ExecRegion>
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<ExecRegion Name="ER_HEAP_BEGIN" Base="%Heap_Begin%" Options="ABSOLUTE" Size="UNINIT">
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<FileMapping Name="*" Options="(SectionForHeapBegin)" />
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</ExecRegion>
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<!-- everything between heapbegin and heapend will be allocated for a heap -->
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<ExecRegion Name="ER_HEAP_END" Base="%Heap_End%" Options="ABSOLUTE" Size="UNINIT">
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<FileMapping Name="*" Options="(SectionForHeapEnd)" />
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</ExecRegion>
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<ExecRegion Name="ER_STACK_BOTTOM" Base="%Stack_Bottom%" Options="ABSOLUTE" Size="UNINIT">
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<FileMapping Name="*" Options="(SectionForStackBottom)" />
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</ExecRegion>
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<ExecRegion Name="ER_STACK_TOP" Base="%Stack_Top%" Options="ABSOLUTE" Size="UNINIT">
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<FileMapping Name="*" Options="(SectionForStackTop)" />
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</ExecRegion>
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</LoadRegion>
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</ScatterFile>
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<?xml version="1.0"?>
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<ScatterFile xmlns="http://schemas.microsoft.com/netmf/ScatterfileSchema.xsd">
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<!-- STM32F4 with 1M Flash, 128k SRAM, and 64k DATA CCM -->
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<Set Name="Valid" Value="false"/>
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<!-- ################################################################################ -->
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<!-- Memory Region base and size values for physical hardware to help clarify the mapping
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by making Symbolic names available instead of a bunch of numbers. These values are
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fixed in hardware and therefore, don't change.
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-->
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<!-- Internal FLASH -->
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<Set Name="IFLASH_BaseAddress" Value="0x08000000"/>
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<Set Name="IFLASH_Size" Value="0x00100000"/><!-- 1MB -->
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<!-- Core Coupled Memory (CCM) [D-Bus] -->
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<Set Name="CCM_BaseAddress" Value="0x10000000"/>
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<Set Name="CCM_Size" Value="0x00010000"/><!-- 64KB -->
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<!-- Internal SRAM -->
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<Set Name="IRAM_BaseAddress" Value="0x20000000"/>
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<Set Name="IRAM_Size" Value="0x00020000"/><!-- 128KB -->
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<!-- External NOR Flash-->
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<Set Name="NOR_BaseAddress" Value="0x60000000"/>
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<Set Name="NOR_Size" Value="0x00800000"/><!-- 8MB -->
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<!-- External SRAM -->
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<Set Name="EXTRAM_BaseAddress" Value="0x68000000"/>
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<Set Name="EXTRAM_Size" Value="0x00200000"/><!-- 2MB -->
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<!-- Solution specific usage settings -->
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<!-- Internal CCM (D-Bus) -->
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<!-- Put Stack in CCM for high speed access, reducing overhead of stack usage -->
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<Set Name="Stack_Bottom" Value="%CCM_BaseAddress%"/>
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<!-- External SRAM -->
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<Set Name="Heap_BaseAddress" Value="%EXTRAM_BaseAddress%"/>
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<!-- External NOR FLASH -->
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<!-- Configuration section is at base of external NOR flash
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This needs to be in the same block storage device as the
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deployment region to enable the MFDeploy to access it.
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( Due to device side library implementation limit )
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-->
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<Set Name="Config_BaseAddress" Value="%NOR_BaseAddress%"/>
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<Set Name="Config_Size" Value="0x00010000"/><!-- 64KB -->
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<!-- DAT region goes into external NOR Flash -->
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<Set Name="Data_BaseAddress" Value="%Config_BaseAddress% + %Config_Size%"/>
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<Set Name="Data_Size" Value="0x00020000"/><!-- 128KB -->
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<!-- Deployment fills the rest of external NOR flash... -->
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<!-- Internal FLASH -->
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<!-- TinyBooter sits at power on Reset vector-->
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<Set Name="BooterCode_BaseAddress" Value="%IFLASH_BaseAddress%"/>
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<Set Name="BooterCode_Size" Value="0x00010000"/><!-- 64KB -->
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<If Name="TARGETLOCATION" Value="FLASH">
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<!-- Internal FLASH -->
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<!-- Native Code section -->
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<Set Name="Code_BaseAddress" Value="%BooterCode_BaseAddress%"/>
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<Set Name="Code_Size" Value="%BooterCode_Size%"/>
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<!-- =========================================================== -->
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<If Name="TARGETTYPE" Value="Release">
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<!-- ALL of external RAM is enabled for the CLR HEAP -->
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<Set Name="Heap_Size" Value="0x00080000"/><!-- 512K -->
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<Set Name="CustomHeap_Size" Value="0x00080000"/><!-- 512K -->
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<Set Name="Valid" Value="true"/>
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</If>
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<If Name="TARGETTYPE" Value="Debug">
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<!-- Use only 1MB of external RAM for Debug builds.
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Can't use all of external RAM as the address pins overlap
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with the SWD pins used for ETM tracing in Debug builds.
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-->
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<Set Name="Heap_Size" Value="0x00100000"/><!--1MB-->
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<Set Name="CustomHeap_Size" Value="0x00100000"/><!--1MB-->
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<Set Name="Valid" Value="true"/>
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</If>
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</If>
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<!-- ################################################################################ -->
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<If Name="Valid" Value="false">
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<Error Message="Configuration not recognized"/>
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</If>
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<LoadRegion Name="LR_%TARGETLOCATION%" Base="%Code_BaseAddress%" Options="ABSOLUTE" Size="%Code_Size%">
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<!-- ========= INTERNAL FLASH ============================================ -->
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<ExecRegion Name="ER_%TARGETLOCATION%" Base="%Code_BaseAddress%" Options="FIXED" Size="">
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<FileMapping Name="*" Options="(SectionForPowerOnReset, +FIRST)" />
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<FileMapping Name="*" Options="(SectionForBootstrapOperations)" />
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<FileMapping Name="*" Options="(+RO-CODE)" />
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<FileMapping Name="*" Options="(+RO-DATA)" />
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</ExecRegion>
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<!-- ========= INTERNAL RAM ============================================= -->
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<!-- Writeable Vector table -->
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<!-- NOTE:
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Despite what you might hope for, this CANNOT go into the CCM area as the NVIC does not
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have access to that space (it sees the AHB layer and below, rather than the core's D-Bus)
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-->
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<!-- Alignment for the vector table is important to allow the NVIC to decode the proper locations
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(See Section 4.4.4 of the ARM Cortex-M4 Generic User Guide [ ARM DUI 0553A (ID121610) ] )
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Since this starts the SRAM block, it's aligned just fine for any size table.
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-->
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<ExecRegion Name="ER_RAM_RW" Base="%IRAM_BaseAddress%" Options="ABSOLUTE" Size="">
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<FileMapping Name="*" Options="(VectorTable)"/>
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<FileMapping Name="*" Options="(+RW-DATA, +ZI)" />
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</ExecRegion>
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<ExecRegion Name="ER_RAM_RO" Base="+0" Options="ABSOLUTE" Size="">
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<!-- Flash programming from Flash is safe on STM32 -->
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<!-- No need to place Flash programming code in RAM -->
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<!-- <FileMapping Name="*" Options="(SectionForFlashOperations)" /> -->
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</ExecRegion>
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<!-- ========= EXTERNAL RAM ============================================= -->
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<ExecRegion Name="ER_HEAP_BEGIN" Base="%Heap_BaseAddress%" Options="ABSOLUTE UNINIT" Size="">
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<FileMapping Name="*" Options="(SectionForHeapBegin)" />
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</ExecRegion>
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<!-- everything between heapbegin and heapend will be allocated for a heap -->
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<ExecRegion Name="ER_HEAP_END" Base="+%Heap_Size%" Options="ABSOLUTE UNINIT" Size="">
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<FileMapping Name="*" Options="(SectionForHeapEnd)" />
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</ExecRegion>
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<ExecRegion Name="ER_CUSTOM_HEAP_BEGIN" Base="+0" Options="ABSOLUTE UNINIT" Size="">
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<FileMapping Name="*" Options="(SectionForCustomHeapBegin)" />
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</ExecRegion>
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<!-- everything between heapbegin and heapend will be allocated for the unmanaged SimpleHeap -->
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<ExecRegion Name="ER_CUSTOM_HEAP_END" Base="+%CustomHeap_Size%" Options="ABSOLUTE UNINIT" Size="">
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<FileMapping Name="*" Options="(SectionForCustomHeapEnd)" />
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</ExecRegion>
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<!-- ========= Internal CCM ============================================ -->
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<ExecRegion Name="ER_STACK_BOTTOM" Base="%Stack_Bottom%" Options="ABSOLUTE UNINIT" Size="">
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<FileMapping Name="*" Options="(SectionForStackBottom)" />
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</ExecRegion>
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<!-- -8 for the two 32bit values in the SectionForStack* sections, This keeps the region
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limit from exceeding the size of physical memory.
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-->
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<ExecRegion Name="ER_STACK_TOP" Base="AlignExpr(+%CCM_Size% -8, 8 )" Options="ABSOLUTE UNINIT" Size="">
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<FileMapping Name="*" Options="(SectionForStackTop +LAST)" />
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</ExecRegion>
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</LoadRegion>
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</ScatterFile>

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