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JIT: Apply format suggested by automation (#115416)
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src/coreclr/jit/hwintrinsiccodegenxarch.cpp

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -2002,24 +2002,23 @@ void CodeGen::genBaseIntrinsic(GenTreeHWIntrinsic* node, insOpts instOptions)
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// Store the vector to the temp location.
20042004
GetEmitter()->emitIns_S_R(ins_Store(simdType, compiler->isSIMDTypeLocalAligned(simdInitTempVarNum)),
2005-
emitTypeSize(simdType), op1Reg, simdInitTempVarNum, 0);
2005+
emitTypeSize(simdType), op1Reg, simdInitTempVarNum, 0);
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20072007
// Set the desired element.
2008-
GetEmitter()->emitIns_ARX_R(ins_Move_Extend(op3->TypeGet(), false), // Store
2009-
emitTypeSize(baseType), // Of the vector baseType
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valueReg, // From valueReg
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(isEBPbased) ? REG_EBP : REG_ESP, // Stack-based
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indexReg, // Indexed
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genTypeSize(baseType), // by the size of the baseType
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offs); // Offset
2015-
2008+
GetEmitter()->emitIns_ARX_R(ins_Move_Extend(op3->TypeGet(), false), // Store
2009+
emitTypeSize(baseType), // Of the vector baseType
2010+
valueReg, // From valueReg
2011+
(isEBPbased) ? REG_EBP : REG_ESP, // Stack-based
2012+
indexReg, // Indexed
2013+
genTypeSize(baseType), // by the size of the baseType
2014+
offs); // Offset
2015+
20162016
// Write back the modified vector to the original location.
20172017
GetEmitter()->emitIns_R_S(ins_Load(simdType, compiler->isSIMDTypeLocalAligned(simdInitTempVarNum)),
2018-
emitTypeSize(simdType), targetReg, simdInitTempVarNum, 0);
2018+
emitTypeSize(simdType), targetReg, simdInitTempVarNum, 0);
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break;
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}
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case NI_Vector128_GetElement:
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case NI_Vector256_GetElement:
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case NI_Vector512_GetElement:

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