Discovering: System.Text.Json.Tests (method display = ClassAndMethod, method display options = None) Discovered: System.Text.Json.Tests (found 1 of 5365 test case) Starting: System.Text.Json.Tests (parallel test collections = on, max threads = 32) ****** START compiling <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this (MethodHash=6205bfcf) Generating code for Windows x86 OPTIONS: compCodeOpt = BLENDED_CODE OPTIONS: compDbgCode = false OPTIONS: compDbgInfo = true OPTIONS: compDbgEnC = false OPTIONS: compProcedureSplitting = false OPTIONS: compProcedureSplittingEH = false OPTIONS: optimized using text profile data IL to import: IL_0000 02 ldarg.0 IL_0001 7b 9a 04 00 0a ldfld 0xA00049A IL_0006 03 ldarg.1 IL_0007 04 ldarg.2 IL_0008 8c 2a 00 00 1b box 0x1B00002A IL_000d 6f c4 04 00 0a callvirt 0xA0004C4 IL_0012 2a ret lvaSetClass: setting class for V00 to (13C23F4C) <>c__DisplayClass15_1[Int32] 'this' passed in register ecx lvaSetClass: setting class for V01 to (030C92F4) System.Object Arg #1 passed in register(s) edx ; Initial local variable assignments ; ; V00 this ref this class-hnd ; V01 arg1 ref class-hnd ; V02 arg2 int *************** In compInitDebuggingInfo() for <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this getVars() returned cVars = 0, extendOthers = true info.compVarScopesCount = 3 VarNum LVNum Name Beg End 0: 00h 00h V00 this 000h 013h 1: 01h 01h V01 arg1 000h 013h 2: 02h 02h V02 arg2 000h 013h info.compStmtOffsetsCount = 0 info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) *************** In fgFindBasicBlocks() for <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this Jump targets: none New Basic Block BB01 [0000] created. BB01 [000..013) IL Code Size,Instr 19, 7, Basic Block count 1, Local Variable Num,Ref count 3, 3 for method <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this OPTIONS: opts.MinOpts() == false Basic block list for '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 100 [000..013) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Pre-import *************** Finishing PHASE Pre-import *************** Starting PHASE Profile incorporation Have text profile data: 3 schema records (schema at 06ABA520, data at 0635CB4C) Profile summary: 1 runs, 0 block probes, 1 edge probes, 0 class profiles, 1 method profiles, 0 other records Reconstructing block counts from sparse edge instrumentation ... adding known edge BB01 -> BB01: weight 35 New BlockSet epoch 1, # of blocks (including unused BB00): 2, bitset array size: 1 (short) Solver: 1 blocks, 1 unknown; 1 edges, 0 unknown, 0 zero (and so ignored) Pass [1]: 1 unknown blocks, 0 unknown edges BB01: 0 incoming unknown, 0 outgoing unknown BB01: all incoming edge weights known, summing... BB01 -> BB01 has weight 35 BB01: all incoming edge weights known, sum is 35 Solver: converged in 1 passes *************** Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..013) (return) IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..013) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Importation *************** In impImport() for <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this impImportBlockPending for BB01 Importing BB01 (PC=000) of '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' [ 0] 0 (0x000) ldarg.0 [ 1] 1 (0x001) ldfld 0A00049A [ 1] 6 (0x006) ldarg.1 [ 2] 7 (0x007) ldarg.2 [ 3] 8 (0x008) box 1B00002A Compiler::impImportAndPushBox -- handling BOX(value class) via inline allocate/copy sequence lvaGrabTemp returning 3 (V03 tmp0) called for Single-def Box Helper. Marking V03 as a single def local lvaSetClass: setting class for V03 to (0AAE1444) System.Int32 [exact] STMT00000 ( 0x000[E-] ... ??? ) [000007] -A--------- ▌ ASG ref [000006] D------N--- ├──▌ LCL_VAR ref V03 tmp0 [000005] ----------- └──▌ ALLOCOBJ ref [000004] H---------- └──▌ CNS_INT(h) int 0xAAE1444 class lvaGrabTemp returning 4 (V04 tmp1) called for impImportAndPushBox. STMT00001 ( ??? ... ??? ) [000014] -A-XG------ ▌ ASG ref [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG------ └──▌ FIELD ref untypedPredicate [000000] ----------- └──▌ LCL_VAR ref V00 this Marked V04 as a single def temp Querying runtime about current class of field <>c__DisplayClass15_1[System.Int32].untypedPredicate (declared as System.Func`3[[System.Object, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e],[System.Object, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e],[System.Boolean, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e]]) Field's current class not available lvaSetClass: setting class for V04 to (13BDD9E4) System.Func`3[[System.Object, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e],[System.Object, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e],[System.Boolean, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e]] STMT00002 ( ??? ... ??? ) [000012] -A--------- ▌ ASG int [000011] -------N--- ├──▌ IND int [000010] ----------- │ └──▌ ADD byref [000008] ----------- │ ├──▌ LCL_VAR ref V03 tmp0 [000009] ----------- │ └──▌ CNS_INT int 4 [000003] ----------- └──▌ LCL_VAR int V02 arg2 [ 3] 13 (0x00d) callvirt 0A0004C4 In Compiler::impImportCall: opcode is callvirt, kind=0, callRetType is bool, structSize is 0 Considering guarded devirtualization at IL offset 13 (0xd) Likely methods for call [000018] to method System.Func`3[__Canon,__Canon,Boolean][System.__Canon,System.__Canon,System.Boolean]:Invoke(System.__Canon,System.__Canon):bool:this 1) 0EF90DE0 (<>c:b__36_5(System.Object,System.Object):bool:this) [likelihood:25%] 2) 0EF90DC8 (<>c:b__36_4(System.Object,System.Object):bool:this) [likelihood:25%] 3) 0EF90DB0 (<>c:b__36_3(System.Object,System.Object):bool:this) [likelihood:12%] 4) 0EF92CC0 (<>c__DisplayClass33_0:b__1(System.Object,System.Object):bool:this) [likelihood:12%] 5) 0EF92C78 (<>c__DisplayClass31_0:b__1(System.Object,System.Object):bool:this) [likelihood:12%] 6) 0EF92C30 (<>c__DisplayClass30_0:b__1(System.Object,System.Object):bool:this) [likelihood:12%] *** Using random seed ext(87) ^ int(1644543951) = 1644543896 Picked random method for GDV: 0EF7CB54 (<>c:b__36_4(System.Object,System.Object):bool:this) delegate call would invoke method b__36_4 Marking call [000018] as guarded devirtualization candidate; will guess for method <>c:b__36_4(System.Object,System.Object):bool:this INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success' for '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' calling 'System.Func`3[__Canon,__Canon,Boolean][System.__Canon,System.__Canon,System.Boolean]:Invoke(System.__Canon,System.__Canon):bool:this' INLINER: during 'impMarkInlineCandidate' result 'CheckCanInline Success' reason 'CheckCanInline Success' STMT00003 ( ??? ... ??? ) [000018] &-C-G------ ▌ CALL int System.Func`3[__Canon,__Canon,Boolean][System.__Canon,System.__Canon,System.Boolean].Invoke (exactContextHnd=0x13BDD9E5) [000015] ----------- this ├──▌ LCL_VAR ref V04 tmp1 [000002] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000017] ----------- arg2 └──▌ BOX ref [000016] ----------- └──▌ LCL_VAR ref V03 tmp0 [ 1] 18 (0x012) ret STMT00004 ( ??? ... ??? ) [000020] --C-------- ▌ RETURN int [000019] --C-------- └──▌ RET_EXPR int (inl return expr [000018]) *************** Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..013) (return) i newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..013) (return), preds={} succs={} ***** BB01 STMT00000 ( 0x000[E-] ... 0x012 ) [000007] -A--------- ▌ ASG ref [000006] D------N--- ├──▌ LCL_VAR ref V03 tmp0 [000005] ----------- └──▌ ALLOCOBJ ref [000004] H---------- └──▌ CNS_INT(h) int 0xAAE1444 class ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG------ ▌ ASG ref [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG------ └──▌ FIELD ref untypedPredicate [000000] ----------- └──▌ LCL_VAR ref V00 this ***** BB01 STMT00002 ( ??? ... ??? ) [000012] -A--------- ▌ ASG int [000011] -------N--- ├──▌ IND int [000010] ----------- │ └──▌ ADD byref [000008] ----------- │ ├──▌ LCL_VAR ref V03 tmp0 [000009] ----------- │ └──▌ CNS_INT int 4 [000003] ----------- └──▌ LCL_VAR int V02 arg2 ***** BB01 STMT00003 ( ??? ... ??? ) [000018] &-C-G------ ▌ CALL int System.Func`3[__Canon,__Canon,Boolean][System.__Canon,System.__Canon,System.Boolean].Invoke (exactContextHnd=0x13BDD9E5) [000015] ----------- this ├──▌ LCL_VAR ref V04 tmp1 [000002] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000017] ----------- arg2 └──▌ BOX ref [000016] ----------- └──▌ LCL_VAR ref V03 tmp0 ***** BB01 STMT00004 ( ??? ... ??? ) [000020] --C-------- ▌ RETURN int [000019] --C-------- └──▌ RET_EXPR int (inl return expr [000018]) ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Finishing PHASE Expand patchpoints [no changes] *************** Starting PHASE Indirect call transform ---------------- *** GuardedDevirtualization contemplating [000018] in BB01 Likelihood of correct guess is 100 *** GuardedDevirtualization: transforming STMT00003 lvaGrabTemp returning 5 (V05 tmp2) (a long lifetime temp) called for guarded devirt return temp. Reworking call(s) to return value via a new temp V05 Bashing GT_RET_EXPR [000019] to refer to temp V05 New Basic Block BB02 [0001] created. lvaGrabTemp returning 6 (V06 tmp3) (a long lifetime temp) called for guarded devirt call target temp. New Basic Block BB03 [0002] created. lvaGrabTemp returning 7 (V07 tmp4) (a long lifetime temp) called for guarded devirt this exact temp. lvaSetClass: setting class for V07 to (0EF7D480) <>c Direct call [000038] in block BB03 New Basic Block BB04 [0003] created. Residual call [000018] moved to block BB04 Scouting for possible GDV chain as likelihood 100 >= 75 Scouting STMT00004 -- 1 calls transformed *************** Finishing PHASE Indirect call transform Trees after Indirect call transform ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB04 ( cond ) i newobj IBC BB03 [0002] 0 35 35 [???..???)-> BB02 (always) i internal newobj IBC BB04 [0003] 0 0 0 [???..???) i internal rare newobj IBC BB02 [0001] 1 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB04 (cond), preds={} succs={BB03,BB04} ***** BB01 STMT00000 ( 0x000[E-] ... 0x012 ) [000007] -A--------- ▌ ASG ref [000006] D------N--- ├──▌ LCL_VAR ref V03 tmp0 [000005] ----------- └──▌ ALLOCOBJ ref [000004] H---------- └──▌ CNS_INT(h) int 0xAAE1444 class ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG------ ▌ ASG ref [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG------ └──▌ FIELD ref untypedPredicate [000000] ----------- └──▌ LCL_VAR ref V00 this ***** BB01 STMT00002 ( ??? ... ??? ) [000012] -A--------- ▌ ASG int [000011] -------N--- ├──▌ IND int [000010] ----------- │ └──▌ ADD byref [000008] ----------- │ ├──▌ LCL_VAR ref V03 tmp0 [000009] ----------- │ └──▌ CNS_INT int 4 [000003] ----------- └──▌ LCL_VAR int V02 arg2 ***** BB01 STMT00005 ( ??? ... ??? ) [000027] -A-X------- ▌ ASG int [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X------- └──▌ IND int [000024] ----------- └──▌ ADD byref [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000023] ----------- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) [000031] ----------- ▌ JTRUE void [000030] ----------- └──▌ NE int [000029] H---------- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] ----------- └──▌ LCL_VAR int V06 tmp3 ------------ BB03 [???..???) -> BB02 (always), preds={} succs={BB02} ***** BB03 STMT00007 ( ??? ... ??? ) [000037] -A-X------- ▌ ASG ref [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X------- └──▌ IND ref [000034] ----------- └──▌ ADD byref [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000033] ----------- └──▌ CNS_INT int 4 ***** BB03 STMT00008 ( ??? ... ??? ) [000038] I-C-G------ ▌ CALL int <>c.b__36_4 (exactContextHnd=0x0EF7CB54) [000043] ----------- this ├──▌ LCL_VAR ref V07 tmp4 [000040] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000041] ----------- arg2 └──▌ BOX ref [000042] ----------- └──▌ LCL_VAR ref V03 tmp0 ***** BB03 STMT00009 ( ??? ... ??? ) [000046] -AC-------- ▌ ASG int [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000044] --C-------- └──▌ RET_EXPR int (inl return expr [000038]) ------------ BB04 [???..???), preds={} succs={BB02} ***** BB04 STMT00010 ( ??? ... ??? ) [000048] -AC-G------ ▌ ASG int [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --C-G------ └──▌ CALL ind int [000053] ---X------- this ├──▌ IND ref [000052] ----------- │ └──▌ ADD byref [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] ----------- │ └──▌ CNS_INT int 4 [000002] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000017] ----------- arg2 ├──▌ BOX ref [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 ------------ BB02 [???..013) (return), preds={} succs={} ***** BB02 STMT00004 ( ??? ... ??? ) [000020] --C-------- ▌ RETURN int [000021] ----------- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Post-import *************** Finishing PHASE Post-import *************** Starting PHASE Morph - Init New BlockSet epoch 2, # of blocks (including unused BB00): 5, bitset array size: 1 (short) *************** In fgPostImportationCleanup *************** Finishing PHASE Morph - Init *************** In fgDebugCheckBBlist *************** Starting PHASE Morph - Inlining Querying runtime about current class of field <>c__DisplayClass15_1[System.Int32].untypedPredicate (declared as System.Func`3[[System.Object, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e],[System.Object, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e],[System.Boolean, System.Private.CoreLib, Version=7.0.0.0, Culture=neutral, PublicKeyToken=7cec85d7bea7798e]]) Field's current class not available Expanding INLINE_CANDIDATE in statement STMT00008 in BB03: STMT00008 ( ??? ... ??? ) [000038] I-C-G------ ▌ CALL int <>c.b__36_4 (exactContextHnd=0x0EF7CB54) [000043] ----------- this ├──▌ LCL_VAR ref V07 tmp4 [000040] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000041] ----------- arg2 └──▌ BOX ref [000042] ----------- └──▌ LCL_VAR ref V03 tmp0 thisArg: is a local var [000043] ----------- ▌ LCL_VAR ref V07 tmp4 Argument #1: is a local var [000040] ----------- ▌ LCL_VAR ref V01 arg1 Argument #2: [000041] ----------- ▌ BOX ref [000042] ----------- └──▌ LCL_VAR ref V03 tmp0 INLINER: inlineInfo.tokenLookupContextHandle for <>c:b__36_4(System.Object,System.Object):bool:this set to 0x0EF7CB54: Invoking compiler for the inlinee method <>c:b__36_4(System.Object,System.Object):bool:this : IL to import: IL_0000 16 ldc.i4.0 IL_0001 2a ret INLINER impTokenLookupContextHandle for <>c:b__36_4(System.Object,System.Object):bool:this is 0x0EF7CB54. *************** In compInitDebuggingInfo() for <>c:b__36_4(System.Object,System.Object):bool:this info.compStmtOffsetsCount = 0 info.compStmtOffsetsImplicit = 0005h ( STACK_EMPTY CALL_SITE ) *************** In fgFindBasicBlocks() for <>c:b__36_4(System.Object,System.Object):bool:this Jump targets: none New Basic Block BB05 [0004] created. BB05 [000..002) Basic block list for '<>c:b__36_4(System.Object,System.Object):bool:this' ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..002) (return) ----------------------------------------------------------------------------------------------------------------------------------------- *************** Inline @[000038] Starting PHASE Pre-import *************** Inline @[000038] Finishing PHASE Pre-import *************** Inline @[000038] Starting PHASE Profile incorporation BBOPT set, but no profile data available (hr=80004001) Computing inlinee profile scale: ... no callee profile data, will use non-pgo weight to scale call site count 35 callee entry count 100 scale 0.35 Scaling inlinee blocks *************** Inline @[000038] Finishing PHASE Profile incorporation Trees after Profile incorporation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..002) (return) ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB05 [000..002) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000038] Starting PHASE Importation *************** In impImport() for <>c:b__36_4(System.Object,System.Object):bool:this impImportBlockPending for BB05 Importing BB05 (PC=000) of '<>c:b__36_4(System.Object,System.Object):bool:this' [ 0] 0 (0x000) ldc.i4.0 0 [ 1] 1 (0x001) ret Inlinee Return expression (before normalization) => [000055] ----------- ▌ CNS_INT int 0 Inlinee Return expression (after normalization) => [000056] ----------- ▌ CAST int <- bool <- int [000055] ----------- └──▌ CNS_INT int 0 ** Note: inlinee IL was partially imported -- imported 0 of 2 bytes of method IL *************** Inline @[000038] Finishing PHASE Importation Trees after Importation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB05 [0004] 1 1 [000..002) (return) i ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB05 [000..002) (return), preds={} succs={} ------------------------------------------------------------------------------------------------------------------- *************** Inline @[000038] Starting PHASE Expand patchpoints -- no patchpoints to transform *************** Inline @[000038] Finishing PHASE Expand patchpoints [no changes] *************** Inline @[000038] Starting PHASE Indirect call transform -- no candidates to transform *************** Inline @[000038] Finishing PHASE Indirect call transform [no changes] *************** Inline @[000038] Starting PHASE Post-import *************** In fgPostImportationCleanup *************** Inline @[000038] Finishing PHASE Post-import ----------- Statements (and blocks) added due to the inlining of call [000038] ----------- Arguments setup: gtTryRemoveBoxUpstreamEffects: attempting to remove side effects of BOX (valuetype) [000041] (assign/newobj STMT00000 copy STMT00002 Bashing NEWOBJ [000007] to NOP Bashing COPY [000012] to NOP; no source side effects. Inlinee method body:fgInlineAppendStatements: no gc ref inline locals. Return expression for call at [000038] is [000056] ----------- ▌ CAST int <- bool <- int [000055] ----------- └──▌ CNS_INT int 0 Successfully inlined <>c:b__36_4(System.Object,System.Object):bool:this (2 IL bytes) (depth 1) [below ALWAYS_INLINE size] -------------------------------------------------------------------------------------------- INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' for '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' calling '<>c:b__36_4(System.Object,System.Object):bool:this' INLINER: during 'fgInline' result 'success' reason 'below ALWAYS_INLINE size' Folding operator with constant nodes into a constant: [000056] ----------- ▌ CAST int <- bool <- int [000055] ----------- └──▌ CNS_INT int 0 Bashed to int constant: [000056] ----------- ▌ CNS_INT int 0 Replacing the return expression placeholder [000044] with [000056] [000044] --C-------- ▌ RET_EXPR int (inl return expr [000056]) Inserting the inline return expression [000056] ----------- ▌ CNS_INT int 0 INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'not inline candidate' for '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' calling 'n/a' INLINER: during 'fgNoteNonInlineCandidate' result 'failed this call site' reason 'not inline candidate' **************** Inline Tree Inlines into 060009FF [via ExtendedDefaultPolicy] <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this: [INL01 IL=0013 TR=000038 060036CE] [INLINED: callee: below ALWAYS_INLINE size GUARDED DEVIRT] <>c:b__36_4(System.Object,System.Object):bool:this Budget: initialTime=117, finalTime=103, initialBudget=1170, currentBudget=1170 Budget: initialSize=564, finalSize=564 *************** Finishing PHASE Morph - Inlining Trees after Morph - Inlining ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB04 ( cond ) i newobj IBC BB03 [0002] 0 35 35 [???..???)-> BB02 (always) i internal newobj IBC BB04 [0003] 0 0 0 [???..???) i internal rare newobj IBC BB02 [0001] 1 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB04 (cond), preds={} succs={BB03,BB04} ***** BB01 STMT00000 ( 0x000[E-] ... 0x012 ) [000007] ----------- ▌ NOP void ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG------ ▌ ASG ref [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG------ └──▌ FIELD ref untypedPredicate [000000] ----------- └──▌ LCL_VAR ref V00 this ***** BB01 STMT00002 ( ??? ... ??? ) [000012] ----------- ▌ NOP void ***** BB01 STMT00005 ( ??? ... ??? ) [000027] -A-X------- ▌ ASG int [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X------- └──▌ IND int [000024] ----------- └──▌ ADD byref [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000023] ----------- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) [000031] ----------- ▌ JTRUE void [000030] ----------- └──▌ NE int [000029] H---------- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] ----------- └──▌ LCL_VAR int V06 tmp3 ------------ BB03 [???..???) -> BB02 (always), preds={} succs={BB02} ***** BB03 STMT00007 ( ??? ... ??? ) [000037] -A-X------- ▌ ASG ref [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X------- └──▌ IND ref [000034] ----------- └──▌ ADD byref [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000033] ----------- └──▌ CNS_INT int 4 ***** BB03 STMT00009 ( ??? ... ??? ) [000046] -AC-------- ▌ ASG int [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000056] ----------- └──▌ CNS_INT int 0 ------------ BB04 [???..???), preds={} succs={BB02} ***** BB04 STMT00010 ( ??? ... ??? ) [000048] -AC-G------ ▌ ASG int [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --C-G------ └──▌ CALL ind int [000053] ---X------- this ├──▌ IND ref [000052] ----------- │ └──▌ ADD byref [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] ----------- │ └──▌ CNS_INT int 4 [000002] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000017] ----------- arg2 ├──▌ BOX ref [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 ------------ BB02 [???..013) (return), preds={} succs={} ***** BB02 STMT00004 ( ??? ... ??? ) [000020] --C-------- ▌ RETURN int [000021] ----------- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Allocate Objects disabled, punting *************** Finishing PHASE Allocate Objects [no changes] *************** Starting PHASE Morph - Add internal blocks *************** After fgAddInternal() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB04 ( cond ) i newobj IBC BB03 [0002] 0 35 35 [???..???)-> BB02 (always) i internal newobj IBC BB04 [0003] 0 0 0 [???..???) i internal rare newobj IBC BB02 [0001] 1 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty *************** Finishing PHASE Morph - Add internal blocks *************** Starting PHASE Remove empty try *************** In fgRemoveEmptyTry() No EH in this method, nothing to remove. *************** Finishing PHASE Remove empty try [no changes] *************** Starting PHASE Remove empty finally No EH in this method, nothing to remove. *************** Finishing PHASE Remove empty finally [no changes] *************** Starting PHASE Merge callfinally chains No EH in this method, nothing to merge. *************** Finishing PHASE Merge callfinally chains [no changes] *************** Starting PHASE Clone finally No EH in this method, no cloning. *************** Finishing PHASE Clone finally [no changes] *************** Starting PHASE Compute preds Renumbering the basic blocks for fgComputePred *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB04 ( cond ) i newobj IBC BB03 [0002] 0 35 35 [???..???)-> BB02 (always) i internal newobj IBC BB04 [0003] 0 0 0 [???..???) i internal rare newobj IBC BB02 [0001] 1 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty Renumber BB03 to BB02 Renumber BB04 to BB03 Renumber BB02 to BB04 *************** After renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 0 35 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 0 0 0 [???..???) i internal rare newobj IBC BB04 [0001] 1 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty New BlockSet epoch 3, # of blocks (including unused BB00): 5, bitset array size: 1 (short) *************** In fgComputePreds() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 0 35 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 0 0 0 [???..???) i internal rare newobj IBC BB04 [0001] 1 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- Setting edge weights for BB01 -> BB03 to [0 .. 3.402823e+38] Setting edge weights for BB01 -> BB02 to [0 .. 3.402823e+38] Setting edge weights for BB02 -> BB04 to [0 .. 3.402823e+38] Setting edge weights for BB03 -> BB04 to [0 .. 3.402823e+38] *************** After fgComputePreds() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 35 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare newobj IBC BB04 [0001] 2 BB02,BB03 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Compute preds *************** Starting PHASE Merge throw blocks *************** In fgTailMergeThrows Method does not have multiple noreturn calls. *************** Finishing PHASE Merge throw blocks [no changes] *************** Starting PHASE Update flow graph early pass *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 35 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare newobj IBC BB04 [0001] 2 BB02,BB03 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Update flow graph early pass *************** Starting PHASE Morph - Promote Structs *************** In fgPromoteStructs() lvaTable before fgPromoteStructs ; Initial local variable assignments ; ; V00 this ref this class-hnd ; V01 arg1 ref class-hnd ; V02 arg2 int ; V03 tmp0 ref class-hnd exact "Single-def Box Helper" ; V04 tmp1 ref class-hnd "impImportAndPushBox" ; V05 tmp2 int "guarded devirt return temp" ; V06 tmp3 int "guarded devirt call target temp" ; V07 tmp4 ref class-hnd "guarded devirt this exact temp" lvaTable after fgPromoteStructs ; Initial local variable assignments ; ; V00 this ref this class-hnd ; V01 arg1 ref class-hnd ; V02 arg2 int ; V03 tmp0 ref class-hnd exact "Single-def Box Helper" ; V04 tmp1 ref class-hnd "impImportAndPushBox" ; V05 tmp2 int "guarded devirt return temp" ; V06 tmp3 int "guarded devirt call target temp" ; V07 tmp4 ref class-hnd "guarded devirt this exact temp" *************** Finishing PHASE Morph - Promote Structs *************** Starting PHASE Morph - Structs/AddrExp *************** In fgMarkAddressExposedLocals() LocalAddressVisitor visiting statement: STMT00000 ( 0x000[E-] ... 0x012 ) [000007] ----------- ▌ NOP void LocalAddressVisitor visiting statement: STMT00001 ( ??? ... ??? ) [000014] -A-XG------ ▌ ASG ref [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG------ └──▌ FIELD ref untypedPredicate [000000] ----------- └──▌ LCL_VAR ref V00 this LocalAddressVisitor visiting statement: STMT00002 ( ??? ... ??? ) [000012] ----------- ▌ NOP void LocalAddressVisitor visiting statement: STMT00005 ( ??? ... ??? ) [000027] -A-X------- ▌ ASG int [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X------- └──▌ IND int [000024] ----------- └──▌ ADD byref [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000023] ----------- └──▌ CNS_INT int 12 LocalAddressVisitor visiting statement: STMT00006 ( ??? ... ??? ) [000031] ----------- ▌ JTRUE void [000030] ----------- └──▌ NE int [000029] H---------- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] ----------- └──▌ LCL_VAR int V06 tmp3 LocalAddressVisitor visiting statement: STMT00007 ( ??? ... ??? ) [000037] -A-X------- ▌ ASG ref [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X------- └──▌ IND ref [000034] ----------- └──▌ ADD byref [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000033] ----------- └──▌ CNS_INT int 4 LocalAddressVisitor visiting statement: STMT00009 ( ??? ... ??? ) [000046] -AC-------- ▌ ASG int [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000056] ----------- └──▌ CNS_INT int 0 LocalAddressVisitor visiting statement: STMT00010 ( ??? ... ??? ) [000048] -AC-G------ ▌ ASG int [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --C-G------ └──▌ CALL ind int [000053] ---X------- this ├──▌ IND ref [000052] ----------- │ └──▌ ADD byref [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] ----------- │ └──▌ CNS_INT int 4 [000002] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000017] ----------- arg2 ├──▌ BOX ref [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 LocalAddressVisitor visiting statement: STMT00004 ( ??? ... ??? ) [000020] --C-------- ▌ RETURN int [000021] ----------- └──▌ LCL_VAR int V05 tmp2 *************** Finishing PHASE Morph - Structs/AddrExp *************** Starting PHASE Forward Substitution ===> BB01 [000014]: not asg (single-use lcl) [000027]: not asg (single-use lcl) ===> BB02 [000037]: not asg (single-use lcl) ===> BB03 ===> BB04 *************** Finishing PHASE Forward Substitution [no changes] *************** Starting PHASE Morph - ByRefs *************** Finishing PHASE Morph - ByRefs *************** Starting PHASE Morph - Global *************** In fgMorphBlocks() Morphing BB01 of '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' fgMorphTree BB01, STMT00000 (before) [000007] ----------- ▌ NOP void fgMorphTree BB01, STMT00001 (before) [000014] -A-XG------ ▌ ASG ref [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG------ └──▌ FIELD ref untypedPredicate [000000] ----------- └──▌ LCL_VAR ref V00 this Notify VM instruction set (SSE2) must be supported. Final value of Compiler::fgMorphField after calling fgMorphSmpOp: [000001] ---XG------ ▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] GenTreeNode creates assertion: [000001] ---XG------ ▌ IND ref In BB01 New Local Constant Assertion: V00 != null, index = #01 fgMorphTree BB01, STMT00001 (after) [000014] -A-XG+----- ▌ ASG ref [000013] D----+-N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG+----- └──▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] fgMorphTree BB01, STMT00002 (before) [000012] ----------- ▌ NOP void fgMorphTree BB01, STMT00005 (before) [000027] -A-X------- ▌ ASG int [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X------- └──▌ IND int [000024] ----------- └──▌ ADD byref [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000023] ----------- └──▌ CNS_INT int 12 GenTreeNode creates assertion: [000025] ---X------- ▌ IND int In BB01 New Local Constant Assertion: V04 != null, index = #02 fgMorphTree BB01, STMT00006 (before) [000031] ----------- ▌ JTRUE void [000030] ----------- └──▌ NE int [000029] H---------- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] ----------- └──▌ LCL_VAR int V06 tmp3 Morphing BB02 of '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' fgMorphTree BB02, STMT00007 (before) [000037] -A-X------- ▌ ASG ref [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X------- └──▌ IND ref [000034] ----------- └──▌ ADD byref [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 [000033] ----------- └──▌ CNS_INT int 4 GenTreeNode creates assertion: [000035] ---X------- ▌ IND ref In BB02 New Local Constant Assertion: V04 != null, index = #01 fgMorphTree BB02, STMT00009 (before) [000046] -AC-------- ▌ ASG int [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000056] ----------- └──▌ CNS_INT int 0 GenTreeNode creates assertion: [000046] -A--------- ▌ ASG int In BB02 New Local Constant Assertion: V05 == 0, index = #02 Morphing BB03 of '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' fgMorphTree BB03, STMT00010 (before) [000048] -AC-G------ ▌ ASG int [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --C-G------ └──▌ CALL ind int [000053] ---X------- this ├──▌ IND ref [000052] ----------- │ └──▌ ADD byref [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] ----------- │ └──▌ CNS_INT int 4 [000002] ----------- arg1 ├──▌ LCL_VAR ref V01 arg1 [000017] ----------- arg2 ├──▌ BOX ref [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 Initializing arg info for 18.CALL: Args for call [000018] CALL after AddFinalArgsAndDetermineABIInfo: CallArg[[000053].IND ref (By value), 1 reg: ecx, byteAlignment=4, wellKnown[ThisPointer]] CallArg[[000002].LCL_VAR ref (By value), 1 reg: edx, byteAlignment=4] CallArg[[000017].BOX ref (By value), byteSize=4, byteOffset=0, byteAlignment=4] Morphing args for 18.CALL: GenTreeNode creates assertion: [000053] ---X------- ▌ IND ref In BB03 New Local Constant Assertion: V04 != null, index = #01 Sorting the arguments: Argument with 'side effect'... [000053] ---X-+----- ▌ IND ref [000052] -----+----- └──▌ ADD byref [000051] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- └──▌ CNS_INT int 4 lvaGrabTemp returning 8 (V08 tmp5) called for argument with side effect. Evaluate to a temp: [000061] -A-X------- ▌ ASG ref [000060] D------N--- ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- └──▌ IND ref [000052] -----+----- └──▌ ADD byref [000051] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- └──▌ CNS_INT int 4 Deferred argument ('edx'): [000002] -----+----- ▌ LCL_VAR ref V01 arg1 Moved to late list Register placement order: ecx edx Args for [000018].CALL after fgMorphArgs: CallArg[[000062].LCL_VAR ref (By value), 1 reg: ecx, byteAlignment=4, isLate, tmpNum=V08, isTmp, processed, wellKnown[ThisPointer]] CallArg[[000002].LCL_VAR ref (By value), 1 reg: edx, byteAlignment=4, isLate, processed] CallArg[[000017].BOX ref (By value), byteSize=4, byteOffset=0, byteAlignment=4, processed] OutgoingArgsStackSize is 4 GenTreeNode creates assertion: [000048] -ACXG------ ▌ ASG int In BB03 New Local Subrange Assertion: V05 in [0..255], index = #02 fgMorphTree BB03, STMT00010 (after) [000048] -ACXG+----- ▌ ASG int [000047] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --CXG+----- └──▌ CALL ind int [000061] -A-X------- this setup ├──▌ ASG ref [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- │ └──▌ IND ref [000052] -----+----- │ └──▌ ADD byref [000051] -----+----- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- │ └──▌ CNS_INT int 4 [000017] -----+----- arg2 on STK ├──▌ BOX ref [000016] -----+----- │ └──▌ LCL_VAR ref V03 tmp0 [000049] -----+----- calli tgt └──▌ LCL_VAR int V06 tmp3 [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 [000002] -----+----- arg1 in edx └──▌ LCL_VAR ref V01 arg1 Morphing BB04 of '<>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this' fgMorphTree BB04, STMT00004 (before) [000020] --C-------- ▌ RETURN int [000021] ----------- └──▌ LCL_VAR int V05 tmp2 fgMorphTree BB04, STMT00004 (after) [000020] -----+----- ▌ RETURN int [000063] -----+----- └──▌ CAST int <- bool <- int [000021] -----+----- └──▌ LCL_VAR int V05 tmp2 *************** In fgMarkDemotedImplicitByRefArgs() *************** Finishing PHASE Morph - Global Trees after Morph - Global ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 35 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 35 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG+----- ▌ ASG ref [000013] D----+-N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG+----- └──▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) [000027] -A-X-+----- ▌ ASG int [000026] D----+-N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X-+----- └──▌ IND int [000024] -----+----- └──▌ ADD byref [000022] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000023] -----+----- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) [000031] -----+----- ▌ JTRUE void [000030] J----+-N--- └──▌ NE int [000029] H----+----- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] -----+----- └──▌ LCL_VAR int V06 tmp3 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) [000037] -A-X-+----- ▌ ASG ref [000036] D----+-N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X-+----- └──▌ IND ref [000034] -----+----- └──▌ ADD byref [000032] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000033] -----+----- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) [000046] -A---+----- ▌ ASG int [000045] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000056] -----+----- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) [000048] -ACXG+----- ▌ ASG int [000047] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --CXG+----- └──▌ CALL ind int [000061] -A-X------- this setup ├──▌ ASG ref [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- │ └──▌ IND ref [000052] -----+----- │ └──▌ ADD byref [000051] -----+----- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- │ └──▌ CNS_INT int 4 [000017] -----+----- arg2 on STK ├──▌ BOX ref [000016] -----+----- │ └──▌ LCL_VAR ref V03 tmp0 [000049] -----+----- calli tgt └──▌ LCL_VAR int V06 tmp3 [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 [000002] -----+----- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) [000020] -----+----- ▌ RETURN int [000063] -----+----- └──▌ CAST int <- bool <- int [000021] -----+----- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable: loop table not valid *************** Starting PHASE GS Cookie No GS security needed *************** Finishing PHASE GS Cookie [phase has not yet enabled common post phase checks] *************** Starting PHASE Compute edge weights (1, false) *************** In fgComputeBlockAndEdgeWeights() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 0.35 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 0.35 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 0.35 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- We are using the Profile Weights and fgCalledCount is 35 Initial weight assignments Updated max weight of BB01 -> BB02 to [0..35] Updated max weight of BB01 -> BB03 to [0..35] Updated max weight of BB01 -> BB03 to [0..0] Updated min weight of BB02 -> BB04 to [35..3.402823e+38] Updated max weight of BB02 -> BB04 to [35..35] Updated min weight of BB03 -> BB04 to [0..3.402823e+38] Updated max weight of BB03 -> BB04 to [0..0] Solver pass 0 -- step 1 -- Updated min weight of BB01 -> BB02 to [35..35] -- step 2 -- fgComputeEdgeWeights() was able to compute exact edge weights for all of the 4 edges, using 1 passes. Edge weights into BB02 :BB01 (35.000000) Edge weights into BB03 :BB01 (0.000000) Edge weights into BB04 :BB02 (35.000000), BB03 (0.000000) *************** Finishing PHASE Compute edge weights (1, false) [phase has not yet enabled common post phase checks] *************** Starting PHASE Invert loops *************** Finishing PHASE Invert loops [no changes] *************** Starting PHASE Optimize control flow *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- Considering uncond to cond BB02 -> BB04 Considering uncond to cond BB03 -> BB04 *************** In fgDebugCheckBBlist *************** In fgExpandRarelyRunBlocks() *************** In fgRelocateEHRegions() *************** In fgReorderBlocks() Initial BasicBlocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Optimize control flow Trees after Optimize control flow ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG+----- ▌ ASG ref [000013] D----+-N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG+----- └──▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) [000027] -A-X-+----- ▌ ASG int [000026] D----+-N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X-+----- └──▌ IND int [000024] -----+----- └──▌ ADD byref [000022] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000023] -----+----- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) [000031] -----+----- ▌ JTRUE void [000030] J----+-N--- └──▌ NE int [000029] H----+----- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] -----+----- └──▌ LCL_VAR int V06 tmp3 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) [000037] -A-X-+----- ▌ ASG ref [000036] D----+-N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X-+----- └──▌ IND ref [000034] -----+----- └──▌ ADD byref [000032] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000033] -----+----- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) [000046] -A---+----- ▌ ASG int [000045] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000056] -----+----- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) [000048] -ACXG+----- ▌ ASG int [000047] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --CXG+----- └──▌ CALL ind int [000061] -A-X------- this setup ├──▌ ASG ref [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- │ └──▌ IND ref [000052] -----+----- │ └──▌ ADD byref [000051] -----+----- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- │ └──▌ CNS_INT int 4 [000017] -----+----- arg2 on STK ├──▌ BOX ref [000016] -----+----- │ └──▌ LCL_VAR ref V03 tmp0 [000049] -----+----- calli tgt └──▌ LCL_VAR int V06 tmp3 [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 [000002] -----+----- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) [000020] -----+----- ▌ RETURN int [000063] -----+----- └──▌ CAST int <- bool <- int [000021] -----+----- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable: loop table not valid *************** Starting PHASE Compute blocks reachability *************** In fgComputeReachability *************** In fgDebugCheckBBlist Return blocks: BB04 Renumbering the basic blocks for fgComputeReachability pass #1 *************** Before renumbering the basic blocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty *************** After renumbering the basic blocks =============== No blocks renumbered! Enter blocks: BB01 After computing reachability sets: ------------------------------------------------ BBnum Reachable by ------------------------------------------------ BB01 : BB01 BB02 : BB01 BB02 BB03 : BB01 BB03 BB04 : BB01 BB02 BB03 BB04 After computing reachability: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgComputeDoms *************** In fgDebugCheckBBlist Dominator computation start blocks (those blocks with no incoming edges): BB01 ------------------------------------------------ BBnum Dominated by ------------------------------------------------ BB01: BB01 BB02: BB02 BB01 BB03: BB03 BB01 BB04: BB04 BB01 Inside fgBuildDomTree After computing the Dominance Tree: BB01 : BB04 BB03 BB02 After numbering the dominator tree: BB01: pre=01, post=04 BB02: pre=04, post=03 BB03: pre=03, post=02 BB04: pre=02, post=01 *************** Finishing PHASE Compute blocks reachability [phase has not yet enabled common post phase checks] *************** Starting PHASE Set block weights *************** In fgDebugCheckBBlist *************** Finishing PHASE Set block weights [phase has not yet enabled common post phase checks] *************** Starting PHASE Find loops *************** In optFindLoops() *************** In optMarkLoopHeads() 0 loop heads marked *************** Finishing PHASE Find loops Trees after Find loops ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG+----- ▌ ASG ref [000013] D----+-N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG+----- └──▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) [000027] -A-X-+----- ▌ ASG int [000026] D----+-N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X-+----- └──▌ IND int [000024] -----+----- └──▌ ADD byref [000022] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000023] -----+----- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) [000031] -----+----- ▌ JTRUE void [000030] J----+-N--- └──▌ NE int [000029] H----+----- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] -----+----- └──▌ LCL_VAR int V06 tmp3 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) [000037] -A-X-+----- ▌ ASG ref [000036] D----+-N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X-+----- └──▌ IND ref [000034] -----+----- └──▌ ADD byref [000032] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000033] -----+----- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) [000046] -A---+----- ▌ ASG int [000045] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000056] -----+----- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) [000048] -ACXG+----- ▌ ASG int [000047] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --CXG+----- └──▌ CALL ind int [000061] -A-X------- this setup ├──▌ ASG ref [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- │ └──▌ IND ref [000052] -----+----- │ └──▌ ADD byref [000051] -----+----- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- │ └──▌ CNS_INT int 4 [000017] -----+----- arg2 on STK ├──▌ BOX ref [000016] -----+----- │ └──▌ LCL_VAR ref V03 tmp0 [000049] -----+----- calli tgt └──▌ LCL_VAR int V06 tmp3 [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 [000002] -----+----- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) [000020] -----+----- ▌ RETURN int [000063] -----+----- └──▌ CAST int <- bool <- int [000021] -----+----- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable *************** Starting PHASE Clone loops *************** In optCloneLoops() No loops to clone *************** Finishing PHASE Clone loops [no changes] *************** Starting PHASE Unroll loops *************** Finishing PHASE Unroll loops [no changes] *************** Starting PHASE Clear loop info *************** Finishing PHASE Clear loop info [no changes] *************** Starting PHASE Morph array ops No multi-dimensional array references in the function *************** Finishing PHASE Morph array ops [no changes] *************** Starting PHASE Mark local vars *************** In lvaMarkLocalVars() *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** *** marking local variables in block BB01 (weight=1 ) STMT00001 ( ??? ... ??? ) [000014] -A-XG+----- ▌ ASG ref [000013] D----+-N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG+----- └──▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] New refCnts for V04: refCnt = 1, refCntWtd = 2 Marking EH Var V04 as a register candidate. New refCnts for V00: refCnt = 1, refCntWtd = 1 STMT00005 ( ??? ... ??? ) [000027] -A-X-+----- ▌ ASG int [000026] D----+-N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X-+----- └──▌ IND int [000024] -----+----- └──▌ ADD byref [000022] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000023] -----+----- └──▌ CNS_INT int 12 New refCnts for V06: refCnt = 1, refCntWtd = 1 V06 needs explicit zero init. Disqualified as a single-def register candidate. New refCnts for V04: refCnt = 2, refCntWtd = 4 STMT00006 ( ??? ... ??? ) [000031] -----+----- ▌ JTRUE void [000030] J----+-N--- └──▌ NE int [000029] H----+----- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] -----+----- └──▌ LCL_VAR int V06 tmp3 New refCnts for V06: refCnt = 2, refCntWtd = 2 *** marking local variables in block BB02 (weight=1 ) STMT00007 ( ??? ... ??? ) [000037] -A-X-+----- ▌ ASG ref [000036] D----+-N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X-+----- └──▌ IND ref [000034] -----+----- └──▌ ADD byref [000032] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000033] -----+----- └──▌ CNS_INT int 4 New refCnts for V07: refCnt = 1, refCntWtd = 1 Marking EH Var V07 as a register candidate. New refCnts for V04: refCnt = 3, refCntWtd = 6 STMT00009 ( ??? ... ??? ) [000046] -A---+----- ▌ ASG int [000045] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000056] -----+----- └──▌ CNS_INT int 0 New refCnts for V05: refCnt = 1, refCntWtd = 1 V05 needs explicit zero init. Disqualified as a single-def register candidate. *** marking local variables in block BB03 (weight=0 ) STMT00010 ( ??? ... ??? ) [000048] -ACXG+----- ▌ ASG int [000047] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --CXG+----- └──▌ CALL ind int [000061] -A-X------- this setup ├──▌ ASG ref [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- │ └──▌ IND ref [000052] -----+----- │ └──▌ ADD byref [000051] -----+----- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- │ └──▌ CNS_INT int 4 [000017] -----+----- arg2 on STK ├──▌ BOX ref [000016] -----+----- │ └──▌ LCL_VAR ref V03 tmp0 [000049] -----+----- calli tgt └──▌ LCL_VAR int V06 tmp3 [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 [000002] -----+----- arg1 in edx └──▌ LCL_VAR ref V01 arg1 New refCnts for V05: refCnt = 2, refCntWtd = 1 New refCnts for V08: refCnt = 1, refCntWtd = 0 Marking EH Var V08 as a register candidate. New refCnts for V04: refCnt = 4, refCntWtd = 6 New refCnts for V03: refCnt = 1, refCntWtd = 0 New refCnts for V08: refCnt = 2, refCntWtd = 0 New refCnts for V01: refCnt = 1, refCntWtd = 0 New refCnts for V06: refCnt = 3, refCntWtd = 2 *** marking local variables in block BB04 (weight=1 ) STMT00004 ( ??? ... ??? ) [000020] -----+----- ▌ RETURN int [000063] -----+----- └──▌ CAST int <- bool <- int [000021] -----+----- └──▌ LCL_VAR int V05 tmp2 New refCnts for V05: refCnt = 3, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** New refCnts for V00: refCnt = 2, refCntWtd = 2 New refCnts for V00: refCnt = 3, refCntWtd = 3 New refCnts for V01: refCnt = 2, refCntWtd = 1 New refCnts for V01: refCnt = 3, refCntWtd = 2 *************** Finishing PHASE Mark local vars [no changes] *************** Starting PHASE Opt add copies *************** In optAddCopies() *************** Finishing PHASE Opt add copies [no changes] *************** Starting PHASE Optimize bools *************** In optOptimizeBools() optimized 0 BBJ_COND cases, 0 BBJ_RETURN cases in 1 passes *************** Finishing PHASE Optimize bools Trees after Optimize bools ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) [000014] -A-XG+----- ▌ ASG ref [000013] D----+-N--- ├──▌ LCL_VAR ref V04 tmp1 [000001] ---XG+----- └──▌ IND ref [000059] -----+----- └──▌ ADD byref [000000] -----+----- ├──▌ LCL_VAR ref V00 this [000058] -----+----- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) [000027] -A-X-+----- ▌ ASG int [000026] D----+-N--- ├──▌ LCL_VAR int V06 tmp3 [000025] ---X-+----- └──▌ IND int [000024] -----+----- └──▌ ADD byref [000022] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000023] -----+----- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) [000031] -----+----- ▌ JTRUE void [000030] J----+-N--- └──▌ NE int [000029] H----+----- ├──▌ CNS_INT(h) int 0xEF90DC8 ftn [000028] -----+----- └──▌ LCL_VAR int V06 tmp3 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) [000037] -A-X-+----- ▌ ASG ref [000036] D----+-N--- ├──▌ LCL_VAR ref V07 tmp4 [000035] ---X-+----- └──▌ IND ref [000034] -----+----- └──▌ ADD byref [000032] -----+----- ├──▌ LCL_VAR ref V04 tmp1 [000033] -----+----- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) [000046] -A---+----- ▌ ASG int [000045] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000056] -----+----- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) [000048] -ACXG+----- ▌ ASG int [000047] D----+-N--- ├──▌ LCL_VAR int V05 tmp2 [000018] --CXG+----- └──▌ CALL ind int [000061] -A-X------- this setup ├──▌ ASG ref [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 [000053] ---X-+----- │ └──▌ IND ref [000052] -----+----- │ └──▌ ADD byref [000051] -----+----- │ ├──▌ LCL_VAR ref V04 tmp1 [000050] -----+----- │ └──▌ CNS_INT int 4 [000017] -----+----- arg2 on STK ├──▌ BOX ref [000016] -----+----- │ └──▌ LCL_VAR ref V03 tmp0 [000049] -----+----- calli tgt └──▌ LCL_VAR int V06 tmp3 [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 [000002] -----+----- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) [000020] -----+----- ▌ RETURN int [000063] -----+----- └──▌ CAST int <- bool <- int [000021] -----+----- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable *************** Starting PHASE Find oper order *************** In fgFindOperOrder() *************** Finishing PHASE Find oper order Trees after Find oper order ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 ( 4, 4) [000001] ---XG------ └──▌ IND ref ( 2, 2) [000059] -------N--- └──▌ ADD byref ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) ( 8, 7) [000027] -A-X----R-- ▌ ASG int ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 ( 4, 4) [000025] ---X------- └──▌ IND int ( 2, 2) [000024] -------N--- └──▌ ADD byref ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) ( 7, 9) [000031] ----------- ▌ JTRUE void ( 5, 7) [000030] J------N--- └──▌ NE int ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) ( 8, 7) [000037] -A-X----R-- ▌ ASG ref ( 3, 2) [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 ( 4, 4) [000035] ---X------- └──▌ IND ref ( 2, 2) [000034] -------N--- └──▌ ADD byref ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) ( 5, 4) [000046] -A------R-- ▌ ASG int ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) ( 53, 26) [000048] -ACXG---R-- ▌ ASG int ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 ( 4, 4) [000053] ---X------- │ └──▌ IND ref ( 2, 2) [000052] -------N--- │ └──▌ ADD byref ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) ( 5, 5) [000020] ----------- ▌ RETURN int ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable *************** Starting PHASE Set block order *************** In fgSetBlockOrder() The biggest BB has 14 tree nodes *************** Finishing PHASE Set block order Trees after Set block order ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N006 ( 8, 7) [000037] -A-X----R-- ▌ ASG ref N005 ( 3, 2) [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 N004 ( 4, 4) [000035] ---X------- └──▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable Trees before Build SSA representation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N006 ( 8, 7) [000037] -A-X----R-- ▌ ASG ref N005 ( 3, 2) [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 N004 ( 4, 4) [000035] ---X------- └──▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Build SSA representation *************** In SsaBuilder::Build() [SsaBuilder] Max block count is 5. ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** Exception Handling table is empty [SsaBuilder] Topologically sorted the graph. [SsaBuilder::ComputeImmediateDom] Inside fgBuildDomTree After computing the Dominance Tree: BB01 : BB04 BB03 BB02 *************** In fgLocalVarLiveness() In fgLocalVarLivenessInit Tracked variable (8 out of 9) table: V04 tmp1 [ ref]: refCnt = 4, refCntWtd = 6 V00 this [ ref]: refCnt = 3, refCntWtd = 3 V01 arg1 [ ref]: refCnt = 3, refCntWtd = 2 V05 tmp2 [ int]: refCnt = 3, refCntWtd = 2 V06 tmp3 [ int]: refCnt = 3, refCntWtd = 2 V07 tmp4 [ ref]: refCnt = 1, refCntWtd = 1 V08 tmp5 [ ref]: refCnt = 2, refCntWtd = 0 V03 tmp0 [ ref]: refCnt = 1, refCntWtd = 0 *************** In fgPerBlockLocalVarLiveness() BB01 USE(1)={ V00 } + ByrefExposed + GcHeap DEF(2)={V04 V06} BB02 USE(1)={V04 } + ByrefExposed + GcHeap DEF(2)={ V05 V07} BB03 USE(4)={V04 V01 V06 V03} + ByrefExposed + GcHeap DEF(2)={ V05 V08 } + ByrefExposed* + GcHeap* BB04 USE(1)={V05} DEF(0)={ } ** Memory liveness computed, GcHeap states and ByrefExposed states match *************** In fgInterBlockLocalVarLiveness() BB liveness after fgLiveVarAnalysis(): BB01 IN (3)={ V00 V01 V03} + ByrefExposed + GcHeap OUT(4)={V04 V01 V06 V03} + ByrefExposed + GcHeap BB02 IN (1)={V04 } + ByrefExposed + GcHeap OUT(1)={ V05} BB03 IN (4)={V04 V01 V06 V03} + ByrefExposed + GcHeap OUT(1)={ V05 } BB04 IN (1)={V05} OUT(0)={ } BB02 - Dead assignment has side effects... N006 ( 8, 7) [000037] -A-X----R-- ▌ ASG ref N005 ( 3, 2) [000036] D------N--- ├──▌ LCL_VAR ref V07 tmp4 N004 ( 4, 4) [000035] ---X------- └──▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 top level assign Extracted side effects list... N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 fgComputeLife modified tree: N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 *************** In optRemoveRedundantZeroInits() Marking V04 as having an explicit init Marking V06 as having an explicit init *************** In SsaBuilder::InsertPhiFunctions() Inserting phi functions: Added PHI definition for V05 at start of BB04. *************** In SsaBuilder::RenameVariables() *************** Finishing PHASE Build SSA representation Trees after Build SSA representation ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 N003 ( 0, 0) [000065] ----------- └──▌ PHI int N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable *************** Starting PHASE Early Value Propagation no arrays or null checks in the method *************** Finishing PHASE Early Value Propagation [no changes] *************** Starting PHASE Do value numbering *************** In fgValueNumber() Memory Initial Value in BB01 is: $c0 The SSA definition for ByrefExposed (#1) at start of BB01 is $c0 {InitVal($42)} The SSA definition for GcHeap (#1) at start of BB01 is $c0 {InitVal($42)} ***** BB01, STMT00001(before) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] N001 [000000] LCL_VAR V00 this u:1 (last use) => $80 {InitVal($40)} N002 [000058] CNS_INT 4 Fseq[untypedPredicate] => $43 {IntCns 4} N003 [000059] ADD => $100 {ADD($43, $80)} VNForHandle(untypedPredicate) is $140, fieldType is ref, size = 4 VNForMapSelect($c0, $140):mem returns $180 {$c0[$140]} VNForMapSelect($180, $80):ref returns $1c0 {$180[$80]} N004 [000001] IND => N005 [000013] LCL_VAR V04 tmp1 d:1 => $VN.Void Tree [000014] assigned VN to local var V04/1: N006 [000014] ASG => $1c4 {norm=$VN.Void, exc=$1c1 {NullPtrExc($80)}} ***** BB01, STMT00001(after) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 --------- ***** BB01, STMT00005(before) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 N001 [000022] LCL_VAR V04 tmp1 u:1 => N002 [000023] CNS_INT 12 => $44 {IntCns 12} N003 [000024] ADD => N004 [000025] IND => N005 [000026] LCL_VAR V06 tmp3 d:1 => $VN.Void Tree [000027] assigned VN to local var V06/1: N006 [000027] ASG => ***** BB01, STMT00005(after) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 --------- ***** BB01, STMT00006(before) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn N001 [000028] LCL_VAR V06 tmp3 u:1 => N002 [000029] CNS_INT(h) 0xEF90DC8 ftn => $141 {Hnd const: 0x0EF90DC8} N003 [000030] NE => N004 [000031] JTRUE => $VN.Void ***** BB01, STMT00006(after) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 finish(BB01). Succ(BB02). Not yet completed. All preds complete, adding to allDone. Succ(BB03). Not yet completed. All preds complete, adding to allDone. The SSA definition for ByrefExposed (#1) at start of BB03 is $c0 {InitVal($42)} The SSA definition for GcHeap (#1) at start of BB03 is $c0 {InitVal($42)} ***** BB03, STMT00010(before) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) N001 [000051] LCL_VAR V04 tmp1 u:1 (last use) => N002 [000050] CNS_INT 4 => $43 {IntCns 4} N003 [000052] ADD => N004 [000053] IND => N005 [000060] LCL_VAR V08 tmp5 d:1 => $VN.Void Tree [000061] assigned VN to local var V08/1: N006 [000061] ASG => N007 [000016] LCL_VAR V03 tmp0 u:1 (last use) => $VN.Null N008 [000017] BOX => $VN.Null N009 [000062] LCL_VAR V08 tmp5 u:1 (last use) => N010 [000002] LCL_VAR V01 arg1 u:1 (last use) => $81 {InitVal($41)} N011 [000049] LCL_VAR V06 tmp3 u:1 (last use) => fgCurMemoryVN[GcHeap] assigned for CALL at [000018] to VN: $c1. N012 [000018] CALL ind => $241 {MemOpaque:NotInLoop} N013 [000047] LCL_VAR V05 tmp2 d:2 => $VN.Void Tree [000048] assigned VN to local var V05/2: $241 {MemOpaque:NotInLoop} N014 [000048] ASG => $VN.Void ***** BB03, STMT00010(after) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 finish(BB03). Succ(BB04). Not yet completed. Not all preds complete Adding to notallDone, if necessary... Was necessary. The SSA definition for ByrefExposed (#1) at start of BB02 is $c0 {InitVal($42)} The SSA definition for GcHeap (#1) at start of BB02 is $c0 {InitVal($42)} ***** BB02, STMT00007(before) N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 N001 [000032] LCL_VAR V04 tmp1 u:1 (last use) => N002 [000033] CNS_INT 4 => $43 {IntCns 4} N003 [000034] ADD => N004 [000035] IND => ***** BB02, STMT00007(after) N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 --------- ***** BB02, STMT00009(before) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 N001 [000056] CNS_INT 0 => $40 {IntCns 0} N002 [000045] LCL_VAR V05 tmp2 d:3 => $VN.Void Tree [000046] assigned VN to local var V05/3: $40 {IntCns 0} N003 [000046] ASG => $VN.Void ***** BB02, STMT00009(after) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 finish(BB02). Succ(BB04). Not yet completed. All preds complete, adding to allDone. SSA PHI definition: set VN of local 5/1 to $201 {PhiDef($5, $1, $284)} . The SSA definition for ByrefExposed (#1) at start of BB04 is $c0 {InitVal($42)} The SSA definition for GcHeap (#1) at start of BB04 is $c0 {InitVal($42)} ***** BB04, STMT00004(before) N003 ( 5, 5) [000020] ----------- ▌ RETURN int N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) N001 [000021] LCL_VAR V05 tmp2 u:1 (last use) => $201 {PhiDef($5, $1, $284)} N002 [000063] CAST => $285 {$201, int <- bool <- int} N003 [000020] RETURN => $VN.Void ***** BB04, STMT00004(after) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 finish(BB04). *************** Finishing PHASE Do value numbering Trees after Do value numbering ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable *************** Starting PHASE Hoist loop code No loops; no hoisting *************** Finishing PHASE Hoist loop code [no changes] *************** Starting PHASE VN based copy prop *************** In optVnCopyProp() Copy Assertion for BB01 curSsaName stack: { } Live vars: {V00 V01 V03} => {V01 V03} Live vars: {V01 V03} => {V01 V03 V04} Live vars: {V01 V03 V04} => {V01 V03 V04 V06} Copy Assertion for BB04 curSsaName stack: { 0-[000000]:V00 4-[000013]:V04 6-[000026]:V06 } Live vars: {V05} => {} Copy Assertion for BB03 curSsaName stack: { 0-[000000]:V00 4-[000013]:V04 6-[000026]:V06 } Live vars: {V01 V03 V04 V06} => {V01 V03 V06} Live vars: {V01 V03 V06} => {V01 V03 V06 V08} Live vars: {V01 V03 V06 V08} => {V01 V06 V08} Live vars: {V01 V06 V08} => {V01 V06} Live vars: {V01 V06} => {V06} Live vars: {V06} => {} Live vars: {} => {V05} Copy Assertion for BB02 curSsaName stack: { 0-[000000]:V00 1-[000002]:V01 4-[000013]:V04 6-[000026]:V06 } Live vars: {V04} => {} Live vars: {} => {V05} *************** Finishing PHASE VN based copy prop [phase has not yet enabled common post phase checks] *************** Starting PHASE Redundant branch opts ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- optRedundantRelop in BB01; jump tree is N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ... checking previous tree N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 -- prev tree VN is not related ... checking previous tree N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 -- prev tree VN is not related *************** Finishing PHASE Redundant branch opts [no changes] Trees before Optimize Valnum CSEs ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Optimize Valnum CSEs Candidate CSE #01, key=$2c0 in BB03, [cost= 4, size= 4]: N004 ( 4, 4) CSE #01 (use)[000053] ---X------- ▌ IND ref N003 ( 2, 2) [000052] -------N--- └──▌ ADD byref N001 ( 1, 1) [000051] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- └──▌ CNS_INT int 4 $43 Blocks that generate CSE def/uses BB02 cseGen = 00000003 CSE #01.c BB03 cseGen = 00000001 CSE #01 Performing DataFlow for ValnumCSE's After performing DataFlow for ValnumCSE's BB01 in: 00000000 gen: 00000000 out: 00000000 BB02 in: 00000000 gen: 00000003 CSE #01.c out: 00000003 CSE #01.c BB03 in: 00000000 gen: 00000001 CSE #01 out: 00000001 CSE #01 BB04 in: 00000001 CSE #01 gen: 00000000 out: 00000001 CSE #01 Labeling the CSEs with Use/Def information BB02 [000035] Def of CSE #01 [weight=1 ] BB03 [000053] Def of CSE #01 [weight=0 ] ************ Trees at start of optValnumCSE_Heuristic() ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N004 ( 4, 4) CSE #01 (def)[000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) CSE #01 (def)[000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------------------------------------------------------------------------------------------------------------- Aggressive CSE Promotion cutoff is 300.000000 Moderate CSE Promotion cutoff is 100.000000 enregCount is 8 Framesize estimate is 0x0000 We have a small frame Sorted CSE candidates: CSE #01, {$2c0, $2 } useCnt=0: [def=100.000000, use=0.000000, cost= 4 ] :: N004 ( 4, 4) CSE #01 (def)[000035] ---X------- ▌ IND ref Skipped CSE #01 because use count is 0 *************** Finishing PHASE Optimize Valnum CSEs [phase has not yet enabled common post phase checks] *************** Starting PHASE Assertion prop *************** In optAssertionPropMain() Blocks/Trees at start of phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00007 ( ??? ... ??? ) N004 ( 4, 4) [000035] ---X------- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 3, 2) [000016] ----------- │ └──▌ LCL_VAR ref V03 tmp0 u:1 (last use) $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------------------------------------------------------------------------------------------------------------- GenTreeNode creates assertion: N004 ( 4, 4) [000001] ---XG------ ▌ IND ref In BB01 New Global Constant Assertion: ($80,$0) V00.01 != null, index = #01 GenTreeNode creates assertion: N004 ( 4, 4) [000025] ---X------- ▌ IND int In BB01 New Global Constant Assertion: ($82,$0) V04.01 != null, index = #02 GenTreeNode creates assertion: N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void In BB01 New Global Constant Assertion: ($240,$141) V06.01 != [0EF90DC8], index = #03 GenTreeNode creates assertion: N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void In BB01 New Global Constant Assertion: ($240,$141) V06.01 == [0EF90DC8], index = #04 After constant propagation on [000016]: STMT00010 ( ??? ... ??? ) N014 ( 53, 26) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 49, 23) [000018] --CXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 9, 6) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ReMorphing args for 18.CALL: Args for [000018].CALL after fgMorphArgs: CallArg[[000062].LCL_VAR ref (By value), 1 reg: ecx, byteAlignment=4, isLate, tmpNum=V08, isTmp, processed, wellKnown[ThisPointer]] CallArg[[000002].LCL_VAR ref (By value), 1 reg: edx, byteAlignment=4, isLate, processed] CallArg[[000017].BOX ref (By value), byteSize=4, byteOffset=0, byteAlignment=4, processed] OutgoingArgsStackSize is 4 optVNAssertionPropCurStmt morphed tree: N014 ( 51, 25) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 47, 22) [000018] -ACXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] ---X------- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 7, 5) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 1, 1) [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 GenTreeNode creates assertion: N002 ( 4, 4) [000063] ----------- ▌ CAST int <- bool <- int $285 In BB04 New Global Subrange Assertion: ($201,$0) V05.01 in [0..255], index = #05 BB01 valueGen = #01 #02 #04 => BB03 valueGen = #01 #02 #03 BB02 valueGen = #02 BB03 valueGen = #02 BB04 valueGen = #NA BB01: in = #NA out = #01 #02 #04 BB03 = #01 #02 #03 BB02: in = #01 #02 #04 out = #01 #02 #04 BB03: in = #01 #02 #03 out = #01 #02 #03 BB04: in = #01 #02 out = #01 #02 Propagating #NA for BB01, stmt STMT00001, tree [000000], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000058], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000059], tree -> #NA Propagating #NA for BB01, stmt STMT00001, tree [000001], tree -> #01 Propagating #01 for BB01, stmt STMT00001, tree [000013], tree -> #NA Propagating #01 for BB01, stmt STMT00001, tree [000014], tree -> #NA Propagating #01 for BB01, stmt STMT00005, tree [000022], tree -> #NA Propagating #01 for BB01, stmt STMT00005, tree [000023], tree -> #NA Propagating #01 for BB01, stmt STMT00005, tree [000024], tree -> #NA Propagating #01 for BB01, stmt STMT00005, tree [000025], tree -> #02 Propagating #01 #02 for BB01, stmt STMT00005, tree [000026], tree -> #NA Propagating #01 #02 for BB01, stmt STMT00005, tree [000027], tree -> #NA Propagating #01 #02 for BB01, stmt STMT00006, tree [000028], tree -> #NA Propagating #01 #02 for BB01, stmt STMT00006, tree [000029], tree -> #NA Propagating #01 #02 for BB01, stmt STMT00006, tree [000030], tree -> #NA Propagating #01 #02 for BB01, stmt STMT00006, tree [000031], tree -> #03 Propagating #01 #02 #04 for BB02, stmt STMT00007, tree [000032], tree -> #NA Propagating #01 #02 #04 for BB02, stmt STMT00007, tree [000033], tree -> #NA Propagating #01 #02 #04 for BB02, stmt STMT00007, tree [000034], tree -> #NA Propagating #01 #02 #04 for BB02, stmt STMT00007, tree [000035], tree -> #02 VN based non-null prop in BB02: N004 ( 4, 4) [000035] ---X------- ▌ IND ref Re-morphing this stmt: STMT00007 ( ??? ... ??? ) N004 ( 4, 4) [000035] n----O----- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 removing useless STMT00007 ( ??? ... ??? ) N004 ( 4, 4) [000035] n----O----- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 from BB02 optAssertionPropMain removed tree: N004 ( 4, 4) [000035] n----O----- ▌ IND ref N003 ( 2, 2) [000034] -------N--- └──▌ ADD byref N001 ( 1, 1) [000032] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000033] ----------- └──▌ CNS_INT int 4 $43 Propagating #01 #02 #04 for BB02, stmt STMT00009, tree [000056], tree -> #NA Propagating #01 #02 #04 for BB02, stmt STMT00009, tree [000045], tree -> #NA Propagating #01 #02 #04 for BB02, stmt STMT00009, tree [000046], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000051], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000050], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000052], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000053], tree -> #02 VN based non-null prop in BB03: N004 ( 4, 4) [000053] ---X------- ▌ IND ref Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000060], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000061], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000069], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000017], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000062], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000002], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000049], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000018], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000047], tree -> #NA Propagating #01 #02 #03 for BB03, stmt STMT00010, tree [000048], tree -> #NA Re-morphing this stmt: STMT00010 ( ??? ... ??? ) N014 ( 51, 25) [000048] -ACXG---R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 47, 22) [000018] -ACXG------ └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A-X----R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] n----O----- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 7, 5) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 1, 1) [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ReMorphing args for 18.CALL: Args for [000018].CALL after fgMorphArgs: CallArg[[000062].LCL_VAR ref (By value), 1 reg: ecx, byteAlignment=4, isLate, tmpNum=V08, isTmp, processed, wellKnown[ThisPointer]] CallArg[[000002].LCL_VAR ref (By value), 1 reg: edx, byteAlignment=4, isLate, processed] CallArg[[000017].BOX ref (By value), byteSize=4, byteOffset=0, byteAlignment=4, processed] OutgoingArgsStackSize is 4 optAssertionPropMain morphed tree: N014 ( 51, 25) [000048] -ACXGO--R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 47, 22) [000018] -ACXGO----- └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A---O--R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] n----O----- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 7, 5) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 1, 1) [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 Propagating #01 #02 for BB04, stmt STMT00004, tree [000021], tree -> #NA Propagating #01 #02 for BB04, stmt STMT00004, tree [000063], tree -> #NA Propagating #01 #02 for BB04, stmt STMT00004, tree [000020], tree -> #NA *************** In fgDebugCheckBBlist *************** Finishing PHASE Assertion prop [phase has not yet enabled common post phase checks] *************** Starting PHASE Optimize index checks *************** In OptimizeRangeChecks() Blocks/trees before phase ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB03 [???..???), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 51, 25) [000048] -ACXGO--R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 47, 22) [000018] -ACXGO----- └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A---O--R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] n----O----- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 7, 5) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 1, 1) [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------------------------------------------------------------------------------------------------------------- *************** Finishing PHASE Optimize index checks [phase has not yet enabled common post phase checks] *************** Starting PHASE Insert GC Polls *************** Finishing PHASE Insert GC Polls [no changes] *************** Starting PHASE Optimize layout *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgExpandRarelyRunBlocks() *************** In fgRelocateEHRegions() *************** In fgReorderBlocks() Initial BasicBlocks ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???)-> BB04 (always) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???) i internal rare hascall gcsafe newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- Decided to straighten unconditional branch at block BB02 branch to BB04 because of IBC profile data Relocated rarely run block BB03 Relocated block [BB03..BB03] inserted after BB04 at the end of method Changed an unconditional jump from BB02 to the next block BB04 into a BBJ_NONE block Block BB03 ended with a BBJ_NONE, Changed to an unconditional jump to BB04 After this change in fgReorderBlocks the BB graph is: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** Finishing PHASE Optimize layout Trees after Optimize layout ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???), preds={BB01} succs={BB04} ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 51, 25) [000048] -ACXGO--R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 47, 22) [000018] -ACXGO----- └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A---O--R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] n----O----- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 7, 5) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 1, 1) [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable: loop table not valid *************** Starting PHASE Determine first cold block *************** In fgDetermineFirstColdBlock() No procedure splitting will be done for this method *************** Finishing PHASE Determine first cold block [no changes] Trees before Rationalize IR ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ***** BB01 STMT00001 ( ??? ... ??? ) N006 ( 4, 4) [000014] -A-XG---R-- ▌ ASG ref $1c4 N005 ( 1, 1) [000013] D------N--- ├──▌ LCL_VAR ref V04 tmp1 d:1 $VN.Void N004 ( 4, 4) [000001] ---XG------ └──▌ IND ref N003 ( 2, 2) [000059] -------N--- └──▌ ADD byref $100 N001 ( 1, 1) [000000] ----------- ├──▌ LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- └──▌ CNS_INT int 4 Fseq[untypedPredicate] $43 ***** BB01 STMT00005 ( ??? ... ??? ) N006 ( 8, 7) [000027] -A-X----R-- ▌ ASG int N005 ( 3, 2) [000026] D------N--- ├──▌ LCL_VAR int V06 tmp3 d:1 $VN.Void N004 ( 4, 4) [000025] ---X------- └──▌ IND int N003 ( 2, 2) [000024] -------N--- └──▌ ADD byref N001 ( 1, 1) [000022] ----------- ├──▌ LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- └──▌ CNS_INT int 12 $44 ***** BB01 STMT00006 ( ??? ... ??? ) N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void N003 ( 5, 7) [000030] J------N--- └──▌ NE int N001 ( 3, 2) [000028] ----------- ├──▌ LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- └──▌ CNS_INT(h) int 0xEF90DC8 ftn $141 ------------ BB02 [???..???), preds={BB01} succs={BB04} ***** BB02 STMT00009 ( ??? ... ??? ) N003 ( 5, 4) [000046] -A------R-- ▌ ASG int $VN.Void N002 ( 3, 2) [000045] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:3 $VN.Void N001 ( 1, 1) [000056] ----------- └──▌ CNS_INT int 0 $40 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} ***** BB04 STMT00011 ( ??? ... ??? ) N005 ( 0, 0) [000066] -A------R-- ▌ ASG int $VN.Void N004 ( 0, 0) [000064] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:1 $VN.Void N003 ( 0, 0) [000065] ----------- └──▌ PHI int $201 N001 ( 0, 0) [000068] ----------- pred BB02 ├──▌ PHI_ARG int V05 tmp2 u:3 $40 N002 ( 0, 0) [000067] ----------- pred BB03 └──▌ PHI_ARG int V05 tmp2 u:2 $241 ***** BB04 STMT00004 ( ??? ... ??? ) N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void N002 ( 4, 4) [000063] ----------- └──▌ CAST int <- bool <- int $285 N001 ( 3, 2) [000021] ----------- └──▌ LCL_VAR int V05 tmp2 u:1 (last use) $201 ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ***** BB03 STMT00010 ( ??? ... ??? ) N014 ( 51, 25) [000048] -ACXGO--R-- ▌ ASG int $VN.Void N013 ( 3, 2) [000047] D------N--- ├──▌ LCL_VAR int V05 tmp2 d:2 $VN.Void N012 ( 47, 22) [000018] -ACXGO----- └──▌ CALL ind int $241 N006 ( 8, 7) [000061] -A---O--R-- this setup ├──▌ ASG ref N005 ( 3, 2) [000060] D------N--- │ ├──▌ LCL_VAR ref V08 tmp5 d:1 $VN.Void N004 ( 4, 4) [000053] n----O----- │ └──▌ IND ref N003 ( 2, 2) [000052] -------N--- │ └──▌ ADD byref N001 ( 1, 1) [000051] ----------- │ ├──▌ LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- │ └──▌ CNS_INT int 4 $43 N008 ( 7, 5) [000017] ----------- arg2 on STK ├──▌ BOX ref $VN.Null N007 ( 1, 1) [000069] ----------- │ └──▌ CNS_INT ref null $VN.Null N011 ( 3, 2) [000049] ----------- calli tgt └──▌ LCL_VAR int V06 tmp3 u:1 (last use) N009 ( 3, 2) [000062] ----------- this in ecx ├──▌ LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- arg1 in edx └──▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Rationalize IR rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 rewriting asg(LCL_VAR, X) to STORE_LCL_VAR(X) N014 ( 51, 25) [000048] DACXGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 *************** Finishing PHASE Rationalize IR Trees after Rationalize IR ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- t58 = CNS_INT int 4 Fseq[untypedPredicate] $43 ┌──▌ t0 ref ├──▌ t58 int N003 ( 2, 2) [000059] -------N--- t59 = ▌ ADD byref $100 ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- t23 = CNS_INT int 12 $44 ┌──▌ t22 ref ├──▌ t23 int N003 ( 2, 2) [000024] -------N--- t24 = ▌ ADD byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 N001 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- t29 = CNS_INT(h) int 0xEF90DC8 ftn $141 ┌──▌ t28 int ├──▌ t29 int N003 ( 5, 7) [000030] J------N--- t30 = ▌ NE int ┌──▌ t30 int N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void ------------ BB02 [???..???), preds={BB01} succs={BB04} N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} N001 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 (last use) $201 ┌──▌ t21 int N002 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int $285 ┌──▌ t63 int N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- t50 = CNS_INT int 4 $43 ┌──▌ t51 ref ├──▌ t50 int N003 ( 2, 2) [000052] -------N--- t52 = ▌ ADD byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 N007 ( 1, 1) [000069] ----------- t69 = CNS_INT ref null $VN.Null N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t69 ref arg2 on STK ├──▌ t62 ref this in ecx ├──▌ t2 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable: loop table not valid *************** Starting PHASE Do 'simple' lowering *************** In fgDebugCheckBBlist *************** Finishing PHASE Do 'simple' lowering [phase has not yet enabled common post phase checks] Trees before Lowering nodeinfo ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 N002 ( 1, 1) [000058] ----------- t58 = CNS_INT int 4 Fseq[untypedPredicate] $43 ┌──▌ t0 ref ├──▌ t58 int N003 ( 2, 2) [000059] -------N--- t59 = ▌ ADD byref $100 ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 N002 ( 1, 1) [000023] ----------- t23 = CNS_INT int 12 $44 ┌──▌ t22 ref ├──▌ t23 int N003 ( 2, 2) [000024] -------N--- t24 = ▌ ADD byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 N001 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] H---------- t29 = CNS_INT(h) int 0xEF90DC8 ftn $141 ┌──▌ t28 int ├──▌ t29 int N003 ( 5, 7) [000030] J------N--- t30 = ▌ NE int ┌──▌ t30 int N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void ------------ BB02 [???..???), preds={BB01} succs={BB04} N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} N001 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 (last use) $201 ┌──▌ t21 int N002 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int $285 ┌──▌ t63 int N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) N002 ( 1, 1) [000050] ----------- t50 = CNS_INT int 4 $43 ┌──▌ t51 ref ├──▌ t50 int N003 ( 2, 2) [000052] -------N--- t52 = ▌ ADD byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 N007 ( 1, 1) [000069] ----------- t69 = CNS_INT ref null $VN.Null N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t69 ref arg2 on STK ├──▌ t62 ref this in ecx ├──▌ t2 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Lowering nodeinfo Addressing mode: Base N001 ( 1, 1) [000000] ----------- ▌ LCL_VAR ref V00 this u:1 (last use) $80 + 4 Removing unused node: N002 ( 1, 1) [000058] -c--------- ▌ CNS_INT int 4 Fseq[untypedPredicate] $43 New addressing mode node: N003 ( 2, 2) [000059] ----------- ▌ LEA(b+4) byref lowering store lcl var/field (before): N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 ┌──▌ t0 ref N003 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 lowering store lcl var/field (after): N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 ┌──▌ t0 ref N003 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 Addressing mode: Base N001 ( 1, 1) [000022] ----------- ▌ LCL_VAR ref V04 tmp1 u:1 + 12 Removing unused node: N002 ( 1, 1) [000023] -c--------- ▌ CNS_INT int 12 $44 New addressing mode node: N003 ( 2, 2) [000024] ----------- ▌ LEA(b+12) byref lowering store lcl var/field (before): N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ┌──▌ t22 ref N003 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 lowering store lcl var/field (after): N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ┌──▌ t22 ref N003 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 lowering store lcl var/field (before): N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 lowering store lcl var/field (after): N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 lowering GT_RETURN N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void ============Addressing mode: Base N001 ( 1, 1) [000051] ----------- ▌ LCL_VAR ref V04 tmp1 u:1 (last use) + 4 Removing unused node: N002 ( 1, 1) [000050] -c--------- ▌ CNS_INT int 4 $43 New addressing mode node: N003 ( 2, 2) [000052] ----------- ▌ LEA(b+4) byref lowering store lcl var/field (before): N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) ┌──▌ t51 ref N003 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 lowering store lcl var/field (after): N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) ┌──▌ t51 ref N003 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 lowering call (before): N007 ( 1, 1) [000069] ----------- t69 = CNS_INT ref null $VN.Null N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t69 ref arg2 on STK ├──▌ t62 ref this in ecx ├──▌ t2 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 args: ====== lowering arg : N007 ( 1, 1) [000069] ----------- ▌ CNS_INT ref null $VN.Null new node is : [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) late: ====== lowering arg : N009 ( 3, 2) [000062] ----------- ▌ LCL_VAR ref V08 tmp5 u:1 (last use) new node is : [000071] ----------- ▌ PUTARG_REG ref REG ecx lowering arg : N010 ( 3, 2) [000002] ----------- ▌ LCL_VAR ref V01 arg1 u:1 (last use) $81 new node is : [000072] ----------- ▌ PUTARG_REG ref REG edx lowering call (after): N007 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null $VN.Null ┌──▌ t69 ref [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) ┌──▌ t62 ref [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 ┌──▌ t2 ref [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 lowering store lcl var/field (before): N007 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null $VN.Null ┌──▌ t69 ref [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) ┌──▌ t62 ref [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 ┌──▌ t2 ref [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 lowering store lcl var/field (after): N007 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null $VN.Null ┌──▌ t69 ref [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) ┌──▌ t62 ref [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 ┌──▌ t2 ref [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 Lower has completed modifying nodes. ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 ┌──▌ t0 ref N003 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ┌──▌ t22 ref N003 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 N001 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] Hc--------- t29 = CNS_INT(h) int 0xEF90DC8 ftn $141 ┌──▌ t28 int ├──▌ t29 int N003 ( 5, 7) [000030] J------N--- ▌ NE void N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void ------------ BB02 [???..???), preds={BB01} succs={BB04} N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} N001 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 (last use) $201 ┌──▌ t21 int N002 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int $285 ┌──▌ t63 int N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) ┌──▌ t51 ref N003 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 N007 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null $VN.Null ┌──▌ t69 ref [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) ┌──▌ t62 ref [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 ┌──▌ t2 ref [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ------------------------------------------------------------------------------------------------------------------- *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** New refCnts for V00: refCnt = 1, refCntWtd = 1 New refCnts for V04: refCnt = 1, refCntWtd = 2 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V06: refCnt = 1, refCntWtd = 1 New refCnts for V06: refCnt = 2, refCntWtd = 2 New refCnts for V05: refCnt = 1, refCntWtd = 1 New refCnts for V05: refCnt = 2, refCntWtd = 2 New refCnts for V04: refCnt = 3, refCntWtd = 4 New refCnts for V08: refCnt = 1, refCntWtd = 0 New refCnts for V08: refCnt = 2, refCntWtd = 0 New refCnts for V01: refCnt = 1, refCntWtd = 0 New refCnts for V06: refCnt = 3, refCntWtd = 2 New refCnts for V05: refCnt = 3, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** New refCnts for V00: refCnt = 2, refCntWtd = 2 New refCnts for V00: refCnt = 3, refCntWtd = 3 New refCnts for V01: refCnt = 2, refCntWtd = 1 New refCnts for V01: refCnt = 3, refCntWtd = 2 *************** In fgLocalVarLiveness() ; Initial local variable assignments ; ; V00 this ref this class-hnd single-def ; V01 arg1 ref class-hnd single-def ; V02 arg2 int single-def ; V03 tmp0 ref must-init class-hnd exact "Single-def Box Helper" ; V04 tmp1 ref class-hnd single-def "impImportAndPushBox" ; V05 tmp2 int "guarded devirt return temp" ; V06 tmp3 int "guarded devirt call target temp" ; V07 tmp4 ref class-hnd single-def "guarded devirt this exact temp" ; V08 tmp5 ref single-def "argument with side effect" In fgLocalVarLivenessInit Tracked variable (6 out of 9) table: V00 this [ ref]: refCnt = 3, refCntWtd = 3 V01 arg1 [ ref]: refCnt = 3, refCntWtd = 2 V04 tmp1 [ ref]: refCnt = 3, refCntWtd = 4 V05 tmp2 [ int]: refCnt = 3, refCntWtd = 2 V06 tmp3 [ int]: refCnt = 3, refCntWtd = 2 V08 tmp5 [ ref]: refCnt = 2, refCntWtd = 0 *************** In fgPerBlockLocalVarLiveness() BB01 USE(1)={V00 } + ByrefExposed + GcHeap DEF(2)={ V04 V06} BB02 USE(0)={ } DEF(1)={V05} BB04 USE(1)={V05} DEF(0)={ } BB03 USE(3)={V01 V04 V06 } + ByrefExposed + GcHeap DEF(2)={ V05 V08} + ByrefExposed* + GcHeap* ** Memory liveness computed, GcHeap states and ByrefExposed states match *************** In fgInterBlockLocalVarLiveness() BB liveness after fgLiveVarAnalysis(): BB01 IN (2)={V00 V01 } + ByrefExposed + GcHeap OUT(3)={ V01 V04 V06} + ByrefExposed + GcHeap BB02 IN (0)={ } OUT(1)={V05} BB04 IN (1)={V05} OUT(0)={ } BB03 IN (3)={V01 V04 V06} + ByrefExposed + GcHeap OUT(1)={ V05 } *************** In fgUpdateFlowGraph() Before updating the flow graph: ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgRemoveDeadBlocks() Removing unreachable blocks for fgRemoveDeadBlocks iteration #1 *************** In fgDebugCheckBBlist *** lvaComputeRefCounts *** *** lvaComputeRefCounts -- explicit counts *** New refCnts for V00: refCnt = 1, refCntWtd = 1 New refCnts for V04: refCnt = 1, refCntWtd = 2 New refCnts for V04: refCnt = 2, refCntWtd = 4 New refCnts for V06: refCnt = 1, refCntWtd = 1 New refCnts for V06: refCnt = 2, refCntWtd = 2 New refCnts for V05: refCnt = 1, refCntWtd = 1 New refCnts for V05: refCnt = 2, refCntWtd = 2 New refCnts for V04: refCnt = 3, refCntWtd = 4 New refCnts for V08: refCnt = 1, refCntWtd = 0 New refCnts for V08: refCnt = 2, refCntWtd = 0 New refCnts for V01: refCnt = 1, refCntWtd = 0 New refCnts for V06: refCnt = 3, refCntWtd = 2 New refCnts for V05: refCnt = 3, refCntWtd = 2 *** lvaComputeRefCounts -- implicit counts *** New refCnts for V00: refCnt = 2, refCntWtd = 2 New refCnts for V00: refCnt = 3, refCntWtd = 3 New refCnts for V01: refCnt = 2, refCntWtd = 1 New refCnts for V01: refCnt = 3, refCntWtd = 2 *************** Finishing PHASE Lowering nodeinfo Trees after Lowering nodeinfo ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 ┌──▌ t0 ref N003 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ┌──▌ t22 ref N003 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 N001 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] Hc--------- t29 = CNS_INT(h) int 0xEF90DC8 ftn $141 ┌──▌ t28 int ├──▌ t29 int N003 ( 5, 7) [000030] J------N--- ▌ NE void N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void ------------ BB02 [???..???), preds={BB01} succs={BB04} N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} N001 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 (last use) $201 ┌──▌ t21 int N002 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int $285 ┌──▌ t63 int N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) ┌──▌ t51 ref N003 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 N007 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null $VN.Null ┌──▌ t69 ref [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) ┌──▌ t62 ref [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 ┌──▌ t2 ref [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ------------------------------------------------------------------------------------------------------------------- *************** In fgDebugCheckBBlist *************** In fgDebugCheckLoopTable: loop table not valid Trees before Calculate stack level slots ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} N001 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 (last use) $80 ┌──▌ t0 ref N003 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref ┌──▌ t59 byref N004 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref ┌──▌ t1 ref N006 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 N001 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ┌──▌ t22 ref N003 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref ┌──▌ t24 byref N004 ( 4, 4) [000025] ---X------- t25 = ▌ IND int ┌──▌ t25 int N006 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 N001 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 N002 ( 1, 4) [000029] Hc--------- t29 = CNS_INT(h) int 0xEF90DC8 ftn $141 ┌──▌ t28 int ├──▌ t29 int N003 ( 5, 7) [000030] J------N--- ▌ NE void N004 ( 7, 9) [000031] ----------- ▌ JTRUE void $VN.Void ------------ BB02 [???..???), preds={BB01} succs={BB04} N001 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 $40 ┌──▌ t56 int N003 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} N001 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 (last use) $201 ┌──▌ t21 int N002 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int $285 ┌──▌ t63 int N003 ( 5, 5) [000020] ----------- ▌ RETURN int $VN.Void ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} N001 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 (last use) ┌──▌ t51 ref N003 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref ┌──▌ t52 byref N004 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref ┌──▌ t53 ref N006 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 N007 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null $VN.Null ┌──▌ t69 ref [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) N009 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 (last use) ┌──▌ t62 ref [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N010 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 (last use) $81 ┌──▌ t2 ref [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N011 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 (last use) ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N012 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int $241 ┌──▌ t18 int N014 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Calculate stack level slots *************** Finishing PHASE Calculate stack level slots [no changes] *************** Starting PHASE Linear scan register alloc Clearing modified regs. buildIntervals ======== ----------------- LIVENESS: ----------------- BB01 use: {V00} def: {V04 V06} in: {V00 V01} out: {V01 V04 V06} BB02 use: {} def: {V05} in: {} out: {V05} BB04 use: {V05} def: {} in: {V05} out: {} BB03 use: {V01 V04 V06} def: {V05 V08} in: {V01 V04 V06} out: {V05} Interval 0: ref RefPositions {} physReg:NA Preferences=[allInt] Interval 0: (V00) ref RefPositions {} physReg:NA Preferences=[allInt] Interval 1: ref RefPositions {} physReg:NA Preferences=[allInt] Interval 1: (V01) ref RefPositions {} physReg:NA Preferences=[allInt] Interval 2: ref RefPositions {} physReg:NA Preferences=[allInt] Interval 2: (V04) ref RefPositions {} physReg:NA Preferences=[allInt] Interval 3: int RefPositions {} physReg:NA Preferences=[allInt] Interval 3: (V05) int RefPositions {} physReg:NA Preferences=[allInt] Interval 4: int RefPositions {} physReg:NA Preferences=[allInt] Interval 4: (V06) int RefPositions {} physReg:NA Preferences=[allInt] Interval 5: ref RefPositions {} physReg:NA Preferences=[allInt] Interval 5: (V08) ref RefPositions {} physReg:NA Preferences=[allInt] Double alignment: Bytes that could be saved by not using EBP frame: 9 Sum of weighted ref counts for EBP enregistered variables: 162.500000 Sum of weighted ref counts for weighted stack based doubles: 0.000000 Predicting not to double-align ESP to save 9 bytes of code. FP callee save candidate vars: None floatVarCount = 0; hasLoops = false, singleExit = true ; Decided to create an EBP based frame for ETW stackwalking (BasicBlock Count) TUPLE STYLE DUMP BEFORE LSRA Start LSRA Block Sequence: Current block: BB01 Succ block: BB02, Criteria: weight, Worklist: [BB02 ] Succ block: BB03, Criteria: weight, Worklist: [BB02 BB03 ] Current block: BB02 Succ block: BB04, Criteria: weight, Worklist: [BB04 BB03 ] Current block: BB04 Current block: BB03 Final LSRA Block Sequence: BB01 ( 1 ) BB02 ( 1 ) BB04 ( 1 ) BB03 ( 0 ) BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ===== N001. V00(t0*) N003. t59 = LEA(b+4) ; t0* N004. t1 = IND ; t59 N006. V04(t14); t1 N001. V04(t22) N003. t24 = LEA(b+12); t22 N004. t25 = IND ; t24 N006. V06(t27); t25 N001. V06(t28) N002. CNS_INT(h) 0xEF90DC8 ftn N003. NE ; t28 N004. JTRUE BB02 [???..???), preds={BB01} succs={BB04} ===== N001. t56 = CNS_INT 0 N003. V05(t46); t56 BB04 [???..013) (return), preds={BB02,BB03} succs={} ===== N001. V05(t21*) N002. t63 = CAST ; t21* N003. RETURN ; t63 BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ===== N001. V04(t51*) N003. t52 = LEA(b+4) ; t51* N004. t53 = IND ; t52 N006. V08(t61); t53 N007. CNS_INT null N000. PUTARG_STK [+0x00] N009. V08(t62*) N000. t71 = PUTARG_REG; t62* N010. V01(t2*) N000. t72 = PUTARG_REG; t2* N011. V06(t49*) N012. t18 = CALL ind ; t71,t72,t49* N014. V05(t48); t18 buildIntervals second part ======== Int arg V00 in reg ecx BB00 regmask=[ecx] minReg=1 fixed wt=100.00> Int arg V01 in reg edx BB00 regmask=[edx] minReg=1 fixed wt=100.00> NEW BLOCK BB01 DefList: { } N003 ( 1, 1) [000000] ----------- ▌ LCL_VAR ref V00 this u:1 NA (last use) REG NA $80 DefList: { } N005 ( 2, 2) [000059] -c--------- ▌ LEA(b+4) byref REG NA Contained DefList: { } N007 ( 4, 4) [000001] ---XG------ ▌ IND ref REG NA LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00> Interval 6: ref RefPositions {} physReg:NA Preferences=[allInt] IND BB01 regmask=[allInt] minReg=1 wt=400.00> DefList: { N007.t1. IND } N009 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 NA REG NA BB01 regmask=[allInt] minReg=1 last wt=100.00> Assigning related to STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00> DefList: { } N011 ( 1, 1) [000022] ----------- ▌ LCL_VAR ref V04 tmp1 u:1 NA REG NA DefList: { } N013 ( 2, 2) [000024] -c--------- ▌ LEA(b+12) byref REG NA Contained DefList: { } N015 ( 4, 4) [000025] ---X------- ▌ IND int REG NA LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=400.00> Interval 7: int RefPositions {} physReg:NA Preferences=[allInt] IND BB01 regmask=[allInt] minReg=1 wt=400.00> DefList: { N015.t25. IND } N017 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 NA REG NA BB01 regmask=[allInt] minReg=1 last wt=100.00> Assigning related to STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=200.00> DefList: { } N019 ( 3, 2) [000028] ----------- ▌ LCL_VAR int V06 tmp3 u:1 NA REG NA DefList: { } N021 ( 1, 4) [000029] Hc--------- ▌ CNS_INT(h) int 0xEF90DC8 ftn REG NA $141 Contained DefList: { } N023 ( 5, 7) [000030] J------N--- ▌ NE void REG NA LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=200.00> DefList: { } N025 ( 7, 9) [000031] ----------- ▌ JTRUE void REG NA $VN.Void CHECKING LAST USES for BB01, liveout={V01 V04 V06} ============================== use: {V00} def: {V04 V06} NEW BLOCK BB02 Setting BB01 as the predecessor for determining incoming variable registers of BB02 DefList: { } N029 ( 1, 1) [000056] ----------- ▌ CNS_INT int 0 REG NA $40 Interval 8: int RefPositions {} physReg:NA Preferences=[allInt] CNS_INT BB02 regmask=[allInt] minReg=1 wt=400.00> DefList: { N029.t56. CNS_INT } N031 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 NA REG NA BB02 regmask=[allInt] minReg=1 last wt=100.00> Assigning related to STORE_LCL_VAR BB02 regmask=[allInt] minReg=1 last wt=200.00> CHECKING LAST USES for BB02, liveout={V05} ============================== use: {} def: {V05} NEW BLOCK BB04 Setting BB02 as the predecessor for determining incoming variable registers of BB04 DefList: { } N035 ( 3, 2) [000021] ----------- ▌ LCL_VAR int V05 tmp2 u:1 NA (last use) REG NA $201 DefList: { } N037 ( 4, 4) [000063] ----------- ▌ CAST int <- bool <- int REG NA $285 LCL_VAR BB04 regmask=[eax ecx edx ebx] minReg=1 last wt=200.00> Interval 9: int RefPositions {} physReg:NA Preferences=[allInt] CAST BB04 regmask=[eax ecx edx ebx] minReg=1 wt=400.00> DefList: { N037.t63. CAST } N039 ( 5, 5) [000020] ----------- ▌ RETURN int REG NA $VN.Void BB04 regmask=[eax] minReg=1 wt=100.00> BB04 regmask=[eax] minReg=1 last fixed wt=100.00> CHECKING LAST USES for BB04, liveout={} ============================== use: {V05} def: {} NEW BLOCK BB03 Setting BB01 as the predecessor for determining incoming variable registers of BB03 firstColdLoc = 43 DefList: { } N043 ( 1, 1) [000051] ----------- ▌ LCL_VAR ref V04 tmp1 u:1 NA (last use) REG NA DefList: { } N045 ( 2, 2) [000052] -c--------- ▌ LEA(b+4) byref REG NA Contained DefList: { } N047 ( 4, 4) [000053] n----O----- ▌ IND ref REG NA LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=400.00> Interval 10: ref RefPositions {} physReg:NA Preferences=[allInt] IND BB03 regmask=[allInt] minReg=1 wt=0.00> DefList: { N047.t53. IND } N049 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 NA REG NA BB03 regmask=[allInt] minReg=1 last wt=0.00> Assigning related to STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=0.00> DefList: { } N051 ( 1, 1) [000069] -c--------- ▌ CNS_INT ref null REG NA $VN.Null Contained DefList: { } N053 (???,???) [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) REG NA DefList: { } N055 ( 3, 2) [000062] ----------- ▌ LCL_VAR ref V08 tmp5 u:1 NA (last use) REG NA DefList: { } N057 (???,???) [000071] ----------- ▌ PUTARG_REG ref REG ecx BB03 regmask=[ecx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> Interval 11: ref RefPositions {} physReg:NA Preferences=[allInt] BB03 regmask=[ecx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[ecx] minReg=1 fixed wt=0.00> DefList: { N057.t71. PUTARG_REG } N059 ( 3, 2) [000002] ----------- ▌ LCL_VAR ref V01 arg1 u:1 NA (last use) REG NA $81 DefList: { N057.t71. PUTARG_REG } N061 (???,???) [000072] ----------- ▌ PUTARG_REG ref REG edx BB03 regmask=[edx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> Interval 12: ref RefPositions {} physReg:NA Preferences=[allInt] BB03 regmask=[edx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[edx] minReg=1 fixed wt=0.00> DefList: { N057.t71. PUTARG_REG; N061.t72. PUTARG_REG } N063 ( 3, 2) [000049] ----------- ▌ LCL_VAR int V06 tmp3 u:1 NA (last use) REG NA DefList: { N057.t71. PUTARG_REG; N061.t72. PUTARG_REG } N065 ( 47, 22) [000018] --CXGO----- ▌ CALL ind int REG NA $241 BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> BB03 regmask=[edx] minReg=1 last fixed wt=0.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=200.00> BB03 regmask=[eax] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> Interval 13: int RefPositions {} physReg:NA Preferences=[allInt] BB03 regmask=[eax] minReg=1 wt=0.00> CALL BB03 regmask=[eax] minReg=1 fixed wt=0.00> DefList: { N065.t18. CALL } N067 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 NA REG NA BB03 regmask=[allInt] minReg=1 last wt=0.00> Assigning related to STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=200.00> Exposed uses: BB03 regmask=[allInt] minReg=1 wt=0.00> CHECKING LAST USES for BB03, liveout={V05} ============================== use: {V01 V04 V06} def: {V05 V08} Linear scan intervals BEFORE VALIDATING INTERVALS: Interval 0: (V00) ref RefPositions {#0@0 #3@7} physReg:ecx Preferences=[ecx] Interval 1: (V01) ref RefPositions {#1@0 #31@61} physReg:edx Preferences=[edx] Interval 2: (V04) ref RefPositions {#6@10 #7@15 #22@47} physReg:NA Preferences=[allInt] Interval 3: (V05) int RefPositions {#15@32 #17@37 #45@68 #46@69} physReg:NA Preferences=[eax ecx edx ebx] Interval 4: (V06) int RefPositions {#10@18 #11@23 #38@65} physReg:NA Preferences=[allInt] Interval 5: (V08) ref RefPositions {#25@50 #27@57} physReg:NA Preferences=[ecx] Interval 6: ref RefPositions {#4@8 #5@9} physReg:NA Preferences=[allInt] RelatedInterval Interval 7: int RefPositions {#8@16 #9@17} physReg:NA Preferences=[allInt] RelatedInterval Interval 8: int (constant) RefPositions {#13@30 #14@31} physReg:NA Preferences=[allInt] RelatedInterval Interval 9: int RefPositions {#18@38 #20@39} physReg:NA Preferences=[eax] Interval 10: ref RefPositions {#23@48 #24@49} physReg:NA Preferences=[allInt] RelatedInterval Interval 11: ref RefPositions {#29@58 #35@65} physReg:NA Preferences=[ecx] Interval 12: ref RefPositions {#33@62 #37@65} physReg:NA Preferences=[edx] Interval 13: int RefPositions {#43@66 #44@67} physReg:NA Preferences=[eax] RelatedInterval ------------ REFPOSITIONS BEFORE VALIDATING INTERVALS: ------------ BB00 regmask=[ecx] minReg=1 fixed regOptional wt=100.00> BB00 regmask=[edx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00> IND BB01 regmask=[allInt] minReg=1 wt=400.00> BB01 regmask=[allInt] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> IND BB01 regmask=[allInt] minReg=1 wt=400.00> BB01 regmask=[allInt] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB01 regmask=[allInt] minReg=1 regOptional wt=200.00> CNS_INT BB02 regmask=[allInt] minReg=1 wt=400.00> BB02 regmask=[allInt] minReg=1 last wt=100.00> STORE_LCL_VAR BB02 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB04 regmask=[eax ecx edx ebx] minReg=1 last wt=200.00> CAST BB04 regmask=[eax] minReg=1 wt=400.00> BB04 regmask=[eax] minReg=1 wt=100.00> BB04 regmask=[eax] minReg=1 last fixed wt=100.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=400.00> IND BB03 regmask=[allInt] minReg=1 wt=0.00> BB03 regmask=[allInt] minReg=1 last wt=0.00> STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[ecx] minReg=1 fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> BB03 regmask=[edx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[edx] minReg=1 fixed wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> BB03 regmask=[edx] minReg=1 last fixed wt=0.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=200.00> BB03 regmask=[eax] minReg=1 last wt=0.00> BB03 regmask=[ecx] minReg=1 last wt=0.00> BB03 regmask=[edx] minReg=1 last wt=0.00> BB03 regmask=[eax] minReg=1 wt=0.00> CALL BB03 regmask=[eax] minReg=1 fixed wt=0.00> BB03 regmask=[allInt] minReg=1 last wt=0.00> STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=200.00> BB03 regmask=[allInt] minReg=1 regOptional wt=0.00> ------------ REFPOSITIONS DURING VALIDATE INTERVALS (RefPositions per interval) ------------ ----------------- BB00 regmask=[ecx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00> ----------------- BB00 regmask=[edx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> ----------------- STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=400.00> ----------------- STORE_LCL_VAR BB02 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB04 regmask=[eax ecx edx ebx] minReg=1 last wt=200.00> STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=200.00> BB03 regmask=[allInt] minReg=1 regOptional wt=0.00> ----------------- STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB01 regmask=[allInt] minReg=1 regOptional wt=200.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=200.00> ----------------- STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> TUPLE STYLE DUMP WITH REF POSITIONS Incoming Parameters: V00 V01 BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ===== N003. V00(L0) N005. LEA(b+4) N007. IND Use:(#3) * Def:(#4) Pref: N009. V04(L2) Use:(#5) * Def:(#6) N011. V04(L2) N013. LEA(b+12) N015. IND Use:(#7) Def:(#8) Pref: N017. V06(L4) Use:(#9) * Def:(#10) N019. V06(L4) N021. CNS_INT(h) 0xEF90DC8 ftn N023. NE Use:(#11) N025. JTRUE BB02 [???..???), preds={BB01} succs={BB04} ===== N029. CNS_INT 0 Def:(#13) Pref: N031. V05(L3) Use:(#14) * Def:(#15) BB04 [???..013) (return), preds={BB02,BB03} succs={} ===== N035. V05(L3) N037. CAST Use:(#17) * Def:(#18) N039. RETURN Use:(#20) Fixed:eax(#19) * BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ===== N043. V04(L2) N045. LEA(b+4) N047. IND Use:(#22) * Def:(#23) Pref: N049. V08(L5) Use:(#24) * Def:(#25) N051. CNS_INT null N053. PUTARG_STK [+0x00] N055. V08(L5) N057. PUTARG_REG Use:(#27) Fixed:ecx(#26) * Def:(#29) ecx N059. V01(L1) N061. PUTARG_REG Use:(#31) Fixed:edx(#30) * Def:(#33) edx N063. V06(L4) N065. CALL ind Use:(#35) Fixed:ecx(#34) * Use:(#37) Fixed:edx(#36) * Use:(#38) * Kill: eax ecx edx Def:(#43) eax Pref: N067. V05(L3) Use:(#44) * Def:(#45) Linear scan intervals after buildIntervals: Interval 0: (V00) ref RefPositions {#0@0 #3@7} physReg:ecx Preferences=[ecx] Interval 1: (V01) ref RefPositions {#1@0 #31@61} physReg:edx Preferences=[edx] Interval 2: (V04) ref RefPositions {#6@10 #7@15 #22@47} physReg:NA Preferences=[allInt] Interval 3: (V05) int RefPositions {#15@32 #17@37 #45@68 #46@69} physReg:NA Preferences=[eax ecx edx ebx] Interval 4: (V06) int RefPositions {#10@18 #11@23 #38@65} physReg:NA Preferences=[allInt] Interval 5: (V08) ref RefPositions {#25@50 #27@57} physReg:NA Preferences=[ecx] Interval 6: ref RefPositions {#4@8 #5@9} physReg:NA Preferences=[allInt] RelatedInterval Interval 7: int RefPositions {#8@16 #9@17} physReg:NA Preferences=[allInt] RelatedInterval Interval 8: int (constant) RefPositions {#13@30 #14@31} physReg:NA Preferences=[allInt] RelatedInterval Interval 9: int RefPositions {#18@38 #20@39} physReg:NA Preferences=[eax] Interval 10: ref RefPositions {#23@48 #24@49} physReg:NA Preferences=[allInt] RelatedInterval Interval 11: ref RefPositions {#29@58 #35@65} physReg:NA Preferences=[ecx] Interval 12: ref RefPositions {#33@62 #37@65} physReg:NA Preferences=[edx] Interval 13: int RefPositions {#43@66 #44@67} physReg:NA Preferences=[eax] RelatedInterval *************** In LinearScan::allocateRegisters() Linear scan intervals before allocateRegisters: Interval 0: (V00) ref RefPositions {#0@0 #3@7} physReg:ecx Preferences=[ecx] Interval 1: (V01) ref RefPositions {#1@0 #31@61} physReg:edx Preferences=[edx] Interval 2: (V04) ref RefPositions {#6@10 #7@15 #22@47} physReg:NA Preferences=[allInt] Interval 3: (V05) int RefPositions {#15@32 #17@37 #45@68 #46@69} physReg:NA Preferences=[eax ecx edx ebx] Interval 4: (V06) int RefPositions {#10@18 #11@23 #38@65} physReg:NA Preferences=[allInt] Interval 5: (V08) ref RefPositions {#25@50 #27@57} physReg:NA Preferences=[ecx] Interval 6: ref RefPositions {#4@8 #5@9} physReg:NA Preferences=[allInt] RelatedInterval Interval 7: int RefPositions {#8@16 #9@17} physReg:NA Preferences=[allInt] RelatedInterval Interval 8: int (constant) RefPositions {#13@30 #14@31} physReg:NA Preferences=[allInt] RelatedInterval Interval 9: int RefPositions {#18@38 #20@39} physReg:NA Preferences=[eax] Interval 10: ref RefPositions {#23@48 #24@49} physReg:NA Preferences=[allInt] RelatedInterval Interval 11: ref RefPositions {#29@58 #35@65} physReg:NA Preferences=[ecx] Interval 12: ref RefPositions {#33@62 #37@65} physReg:NA Preferences=[edx] Interval 13: int RefPositions {#43@66 #44@67} physReg:NA Preferences=[eax] RelatedInterval ------------ REFPOSITIONS BEFORE ALLOCATION: ------------ BB00 regmask=[ecx] minReg=1 fixed regOptional wt=100.00> BB00 regmask=[edx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00> IND BB01 regmask=[allInt] minReg=1 wt=400.00> BB01 regmask=[allInt] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> IND BB01 regmask=[allInt] minReg=1 wt=400.00> BB01 regmask=[allInt] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB01 regmask=[allInt] minReg=1 regOptional wt=200.00> CNS_INT BB02 regmask=[allInt] minReg=1 wt=400.00> BB02 regmask=[allInt] minReg=1 last wt=100.00> STORE_LCL_VAR BB02 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB04 regmask=[eax ecx edx ebx] minReg=1 last wt=200.00> CAST BB04 regmask=[eax] minReg=1 wt=400.00> BB04 regmask=[eax] minReg=1 wt=100.00> BB04 regmask=[eax] minReg=1 last fixed wt=100.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=400.00> IND BB03 regmask=[allInt] minReg=1 wt=0.00> BB03 regmask=[allInt] minReg=1 last wt=0.00> STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[ecx] minReg=1 fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> BB03 regmask=[edx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[edx] minReg=1 fixed wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> BB03 regmask=[edx] minReg=1 last fixed wt=0.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=200.00> BB03 regmask=[eax] minReg=1 last wt=0.00> BB03 regmask=[ecx] minReg=1 last wt=0.00> BB03 regmask=[edx] minReg=1 last wt=0.00> BB03 regmask=[eax] minReg=1 wt=0.00> CALL BB03 regmask=[eax] minReg=1 fixed wt=0.00> BB03 regmask=[allInt] minReg=1 last wt=0.00> STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=200.00> BB03 regmask=[allInt] minReg=1 regOptional wt=0.00> VAR REFPOSITIONS BEFORE ALLOCATION --- V00 (Interval 0) BB00 regmask=[ecx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[allInt] minReg=1 last wt=300.00> --- V01 (Interval 1) BB00 regmask=[edx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> --- V02 --- V03 --- V04 (Interval 2) STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> LCL_VAR BB01 regmask=[allInt] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=400.00> --- V05 (Interval 3) STORE_LCL_VAR BB02 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB04 regmask=[eax ecx edx ebx] minReg=1 last wt=200.00> STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=200.00> BB03 regmask=[allInt] minReg=1 regOptional wt=0.00> --- V06 (Interval 4) STORE_LCL_VAR BB01 regmask=[allInt] minReg=1 wt=200.00> LCL_VAR BB01 regmask=[allInt] minReg=1 regOptional wt=200.00> LCL_VAR BB03 regmask=[allInt] minReg=1 last wt=200.00> --- V07 --- V08 (Interval 5) STORE_LCL_VAR BB03 regmask=[allInt] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> Allocating Registers -------------------- The following table has one or more rows for each RefPosition that is handled during allocation. The columns are: (1) Loc: LSRA location, (2) RP#: RefPosition number, (3) Name, (4) Type (e.g. Def, Use, Fixd, Parm, DDef (Dummy Def), ExpU (Exposed Use), Kill) followed by a '*' if it is a last use, and a 'D' if it is delayRegFree, (5) Action taken during allocation. Some actions include (a) Alloc a new register, (b) Keep an existing register, (c) Spill a register, (d) ReLod (Reload) a register. If an ALL-CAPS name such as COVRS is displayed, it is a score name from lsra_score.h, with a trailing '(A)' indicating alloc, '(C)' indicating copy, and '(R)' indicating re-use. See dumpLsraAllocationEvent() for details. The subsequent columns show the Interval occupying each register, if any, followed by 'a' if it is active, 'p' if it is a large vector that has been partially spilled, and 'i' if it is inactive. Columns are only printed up to the last modified register, which may increase during allocation, in which case additional columns will appear. Registers which are not marked modified have ---- in their column. ─────────────────────────────────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │edi │ ─────────────────────────────────┼────┼────┼────┼────┤ │ │V0 a│V1 a│ │ 0.#0 V0 Parm Keep ecx │ │V0 a│V1 a│ │ 0.#1 V1 Parm Keep edx │ │V0 a│V1 a│ │ 1.#2 BB1 PredBB0 │ │V0 a│V1 a│ │ 7.#3 V0 Use * Keep ecx │ │V0 a│V1 a│ │ 8.#4 I6 Def CRCE (A) ecx │ │I6 a│V1 a│ │ 9.#5 I6 Use * Keep ecx │ │I6 a│V1 a│ │ 10.#6 V4 Def COVRS(A) ecx │ │V4 a│V1 a│ │ 15.#7 V4 Use Keep ecx │ │V4 a│V1 a│ │ ─────────────────────────────────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┤ 16.#8 I7 Def ORDER(A) esi │ │V4 a│V1 a│I7 a│ │ 17.#9 I7 Use * Keep esi │ │V4 a│V1 a│I7 a│ │ 18.#10 V6 Def COVRS(A) esi │ │V4 a│V1 a│V6 a│ │ 23.#11 V6 Use Keep esi │ │V4 a│V1 a│V6 a│ │ ─────────────────────────────────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┤ 27.#12 BB2 PredBB1 │ │V4 i│V1 i│V6 i│ │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 30.#13 C8 Def COREL(A) ebx │ │V4 i│V1 i│C8 a│V6 i│ │ 31.#14 C8 Use * Keep ebx │ │V4 i│V1 i│C8 a│V6 i│ │ 32.#15 V5 Def COVRS(A) ebx │ │V4 i│V1 i│V5 a│V6 i│ │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 33.#16 BB4 PredBB2 │ │V4 i│V1 i│V5 a│V6 i│ │ 37.#17 V5 Use * Keep ebx │ │V4 i│V1 i│V5 i│V6 i│ │ 38.#18 I9 Def Alloc eax │I9 a│V4 i│V1 i│V5 i│V6 i│ │ 39.#19 eax Fixd Keep eax │I9 a│V4 i│V1 i│V5 i│V6 i│ │ 39.#20 I9 Use * Keep eax │I9 a│V4 i│V1 i│V5 i│V6 i│ │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 41.#21 BB3 PredBB1 │ │V4 a│V1 a│V5 i│V6 a│ │ 47.#22 V4 Use * Keep ecx │ │V4 a│V1 a│V5 i│V6 a│ │ 48.#23 I10 Def RELPR(A) ecx │ │I10a│V1 a│V5 i│V6 a│ │ 49.#24 I10 Use * Keep ecx │ │I10a│V1 a│V5 i│V6 a│ │ 50.#25 V8 Def COVRS(A) ecx │ │V8 a│V1 a│V5 i│V6 a│ │ 57.#26 ecx Fixd Keep ecx │ │V8 a│V1 a│V5 i│V6 a│ │ 57.#27 V8 Use * Keep ecx │ │V8 a│V1 a│V5 i│V6 a│ │ 58.#28 ecx Fixd Keep ecx │ │ │V1 a│V5 i│V6 a│ │ 58.#29 I11 Def Alloc ecx │ │I11a│V1 a│V5 i│V6 a│ │ 61.#30 edx Fixd Keep edx │ │I11a│V1 a│V5 i│V6 a│ │ 61.#31 V1 Use * Keep edx │ │I11a│V1 a│V5 i│V6 a│ │ 62.#32 edx Fixd Keep edx │ │I11a│ │V5 i│V6 a│ │ 62.#33 I12 Def Alloc edx │ │I11a│I12a│V5 i│V6 a│ │ 65.#34 ecx Fixd Keep ecx │ │I11a│I12a│V5 i│V6 a│ │ 65.#35 I11 Use * Keep ecx │ │I11a│I12a│V5 i│V6 a│ │ 65.#36 edx Fixd Keep edx │ │I11a│I12a│V5 i│V6 a│ │ 65.#37 I12 Use * Keep edx │ │I11a│I12a│V5 i│V6 a│ │ 65.#38 V6 Use * Keep esi │ │I11a│I12a│V5 i│V6 a│ │ 66.#39 eax Kill Keep eax │ │ │ │V5 i│ │ │ 66.#40 ecx Kill Keep ecx │ │ │ │V5 i│ │ │ 66.#41 edx Kill Keep edx │ │ │ │V5 i│ │ │ 66.#42 eax Fixd Keep eax │ │ │ │V5 i│ │ │ 66.#43 I13 Def Alloc eax │I13a│ │ │V5 i│ │ │ 67.#44 I13 Use * Keep eax │I13a│ │ │V5 i│ │ │ 68.#45 V5 Def Keep ebx │ │ │ │V5 a│ │ │ 69.#46 V5 ExpU Keep NA │ │ │ │V5 a│ │ │ 69.#47 END │ │ │ │V5 a│ │ │ ------------ REFPOSITIONS AFTER ALLOCATION: ------------ BB00 regmask=[ecx] minReg=1 fixed regOptional wt=100.00> BB00 regmask=[edx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[ecx] minReg=1 last wt=300.00> IND BB01 regmask=[ecx] minReg=1 wt=400.00> BB01 regmask=[ecx] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[ecx] minReg=1 wt=400.00> LCL_VAR BB01 regmask=[ecx] minReg=1 wt=400.00> IND BB01 regmask=[esi] minReg=1 wt=400.00> BB01 regmask=[esi] minReg=1 last wt=100.00> STORE_LCL_VAR BB01 regmask=[esi] minReg=1 wt=200.00> LCL_VAR BB01 regmask=[esi] minReg=1 regOptional wt=200.00> CNS_INT BB02 regmask=[ebx] minReg=1 wt=400.00> BB02 regmask=[ebx] minReg=1 last wt=100.00> STORE_LCL_VAR BB02 regmask=[ebx] minReg=1 wt=200.00> LCL_VAR BB04 regmask=[ebx] minReg=1 last wt=200.00> CAST BB04 regmask=[eax] minReg=1 wt=400.00> BB04 regmask=[eax] minReg=1 wt=100.00> BB04 regmask=[eax] minReg=1 last fixed wt=100.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last wt=400.00> IND BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 last wt=0.00> STORE_LCL_VAR BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[ecx] minReg=1 fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> BB03 regmask=[edx] minReg=1 wt=0.00> PUTARG_REG BB03 regmask=[edx] minReg=1 fixed wt=0.00> BB03 regmask=[ecx] minReg=1 wt=0.00> BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> BB03 regmask=[edx] minReg=1 wt=0.00> BB03 regmask=[edx] minReg=1 last fixed wt=0.00> LCL_VAR BB03 regmask=[esi] minReg=1 last wt=200.00> BB03 regmask=[eax] minReg=1 last wt=0.00> BB03 regmask=[ecx] minReg=1 last wt=0.00> BB03 regmask=[edx] minReg=1 last wt=0.00> BB03 regmask=[eax] minReg=1 wt=0.00> CALL BB03 regmask=[eax] minReg=1 fixed wt=0.00> BB03 regmask=[eax] minReg=1 last wt=0.00> STORE_LCL_VAR BB03 regmask=[ebx] minReg=1 wt=200.00> BB03 regmask=[allInt] minReg=1 regOptional wt=0.00> VAR REFPOSITIONS AFTER ALLOCATION --- V00 (Interval 0) BB00 regmask=[ecx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB01 regmask=[ecx] minReg=1 last wt=300.00> --- V01 (Interval 1) BB00 regmask=[edx] minReg=1 fixed regOptional wt=100.00> LCL_VAR BB03 regmask=[edx] minReg=1 last fixed wt=200.00> --- V02 --- V03 --- V04 (Interval 2) STORE_LCL_VAR BB01 regmask=[ecx] minReg=1 wt=400.00> LCL_VAR BB01 regmask=[ecx] minReg=1 wt=400.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last wt=400.00> --- V05 (Interval 3) STORE_LCL_VAR BB02 regmask=[ebx] minReg=1 wt=200.00> LCL_VAR BB04 regmask=[ebx] minReg=1 last wt=200.00> STORE_LCL_VAR BB03 regmask=[ebx] minReg=1 wt=200.00> BB03 regmask=[allInt] minReg=1 regOptional wt=0.00> --- V06 (Interval 4) STORE_LCL_VAR BB01 regmask=[esi] minReg=1 wt=200.00> LCL_VAR BB01 regmask=[esi] minReg=1 regOptional wt=200.00> LCL_VAR BB03 regmask=[esi] minReg=1 last wt=200.00> --- V07 --- V08 (Interval 5) STORE_LCL_VAR BB03 regmask=[ecx] minReg=1 wt=0.00> LCL_VAR BB03 regmask=[ecx] minReg=1 last fixed wt=0.00> Active intervals at end of allocation: Active Interval 3: (V05) int RefPositions {#15@32 #17@37 #45@68 #46@69} physReg:ebx Preferences=[eax ebx] ----------------------- RESOLVING BB BOUNDARIES ----------------------- Resolution Candidates: {V00 V01 V04 V05 V06} Has No Critical Edges Prior to Resolution BB01 use: {V00} def: {V04 V06} in: {V00 V01} out: {V01 V04 V06} Var=Reg beg of BB01: V00=ecx V01=edx Var=Reg end of BB01: V01=edx V04=ecx V06=esi BB02 use: {} def: {V05} in: {} out: {V05} Var=Reg beg of BB02: none Var=Reg end of BB02: V05=ebx BB04 use: {V05} def: {} in: {V05} out: {} Var=Reg beg of BB04: V05=ebx Var=Reg end of BB04: none BB03 use: {V01 V04 V06} def: {V05 V08} in: {V01 V04 V06} out: {V05} Var=Reg beg of BB03: V01=edx V04=ecx V06=esi Var=Reg end of BB03: V05=ebx RESOLVING EDGES Set V00 argument initial register to ecx Set V01 argument initial register to edx Trees after linear scan register allocator (LSRA) ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- ------------ BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} N003 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 ecx (last use) REG ecx $80 ┌──▌ t0 ref N005 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref REG NA ┌──▌ t59 byref N007 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref REG ecx ┌──▌ t1 ref N009 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 ecx REG ecx N011 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ecx REG ecx ┌──▌ t22 ref N013 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref REG NA ┌──▌ t24 byref N015 ( 4, 4) [000025] ---X------- t25 = ▌ IND int REG esi ┌──▌ t25 int N017 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 esi REG esi N019 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 esi REG esi N021 ( 1, 4) [000029] Hc--------- t29 = CNS_INT(h) int 0xEF90DC8 ftn REG NA $141 ┌──▌ t28 int ├──▌ t29 int N023 ( 5, 7) [000030] J------N--- ▌ NE void REG NA N025 ( 7, 9) [000031] ----------- ▌ JTRUE void REG NA $VN.Void ------------ BB02 [???..???), preds={BB01} succs={BB04} N029 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 REG ebx $40 ┌──▌ t56 int N031 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ebx REG ebx ------------ BB04 [???..013) (return), preds={BB02,BB03} succs={} N035 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 ebx (last use) REG ebx $201 ┌──▌ t21 int N037 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int REG eax $285 ┌──▌ t63 int N039 ( 5, 5) [000020] ----------- ▌ RETURN int REG NA $VN.Void ------------ BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} N043 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 ecx (last use) REG ecx ┌──▌ t51 ref N045 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref REG NA ┌──▌ t52 byref N047 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref REG ecx ┌──▌ t53 ref N049 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 ecx REG ecx N051 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null REG NA $VN.Null ┌──▌ t69 ref N053 (???,???) [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) REG NA N055 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 ecx (last use) REG ecx ┌──▌ t62 ref N057 (???,???) [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx N059 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 edx (last use) REG edx $81 ┌──▌ t2 ref N061 (???,???) [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx N063 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 esi (last use) REG esi ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt N065 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int REG eax $241 ┌──▌ t18 int N067 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ebx REG ebx ------------------------------------------------------------------------------------------------------------------- Final allocation ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 0.#0 V0 Parm Alloc ecx │ │V0 a│ │ │ │ │ 0.#1 V1 Parm Alloc edx │ │V0 a│V1 a│ │ │ │ 1.#2 BB1 PredBB0 │ │V0 a│V1 a│ │ │ │ 7.#3 V0 Use * Keep ecx │ │V0 i│V1 a│ │ │ │ 8.#4 I6 Def Alloc ecx │ │I6 a│V1 a│ │ │ │ 9.#5 I6 Use * Keep ecx │ │I6 i│V1 a│ │ │ │ 10.#6 V4 Def Alloc ecx │ │V4 a│V1 a│ │ │ │ 15.#7 V4 Use Keep ecx │ │V4 a│V1 a│ │ │ │ 16.#8 I7 Def Alloc esi │ │V4 a│V1 a│ │I7 a│ │ 17.#9 I7 Use * Keep esi │ │V4 a│V1 a│ │I7 i│ │ 18.#10 V6 Def Alloc esi │ │V4 a│V1 a│ │V6 a│ │ 23.#11 V6 Use Keep esi │ │V4 a│V1 a│ │V6 a│ │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 27.#12 BB2 PredBB1 │ │ │ │ │ │ │ 30.#13 C8 Def Alloc ebx │ │ │ │C8 a│ │ │ 31.#14 C8 Use * Keep ebx │ │ │ │C8 i│ │ │ 32.#15 V5 Def Alloc ebx │ │ │ │V5 a│ │ │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 33.#16 BB4 PredBB2 │ │ │ │V5 a│ │ │ 37.#17 V5 Use * Keep ebx │ │ │ │V5 i│ │ │ 38.#18 I9 Def Alloc eax │I9 a│ │ │ │ │ │ 39.#19 eax Fixd Keep eax │I9 a│ │ │ │ │ │ 39.#20 I9 Use * Keep eax │I9 i│ │ │ │ │ │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ LocRP# Name Type Action Reg │eax │ecx │edx │ebx │esi │edi │ ─────────────────────────────────┼────┼────┼────┼────┼────┼────┤ 41.#21 BB3 PredBB1 │ │V4 a│V1 a│ │V6 a│ │ 47.#22 V4 Use * Keep ecx │ │V4 i│V1 a│ │V6 a│ │ 48.#23 I10 Def Alloc ecx │ │I10a│V1 a│ │V6 a│ │ 49.#24 I10 Use * Keep ecx │ │I10i│V1 a│ │V6 a│ │ 50.#25 V8 Def Alloc ecx │ │V8 a│V1 a│ │V6 a│ │ 57.#26 ecx Fixd Keep ecx │ │V8 a│V1 a│ │V6 a│ │ 57.#27 V8 Use * Keep ecx │ │V8 i│V1 a│ │V6 a│ │ 58.#28 ecx Fixd Keep ecx │ │ │V1 a│ │V6 a│ │ 58.#29 I11 Def Alloc ecx │ │I11a│V1 a│ │V6 a│ │ 61.#30 edx Fixd Keep edx │ │I11a│V1 a│ │V6 a│ │ 61.#31 V1 Use * Keep edx │ │I11a│V1 i│ │V6 a│ │ 62.#32 edx Fixd Keep edx │ │I11a│ │ │V6 a│ │ 62.#33 I12 Def Alloc edx │ │I11a│I12a│ │V6 a│ │ 65.#34 ecx Fixd Keep ecx │ │I11a│I12a│ │V6 a│ │ 65.#35 I11 Use * Keep ecx │ │I11i│I12a│ │V6 a│ │ 65.#36 edx Fixd Keep edx │ │ │I12a│ │V6 a│ │ 65.#37 I12 Use * Keep edx │ │ │I12i│ │V6 a│ │ 65.#38 V6 Use * Keep esi │ │ │ │ │V6 i│ │ 66.#39 eax Kill Keep eax │ │ │ │ │ │ │ 66.#40 ecx Kill Keep ecx │ │ │ │ │ │ │ 66.#41 edx Kill Keep edx │ │ │ │ │ │ │ 66.#42 eax Fixd Keep eax │ │ │ │ │ │ │ 66.#43 I13 Def Alloc eax │I13a│ │ │ │ │ │ 67.#44 I13 Use * Keep eax │I13i│ │ │ │ │ │ 68.#45 V5 Def Alloc ebx │ │ │ │V5 a│ │ │ 69.#46 V5 ExpU │ │ │ │V5 a│ │ │ Recording the maximum number of concurrent spills: ---------- LSRA Stats ---------- Register selection order: ABCDEFGHIJKLMNOPQ Total Tracked Vars: 6 Total Reg Cand Vars: 6 Total number of Intervals: 13 Total number of RefPositions: 47 Total Number of spill temps created: 0 .......... BB01 [ 35.00]: COVERS = 2, CALLER_CALLEE = 1, REG_ORDER = 1 BB02 [ 35.00]: COVERS = 1, COVERS_RELATED = 1 BB03 [ 0.00]: COVERS = 1, RELATED_PREFERENCE = 1 .......... Total SpillCount : 0 Weighted: 0.000000 Total CopyReg : 0 Weighted: 0.000000 Total ResolutionMovs : 0 Weighted: 0.000000 Total SplitEdges : 0 Weighted: 0.000000 .......... Total COVERS [# 4] : 4 Weighted: 105.000000 Total COVERS_RELATED [# 6] : 1 Weighted: 35.000000 Total RELATED_PREFERENCE [# 7] : 1 Weighted: 0.000000 Total CALLER_CALLEE [# 8] : 1 Weighted: 35.000000 Total REG_ORDER [#13] : 1 Weighted: 35.000000 TUPLE STYLE DUMP WITH REGISTER ASSIGNMENTS Incoming Parameters: V00(ecx) V01(edx) BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} ===== N003. V00(ecx*) N005. STK = LEA(b+4) ; ecx* N007. ecx = IND ; STK * N009. V04(ecx); ecx N011. V04(ecx) N013. STK = LEA(b+12); ecx N015. esi = IND ; STK * N017. V06(esi); esi N019. V06(esi) N021. CNS_INT(h) 0xEF90DC8 ftn N023. NE ; esi N025. JTRUE Var=Reg end of BB01: V01=edx V04=ecx V06=esi BB02 [???..???), preds={BB01} succs={BB04} ===== Predecessor for variable locations: BB01 Var=Reg beg of BB02: none N029. ebx = CNS_INT 0 * N031. V05(ebx); ebx Var=Reg end of BB02: V05=ebx BB04 [???..013) (return), preds={BB02,BB03} succs={} ===== Predecessor for variable locations: BB02 Var=Reg beg of BB04: V05=ebx N035. V05(ebx*) N037. eax = CAST ; ebx* N039. RETURN ; eax Var=Reg end of BB04: none BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} ===== Predecessor for variable locations: BB01 Var=Reg beg of BB03: V01=edx V04=ecx V06=esi N043. V04(ecx*) N045. STK = LEA(b+4) ; ecx* N047. ecx = IND ; STK * N049. V08(ecx); ecx N051. CNS_INT null N053. PUTARG_STK [+0x00] N055. V08(ecx*) N057. ecx = PUTARG_REG; ecx* N059. V01(edx*) N061. edx = PUTARG_REG; edx* N063. V06(esi*) N065. eax = CALL ind ; ecx,edx,esi* * N067. V05(ebx); eax Var=Reg end of BB03: V05=ebx *************** Finishing PHASE Linear scan register alloc [phase has not yet enabled common post phase checks] *************** Starting PHASE Place 'align' instructions *************** Finishing PHASE Place 'align' instructions [phase has not yet enabled common post phase checks] *************** In genGenerateCode() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- *************** Starting PHASE Generate code *************** In fgDebugCheckBBlist Finalizing stack frame Recording Var Locations at start of BB01 V00(ecx) V01(edx) Modified regs: [eax ecx edx ebx esi] Callee-saved registers pushed: 2 [ebx esi] *************** In lvaAssignFrameOffsets(FINAL_FRAME_LAYOUT) --- delta bump 4 for RA --- delta bump 4 for FP --- virtual stack offset to actual stack offset delta is 8 -- V02 was 0, now 8 ; Final local variable assignments ; ; V00 this [V00,T00] ( 3, 3 ) ref -> ecx this class-hnd single-def ; V01 arg1 [V01,T01] ( 3, 2 ) ref -> edx class-hnd single-def ;* V02 arg2 [V02 ] ( 0, 0 ) int -> zero-ref single-def ;* V03 tmp0 [V03 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Single-def Box Helper" ; V04 tmp1 [V04,T02] ( 3, 4 ) ref -> ecx class-hnd single-def "impImportAndPushBox" ; V05 tmp2 [V05,T03] ( 3, 2 ) int -> ebx "guarded devirt return temp" ; V06 tmp3 [V06,T04] ( 3, 2 ) int -> esi "guarded devirt call target temp" ;* V07 tmp4 [V07 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def "guarded devirt this exact temp" ; V08 tmp5 [V08,T05] ( 2, 0 ) ref -> ecx single-def "argument with side effect" ; ; Lcl frame size = 0 Mark labels for codegen BB01 : first block BB03 : branch target BB04 : branch target *************** After genMarkLabelsForCodegen() ----------------------------------------------------------------------------------------------------------------------------------------- BBnum BBid ref try hnd preds weight IBC lp [IL range] [jump] [EH region] [flags] ----------------------------------------------------------------------------------------------------------------------------------------- BB01 [0000] 1 1 35 [000..???)-> BB03 ( cond ) i label newobj IBC LIR BB02 [0002] 1 BB01 1 35 [???..???) i internal newobj IBC LIR BB04 [0001] 2 BB02,BB03 1 35 [???..013) (return) i internal label newobj IBC LIR BB03 [0003] 1 BB01 0 0 [???..???)-> BB04 (always) i internal rare label hascall gcsafe newobj IBC LIR ----------------------------------------------------------------------------------------------------------------------------------------- Setting stack level from -572662307 to 0 =============== Generating BB01 [000..???) -> BB03 (cond), preds={} succs={BB02,BB03} flags=0x00000000.30410020: i label newobj IBC LIR BB01 IN (2)={V00 V01 } + ByrefExposed + GcHeap OUT(3)={ V01 V04 V06} + ByrefExposed + GcHeap Recording Var Locations at start of BB01 V00(ecx) V01(edx) Change life 00000000 {} -> 00000003 {V00 V01} V00 in reg ecx is becoming live [------] Live regs: 00000000 {} => 00000002 {ecx} New debug range: first V01 in reg edx is becoming live [------] Live regs: 00000002 {ecx} => 00000006 {ecx edx} New debug range: first Live regs: (unchanged) 00000006 {ecx edx} GC regs: (unchanged) 00000006 {ecx edx} Byref regs: (unchanged) 00000000 {} L_M16432_BB01: Mapped BB01 to G_M16432_IG02 Label: IG02, GCvars=00000000 {}, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {} Scope info: begin block BB01, IL range [000..???) Generating: N003 ( 1, 1) [000000] ----------- t0 = LCL_VAR ref V00 this u:1 ecx (last use) REG ecx $80 ┌──▌ t0 ref Generating: N005 ( 2, 2) [000059] -c--------- t59 = ▌ LEA(b+4) byref REG NA ┌──▌ t59 byref Generating: N007 ( 4, 4) [000001] ---XG------ t1 = ▌ IND ref REG ecx V00 in reg ecx is becoming dead [000000] Live regs: 00000006 {ecx edx} => 00000004 {edx} Live vars: {V00 V01} => {V01} GC regs: 00000006 {ecx edx} => 00000004 {edx} IN0001: mov ecx, gword ptr [ecx+4] GC regs: 00000004 {edx} => 00000006 {ecx edx} ┌──▌ t1 ref Generating: N009 ( 4, 4) [000014] DA-XG------ ▌ STORE_LCL_VAR ref V04 tmp1 d:1 ecx REG ecx GC regs: 00000006 {ecx edx} => 00000004 {edx} V04 in reg ecx is becoming live [000014] Live regs: 00000004 {edx} => 00000006 {ecx edx} Live vars: {V01} => {V01 V04} GC regs: 00000004 {edx} => 00000006 {ecx edx} Generating: N011 ( 1, 1) [000022] ----------- t22 = LCL_VAR ref V04 tmp1 u:1 ecx REG ecx ┌──▌ t22 ref Generating: N013 ( 2, 2) [000024] -c--------- t24 = ▌ LEA(b+12) byref REG NA ┌──▌ t24 byref Generating: N015 ( 4, 4) [000025] ---X------- t25 = ▌ IND int REG esi IN0002: mov esi, dword ptr [ecx+12] ┌──▌ t25 int Generating: N017 ( 8, 7) [000027] DA-X------- ▌ STORE_LCL_VAR int V06 tmp3 d:1 esi REG esi V06 in reg esi is becoming live [000027] Live regs: 00000006 {ecx edx} => 00000046 {ecx edx esi} Live vars: {V01 V04} => {V01 V04 V06} Generating: N019 ( 3, 2) [000028] ----------- t28 = LCL_VAR int V06 tmp3 u:1 esi REG esi Generating: N021 ( 1, 4) [000029] Hc--------- t29 = CNS_INT(h) int 0xEF90DC8 ftn REG NA $141 ┌──▌ t28 int ├──▌ t29 int Generating: N023 ( 5, 7) [000030] J------N--- ▌ NE void REG NA IN0003: cmp esi, 0xEF90DC8 Generating: N025 ( 7, 9) [000031] ----------- ▌ JTRUE void REG NA $VN.Void IN0004: jne L_M16432_BB03 Scope info: ignoring block end Variable Live Range History Dump for BB01 V00 this: ecx [(G_M16432_IG02,ins#0,ofs#0), (G_M16432_IG02,ins#0,ofs#0)] V01 arg1: edx [(G_M16432_IG02,ins#0,ofs#0), ...] =============== Generating BB02 [???..???), preds={BB01} succs={BB04} flags=0x00000000.30400060: i internal newobj IBC LIR BB02 IN (0)={ } OUT(1)={V05} Recording Var Locations at start of BB02 Change life 00000016 {V01 V04 V06} -> 00000000 {} V01 in reg edx is becoming dead [------] Live regs: (unchanged) 00000000 {} V04 in reg ecx is becoming dead [------] Live regs: (unchanged) 00000000 {} V06 in reg esi is becoming dead [------] Live regs: (unchanged) 00000000 {} Live regs: (unchanged) 00000000 {} GC regs: (unchanged) 00000000 {} Byref regs: (unchanged) 00000000 {} L_M16432_BB02: Scope info: begin block BB02, IL range [???..???) Scope info: ignoring block beginning Added IP mapping: NO_MAP (G_M16432_IG02,ins#4,ofs#18) label Generating: N029 ( 1, 1) [000056] ----------- t56 = CNS_INT int 0 REG ebx $40 IN0005: xor ebx, ebx ┌──▌ t56 int Generating: N031 ( 5, 4) [000046] DA--------- ▌ STORE_LCL_VAR int V05 tmp2 d:3 ebx REG ebx V05 in reg ebx is becoming live [000046] Live regs: 00000000 {} => 00000008 {ebx} Live vars: {} => {V05} Scope info: ignoring block end Variable Live Range History Dump for BB02 V01 arg1: edx [(G_M16432_IG02,ins#0,ofs#0), (G_M16432_IG02,ins#4,ofs#18)] =============== Generating BB04 [???..013) (return), preds={BB02,BB03} succs={} flags=0x00000000.30410060: i internal label newobj IBC LIR BB04 IN (1)={V05} OUT(0)={ } Recording Var Locations at start of BB04 V05(ebx) Liveness not changing: 00000008 {V05} Live regs: 00000000 {} => 00000008 {ebx} GC regs: (unchanged) 00000000 {} Byref regs: (unchanged) 00000000 {} L_M16432_BB04: G_M16432_IG02: ; offs=000000H, funclet=00, bbWeight=1 , byref Mapped BB04 to G_M16432_IG03 Label: IG03, GCvars=00000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {} Scope info: begin block BB04, IL range [???..013) Scope info: ignoring block beginning genIPmappingAdd: ignoring duplicate IL offset 0xffffffff Generating: N035 ( 3, 2) [000021] ----------- t21 = LCL_VAR int V05 tmp2 u:1 ebx (last use) REG ebx $201 ┌──▌ t21 int Generating: N037 ( 4, 4) [000063] ----------- t63 = ▌ CAST int <- bool <- int REG eax $285 V05 in reg ebx is becoming dead [000021] Live regs: 00000008 {ebx} => 00000000 {} Live vars: {V05} => {} IN0006: movzx eax, bl ┌──▌ t63 int Generating: N039 ( 5, 5) [000020] ----------- ▌ RETURN int REG NA $VN.Void Added IP mapping: EPILOG (G_M16432_IG03,ins#1,ofs#3) label Reserving epilog IG for block BB04 G_M16432_IG03: ; offs=000014H, funclet=00, bbWeight=1 , byref *************** After placeholder IG creation G_M16432_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG G_M16432_IG02: ; offs=000000H, size=0014H, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB01 [0000], BB02 [0002], byref G_M16432_IG03: ; offs=000014H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB04 [0001], byref G_M16432_IG04: ; epilog placeholder, next placeholder=, BB04 [0001], epilog, extend <-- First placeholder <-- Last placeholder ; PrevGCVars=00000000 {}, PrevGCrefRegs=00000006 {ecx edx}, PrevByrefRegs=00000000 {} ; InitGCVars=00000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {} G_M16432_IG05: ; offs=000117H, size=0000H, gcrefRegs=00000000 {} <-- Current IG Variable Live Range History Dump for BB04 ..None.. =============== Generating BB03 [???..???) -> BB04 (always), preds={BB01} succs={BB04} flags=0x00000002.30491060: i internal rare label hascall gcsafe newobj IBC LIR BB03 IN (3)={V01 V04 V06} + ByrefExposed + GcHeap OUT(1)={ V05 } Recording Var Locations at start of BB03 V01(edx) V04(ecx) V06(esi) Change life 00000000 {} -> 00000016 {V01 V04 V06} V01 in reg edx is becoming live [------] Live regs: 00000000 {} => 00000004 {edx} New debug range: new var or location V04 in reg ecx is becoming live [------] Live regs: 00000004 {edx} => 00000006 {ecx edx} V06 in reg esi is becoming live [------] Live regs: 00000006 {ecx edx} => 00000046 {ecx edx esi} Live regs: (unchanged) 00000046 {ecx edx esi} GC regs: (unchanged) 00000006 {ecx edx} Byref regs: (unchanged) 00000000 {} L_M16432_BB03: Mapped BB03 to G_M16432_IG05 Label: IG05, GCvars=00000000 {}, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {} Scope info: begin block BB03, IL range [???..???) Scope info: ignoring block beginning Added IP mapping: NO_MAP (G_M16432_IG05,ins#0,ofs#0) label Generating: N043 ( 1, 1) [000051] ----------- t51 = LCL_VAR ref V04 tmp1 u:1 ecx (last use) REG ecx ┌──▌ t51 ref Generating: N045 ( 2, 2) [000052] -c--------- t52 = ▌ LEA(b+4) byref REG NA ┌──▌ t52 byref Generating: N047 ( 4, 4) [000053] n----O----- t53 = ▌ IND ref REG ecx V04 in reg ecx is becoming dead [000051] Live regs: 00000046 {ecx edx esi} => 00000044 {edx esi} Live vars: {V01 V04 V06} => {V01 V06} GC regs: 00000006 {ecx edx} => 00000004 {edx} IN0007: mov ecx, gword ptr [ecx+4] GC regs: 00000004 {edx} => 00000006 {ecx edx} ┌──▌ t53 ref Generating: N049 ( 8, 7) [000061] DA---O----- ▌ STORE_LCL_VAR ref V08 tmp5 d:1 ecx REG ecx GC regs: 00000006 {ecx edx} => 00000004 {edx} V08 in reg ecx is becoming live [000061] Live regs: 00000044 {edx esi} => 00000046 {ecx edx esi} Live vars: {V01 V06} => {V01 V06 V08} GC regs: 00000004 {edx} => 00000006 {ecx edx} Generating: N051 ( 1, 1) [000069] -c--------- t69 = CNS_INT ref null REG NA $VN.Null ┌──▌ t69 ref Generating: N053 (???,???) [000070] ----------- ▌ PUTARG_STK [+0x00] void (4 stackByteSize), (0 byteOffset) REG NA IN0008: push 0 Upping emitMaxStackDepth from 0 to 4 Adjusting stack level from 0 to 4 Generating: N055 ( 3, 2) [000062] ----------- t62 = LCL_VAR ref V08 tmp5 u:1 ecx (last use) REG ecx ┌──▌ t62 ref Generating: N057 (???,???) [000071] ----------- t71 = ▌ PUTARG_REG ref REG ecx V08 in reg ecx is becoming dead [000062] Live regs: 00000046 {ecx edx esi} => 00000044 {edx esi} Live vars: {V01 V06 V08} => {V01 V06} GC regs: 00000006 {ecx edx} => 00000004 {edx} GC regs: 00000004 {edx} => 00000006 {ecx edx} Generating: N059 ( 3, 2) [000002] ----------- t2 = LCL_VAR ref V01 arg1 u:1 edx (last use) REG edx $81 ┌──▌ t2 ref Generating: N061 (???,???) [000072] ----------- t72 = ▌ PUTARG_REG ref REG edx V01 in reg edx is becoming dead [000002] Live regs: 00000044 {edx esi} => 00000040 {esi} Live vars: {V01 V06} => {V06} GC regs: 00000006 {ecx edx} => 00000002 {ecx} GC regs: 00000002 {ecx} => 00000006 {ecx edx} Generating: N063 ( 3, 2) [000049] ----------- t49 = LCL_VAR int V06 tmp3 u:1 esi (last use) REG esi ┌──▌ t71 ref this in ecx ├──▌ t72 ref arg1 in edx ├──▌ t49 int calli tgt Generating: N065 ( 47, 22) [000018] --CXGO----- t18 = ▌ CALL ind int REG eax $241 GC regs: 00000006 {ecx edx} => 00000004 {edx} GC regs: 00000004 {edx} => 00000000 {} V06 in reg esi is becoming dead [000049] Live regs: 00000040 {esi} => 00000000 {} Live vars: {V06} => {} Call: GCvars=00000000 {}, gcrefRegs=00000000 {}, byrefRegs=00000000 {} IN0009: call esi Adjusting stack level from 4 to 0 ┌──▌ t18 int Generating: N067 ( 51, 25) [000048] DA-XGO----- ▌ STORE_LCL_VAR int V05 tmp2 d:2 ebx REG ebx IN000a: mov ebx, eax V05 in reg ebx is becoming live [000048] Live regs: 00000000 {} => 00000008 {ebx} Live vars: {} => {V05} Scope info: ignoring block end IN000b: jmp L_M16432_BB04 Variable Live Range History Dump for BB03 V01 arg1: edx [(G_M16432_IG05,ins#0,ofs#0), (G_M16432_IG05,ins#2,ofs#5)] Change life 00000008 {V05} -> 00000000 {} V05 in reg ebx is becoming dead [------] Live regs: 00000008 {ebx} => 00000000 {} # compCycleEstimate = 80, compSizeEstimate = 54 <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this ; Final local variable assignments ; ; V00 this [V00,T00] ( 3, 3 ) ref -> ecx this class-hnd single-def ; V01 arg1 [V01,T01] ( 3, 2 ) ref -> edx class-hnd single-def ;* V02 arg2 [V02 ] ( 0, 0 ) int -> zero-ref single-def ;* V03 tmp0 [V03 ] ( 0, 0 ) ref -> zero-ref class-hnd exact "Single-def Box Helper" ; V04 tmp1 [V04,T02] ( 3, 4 ) ref -> ecx class-hnd single-def "impImportAndPushBox" ; V05 tmp2 [V05,T03] ( 3, 2 ) int -> ebx "guarded devirt return temp" ; V06 tmp3 [V06,T04] ( 3, 2 ) int -> esi "guarded devirt call target temp" ;* V07 tmp4 [V07 ] ( 0, 0 ) ref -> zero-ref class-hnd single-def "guarded devirt this exact temp" ; V08 tmp5 [V08,T05] ( 2, 0 ) ref -> ecx single-def "argument with side effect" ; ; Lcl frame size = 0 *************** Before prolog / epilog generation G_M16432_IG01: ; func=00, offs=000000H, size=0000H, gcrefRegs=00000000 {} <-- Prolog IG G_M16432_IG02: ; offs=000000H, size=0014H, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB01 [0000], BB02 [0002], byref G_M16432_IG03: ; offs=000014H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB04 [0001], byref G_M16432_IG04: ; epilog placeholder, next placeholder=, BB04 [0001], epilog, extend <-- First placeholder <-- Last placeholder ; PrevGCVars=00000000 {}, PrevGCrefRegs=00000006 {ecx edx}, PrevByrefRegs=00000000 {} ; InitGCVars=00000000 {}, InitGCrefRegs=00000000 {}, InitByrefRegs=00000000 {} G_M16432_IG05: ; offs=000117H, size=0000H, gcrefRegs=00000000 {}, BB03 [0003] <-- Current IG Recording Var Locations at start of BB01 V00(ecx) V01(edx) G_M16432_IG05: ; offs=000117H, funclet=00, bbWeight=0 , gcvars, byref *************** In genFnProlog() Added IP mapping to front: PROLOG (G_M16432_IG01,ins#0,ofs#0) label __prolog: New debug range: first New debug range: first New debug range: first IN000c: push ebp IN000d: mov ebp, esp IN000e: push esi IN000f: push ebx *************** In genFnPrologCalleeRegArgs() for int regs *************** In genEnregisterIncomingStackArgs() G_M16432_IG01: ; offs=000000H, funclet=00, bbWeight=1 , byref, nogc *************** In genFnEpilog() __epilog: gcVarPtrSetCur=00000000 {}, gcRegGCrefSetCur=00000000 {}, gcRegByrefSetCur=00000000 {} IN0010: pop ebx IN0011: pop esi IN0012: pop ebp IN0013: ret 4 G_M16432_IG04: ; offs=000017H, funclet=00, bbWeight=1 , epilog, nogc, extend 0 prologs, 1 epilogs *************** After prolog / epilog generation G_M16432_IG01: ; func=00, offs=000000H, size=0005H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG G_M16432_IG02: ; offs=000005H, size=0014H, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB01 [0000], BB02 [0002], byref G_M16432_IG03: ; offs=000019H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB04 [0001], byref G_M16432_IG04: ; offs=00001CH, size=0006H, epilog, nogc, extend G_M16432_IG05: ; offs=000022H, size=000EH, gcVars=00000000 {}, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB03 [0003], gcvars, byref *************** In emitRemoveJumpToNextInst() Emitter Jump List: IG02 IN0004 jne[6] -> IG05 IG05 IN000b jmp[5] -> IG03 ; removal candidate total jump count: 2 IG05 IN000b does not jump to the next instruction group, keeping. emitRemoveJumpToNextInst removed no unconditional jumps *************** In emitJumpDistBind() Emitter Jump List: IG02 IN0004 jne[6] -> IG05 IG05 IN000b jmp[5] -> IG03 ; removal candidate total jump count: 2 Binding: IN0004: 000000 jne L_M16432_BB03 Binding L_M16432_BB03 to G_M16432_IG05 Estimate of fwd jump [06B7BDF4/004]: 0011 -> 0022 = 000F Shrinking jump [06B7BDF4/004] Adjusted offset of BB03 from 0019 to 0015 Adjusted offset of BB04 from 001C to 0018 Adjusted offset of BB05 from 0022 to 001E Binding: IN000b: 000000 jmp L_M16432_BB04 Binding L_M16432_BB04 to G_M16432_IG03 Estimate of bwd jump [06B7C218/011]: 0027 -> 0015 = 0014 Shrinking jump [06B7C218/011] Total shrinkage = 7, min extra jump size = 4294967295 *************** Finishing PHASE Generate code [phase has not yet enabled common post phase checks] *************** Starting PHASE Emit code Hot code size = 0x29 bytes Cold code size = 0x0 bytes *************** In emitEndCodeGen() Converting emitMaxStackDepth from bytes (4) to elements (1) *************************************************************************** Instructions as they come out of the scheduler G_M16432_IG01: ; func=00, offs=000000H, size=0005H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG IN000c: 000000 55 push ebp IN000d: 000001 8BEC mov ebp, esp IN000e: 000003 56 push esi IN000f: 000004 53 push ebx ;; size=5 bbWeight=1 PerfScore 3.25 G_M16432_IG02: ; func=00, offs=000005H, size=0010H, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB01 [0000], BB02 [0002], byref, isz ; gcrRegs +[ecx edx] IN0001: 000005 8B4904 mov ecx, gword ptr [ecx+4] IN0002: 000008 8B710C mov esi, dword ptr [ecx+12] IN0003: 00000B 81FEC80DF90E cmp esi, 0xEF90DC8 IN0004: 000011 750B jne SHORT G_M16432_IG05 IN0005: 000013 33DB xor ebx, ebx ;; size=16 bbWeight=1 PerfScore 5.50 G_M16432_IG03: ; func=00, offs=000015H, size=0003H, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB04 [0001], byref ; gcrRegs -[ecx edx] IN0006: 000015 0FB6C3 movzx eax, bl ;; size=3 bbWeight=1 PerfScore 0.25 G_M16432_IG04: ; func=00, offs=000018H, size=0006H, epilog, nogc, extend IN0010: 000018 5B pop ebx IN0011: 000019 5E pop esi IN0012: 00001A 5D pop ebp IN0013: 00001B C20400 ret 4 ;; size=6 bbWeight=1 PerfScore 3.50 G_M16432_IG05: ; func=00, offs=00001EH, size=000BH, gcVars=00000000 {}, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB03 [0003], gcvars, byref, isz ; gcrRegs +[ecx edx] IN0007: 00001E 8B4904 mov ecx, gword ptr [ecx+4] IN0008: 000021 6A00 push 0 IN0009: 000023 FFD6 call esi ; gcrRegs -[ecx edx] IN000a: 000025 8BD8 mov ebx, eax IN000b: 000027 EBEC jmp SHORT G_M16432_IG03 ;; size=11 bbWeight=0 PerfScore 0.00Allocated method code size = 41 , actual size = 41, unused size = 0 ; Total bytes of code 41, prolog size 5, PerfScore 16.60, instruction count 19, allocated bytes for code 41 (MethodHash=6205bfcf) for method <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this ; ============================================================ *************** After end code gen, before unwindEmit() G_M16432_IG01: ; func=00, offs=000000H, size=0005H, bbWeight=1 PerfScore 3.25, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, byref, nogc <-- Prolog IG IN000c: 000000 push ebp IN000d: 000001 mov ebp, esp IN000e: 000003 push esi IN000f: 000004 push ebx G_M16432_IG02: ; offs=000005H, size=0010H, bbWeight=1 PerfScore 5.50, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB01 [0000], BB02 [0002], byref, isz IN0001: 000005 mov ecx, gword ptr [ecx+4] IN0002: 000008 mov esi, dword ptr [ecx+12] IN0003: 00000B cmp esi, 0xEF90DC8 IN0004: 000011 jne SHORT G_M16432_IG05 IN0005: 000013 xor ebx, ebx G_M16432_IG03: ; offs=000015H, size=0003H, bbWeight=1 PerfScore 0.25, gcrefRegs=00000000 {}, byrefRegs=00000000 {}, BB04 [0001], byref IN0006: 000015 movzx eax, bl G_M16432_IG04: ; offs=000018H, size=0006H, bbWeight=1 PerfScore 3.50, epilog, nogc, extend IN0010: 000018 pop ebx IN0011: 000019 pop esi IN0012: 00001A pop ebp IN0013: 00001B ret 4 G_M16432_IG05: ; offs=00001EH, size=000BH, bbWeight=0 PerfScore 0.00, gcVars=00000000 {}, gcrefRegs=00000006 {ecx edx}, byrefRegs=00000000 {}, BB03 [0003], gcvars, byref, isz IN0007: 00001E mov ecx, gword ptr [ecx+4] IN0008: 000021 push 0 IN0009: 000023 call esi IN000a: 000025 mov ebx, eax IN000b: 000027 jmp SHORT G_M16432_IG03 *************** Finishing PHASE Emit code [phase has not yet enabled common post phase checks] *************** Starting PHASE Emit GC+EH tables *************** In genIPmappingGen() IP mapping count : 4 IL offs PROLOG : 0x00000000 ( STACK_EMPTY ) IL offs NO_MAP : 0x00000013 ( STACK_EMPTY ) IL offs EPILOG : 0x00000018 ( STACK_EMPTY ) IL offs NO_MAP : 0x0000001E ( STACK_EMPTY ) *************** In genSetScopeInfo() VarLocInfo count is 6 ; Variable debug info: 4 live ranges, 3 vars for method <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this 0( UNKNOWN) : From 00000000h to 00000005h, in ecx 1( UNKNOWN) : From 00000000h to 00000013h, in edx 1( UNKNOWN) : From 0000001Eh to 00000023h, in edx 2( UNKNOWN) : From 00000000h to 00000005h, in esp[4] (1 slot) VARIABLE LIVE RANGES: V00 this: ecx [5, 5) V01 arg1: edx [5, 13); edx [1E, 23) *************** In gcInfoBlockHdrSave() GCINFO: untrckVars = 0 GCINFO: trackdLcls = 0 GCINFO: untrckVars = 0 GCINFO: trackdLcls = 0 *************** In gcInfoBlockHdrSave() GCINFO: methodSize = 0029 GCINFO: prologSize = 0005 GCINFO: epilogSize = 0006 GCINFO: untrckVars = 0 GCINFO: trackdLcls = 0 GC Info for method <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this GC info size = 8 Method info block: method size = 0029 prolog size = 5 epilog size = 6 epilog count = 1 epilog end = no callee-saved regs = ESI EBX EBP ebp frame = yes fully interruptible= no double align = no arguments size = 1 DWORDs stack frame size = 0 DWORDs untracked count = 0 var ptr tab count = 0 epilog # 0 at 0018 29 C7 89 80 BB | 3F 18 08 ...| Pointer table: FF 00 00 ...| *************** Finishing PHASE Emit GC+EH tables [phase has not yet enabled common post phase checks] Method code size: 41 Allocations for <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this (MethodHash=6205bfcf) count: 982, size: 67012, max = 3072 allocateMemory: 131072, nraUsed: 70532 Alloc'd bytes by kind: kind | size | pct ---------------------+------------+-------- AssertionProp | 6580 | 9.82% ASTNode | 7240 | 10.80% InstDesc | 2288 | 3.41% ImpStack | 192 | 0.29% BasicBlock | 888 | 1.33% CallArgs | 408 | 0.61% FlowList | 128 | 0.19% TreeStatementList | 32 | 0.05% SiScope | 0 | 0.00% DominatorMemory | 140 | 0.21% LSRA | 2768 | 4.13% LSRA_Interval | 672 | 1.00% LSRA_RefPosition | 2112 | 3.15% Reachability | 68 | 0.10% SSA | 580 | 0.87% ValueNumber | 10393 | 15.51% LvaTable | 1572 | 2.35% UnwindInfo | 0 | 0.00% hashBv | 80 | 0.12% bitset | 780 | 1.16% FixedBitVect | 32 | 0.05% Generic | 851 | 1.27% LocalAddressVisitor | 0 | 0.00% FieldSeqStore | 80 | 0.12% MemorySsaMap | 28 | 0.04% MemoryPhiArg | 0 | 0.00% CSE | 880 | 1.31% GC | 12 | 0.02% CorTailCallInfo | 0 | 0.00% Inlining | 1368 | 2.04% ArrayStack | 0 | 0.00% DebugInfo | 212 | 0.32% DebugOnly | 24529 | 36.60% Codegen | 404 | 0.60% LoopOpt | 48 | 0.07% LoopClone | 0 | 0.00% LoopHoist | 0 | 0.00% Unknown | 99 | 0.15% RangeCheck | 0 | 0.00% CopyProp | 772 | 1.15% SideEffects | 0 | 0.00% ObjectAllocator | 0 | 0.00% VariableLiveRanges | 480 | 0.72% ClassLayout | 0 | 0.00% TailMergeThrows | 0 | 0.00% EarlyProp | 0 | 0.00% ZeroInit | 132 | 0.20% Pgo | 164 | 0.24% ****** DONE compiling <>c__DisplayClass15_1[Int32][System.Int32]:b__1(System.Object,int):bool:this System.NullReferenceException : Object reference not set to an instance of an object. Stack Trace: C:\dev\dotnet\runtime\src\libraries\System.Text.Json\tests\System.Text.Json.Tests\Serialization\TypeInfoResolverFunctionalTests.cs(109,0): at System.Text.Json.Serialization.Tests.TypeInfoResolverFunctionalTests.<>c.b__2_1(Object o, Object val) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\src\System\Text\Json\Serialization\Metadata\JsonPropertyInfoOfT.cs(109,0): at System.Text.Json.Serialization.Metadata.JsonPropertyInfo`1.<>c__DisplayClass15_1.b__1(Object obj, T value) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\src\System\Text\Json\Serialization\Metadata\JsonPropertyInfoOfT.cs(257,0): at System.Text.Json.Serialization.Metadata.JsonPropertyInfo`1.GetMemberAndWriteJson(Object obj, WriteStack& state, Utf8JsonWriter writer) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\src\System\Text\Json\Serialization\Converters\Object\ObjectDefaultConverter.cs(298,0): at System.Text.Json.Serialization.Converters.ObjectDefaultConverter`1.OnTryWrite(Utf8JsonWriter writer, T value, JsonSerializerOptions options, WriteStack& state) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\src\System\Text\Json\Serialization\JsonConverterOfT.WriteCore.cs(47,0): at System.Text.Json.Serialization.JsonConverter`1.WriteCore(Utf8JsonWriter writer, T& value, JsonSerializerOptions options, WriteStack& state) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\src\System\Text\Json\Serialization\JsonSerializer.Write.Helpers.cs(74,0): at System.Text.Json.JsonSerializer.WriteUsingSerializer[TValue](Utf8JsonWriter writer, TValue& value, JsonTypeInfo jsonTypeInfo) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\src\System\Text\Json\Serialization\JsonSerializer.Write.String.cs(159,0): at System.Text.Json.JsonSerializer.WriteStringUsingSerializer[TValue](TValue& value, JsonTypeInfo jsonTypeInfo) C:\dev\dotnet\runtime\src\libraries\System.Text.Json\tests\System.Text.Json.Tests\Serialization\TypeInfoResolverFunctionalTests.cs(126,0): at System.Text.Json.Serialization.Tests.TypeInfoResolverFunctionalTests.DoNotSerializeValue42() at System.RuntimeMethodHandle.InvokeMethod(Object target, Void** arguments, Signature sig, Boolean isConstructor) C:\dev\dotnet\runtime\src\libraries\System.Private.CoreLib\src\System\Reflection\MethodInvoker.cs(64,0): at System.Reflection.MethodInvoker.Invoke(Object obj, IntPtr* args, BindingFlags invokeAttr) Finished: System.Text.Json.Tests === TEST EXECUTION SUMMARY === System.Text.Json.Tests Total: 1, Errors: 0, Failed: 1, Skipped: 0, Time: 4.878s