From 9fc9d151f01fe439f26e80b7c0b9d3c07f9d2ea3 Mon Sep 17 00:00:00 2001
From: Adeel <3840695+am11@users.noreply.github.com>
Date: Sun, 12 Jan 2025 18:32:25 +0200
Subject: [PATCH 01/14] Fix relocs errors on riscv64

---
 src/coreclr/jit/emitriscv64.cpp               |  8 +++-
 src/coreclr/pal/inc/rt/ntimage.h              |  3 +-
 .../Compiler/DependencyAnalysis/Relocation.cs | 40 +++++++++++++++++++
 .../tools/Common/JitInterface/CorInfoImpl.cs  |  5 ++-
 .../ObjectWriter/RelocationHelper.cs          |  9 ++++-
 5 files changed, 60 insertions(+), 5 deletions(-)

diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp
index df5bbae20bd95b..43a33239e92b98 100644
--- a/src/coreclr/jit/emitriscv64.cpp
+++ b/src/coreclr/jit/emitriscv64.cpp
@@ -1627,7 +1627,11 @@ unsigned emitter::emitOutputCall(const insGroup* ig, BYTE* dst, instrDesc* id, c
         int reg2 = ((int)addr & 1) + 10;
         addr     = addr ^ 1;
 
-        assert(isValidSimm32(addr - (ssize_t)dst));
+        if (!emitComp->IsTargetAbi(CORINFO_NATIVEAOT_ABI))
+        {
+            assert(isValidSimm32(addr - (ssize_t)dst));
+        }
+
         assert((addr & 1) == 0);
 
         dst += 4;
@@ -1642,7 +1646,7 @@ unsigned emitter::emitOutputCall(const insGroup* ig, BYTE* dst, instrDesc* id, c
 #endif
         emitOutput_Instr(dst, 0x00000067 | (REG_DEFAULT_HELPER_CALL_TARGET << 15) | reg2 << 7);
 
-        emitRecordRelocation(dst - 4, (BYTE*)addr, IMAGE_REL_RISCV64_PC);
+        emitRecordRelocation(dst - 4, (BYTE*)addr, IMAGE_REL_RISCV64_JALR);
     }
     else
     {
diff --git a/src/coreclr/pal/inc/rt/ntimage.h b/src/coreclr/pal/inc/rt/ntimage.h
index 3c7de052340495..4cb6eae0d9cc14 100644
--- a/src/coreclr/pal/inc/rt/ntimage.h
+++ b/src/coreclr/pal/inc/rt/ntimage.h
@@ -1024,7 +1024,8 @@ typedef IMAGE_RELOCATION UNALIGNED *PIMAGE_RELOCATION;
 //
 // RISCV64 relocation types
 //
-#define IMAGE_REL_RISCV64_PC            0x0003
+#define IMAGE_REL_RISCV64_PC            0x0002
+#define IMAGE_REL_RISCV64_JALR          0x0004
 
 //
 // CEF relocation types.
diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
index 68e299378af592..fb2257945c06b5 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
@@ -489,6 +489,41 @@ private static unsafe void PutRiscV64PC(uint* pCode, long imm32)
             Debug.Assert(GetRiscV64PC(pCode) == imm32);
         }
 
+        private static unsafe long GetRiscV64JALR(uint* pCode)
+        {
+            uint jalrInstr = *pCode;
+
+            // Extract the 12-bit signed immediate (bits 31:20 of the instruction).
+            long imm = (long)((jalrInstr >> 20) & 0xfff);
+
+            // Sign-extend the immediate.
+            if ((imm & 0x800) != 0)
+                imm |= 0xfffff000;
+
+            return imm;
+        }
+
+        private static unsafe void PutRiscV64JALR(uint* pCode, long imm)
+        {
+            // Verify that we got a valid offset within the 12-bit signed immediate range.
+            Debug.Assert(imm >= -0x800 && imm < 0x800);
+
+            uint jalrInstr = *pCode;
+
+            Debug.Assert((jalrInstr & 0x7f) == 0x17);  // JALR opcode
+
+            // Extract the lower 12 bits of the immediate.
+            uint imm12 = (uint)(imm & 0xfff);
+
+            // Assemble the JALR instruction with the immediate.
+            jalrInstr &= ~0xfff00000;
+            jalrInstr |= (imm12 << 20);
+
+            *pCode = jalrInstr;
+
+            Debug.Assert(GetRiscV64JALR(pCode) == imm);
+        }
+
         public Relocation(RelocType relocType, int offset, ISymbolNode target)
         {
             RelocType = relocType;
@@ -549,6 +584,9 @@ public static unsafe void WriteValue(RelocType relocType, void* location, long v
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
                     PutRiscV64PC((uint*)location, value);
                     break;
+                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
+                    PutRiscV64JALR((uint*)location, value);
+                    break;
                 default:
                     Debug.Fail("Invalid RelocType: " + relocType);
                     break;
@@ -616,6 +654,8 @@ public static unsafe long ReadValue(RelocType relocType, void* location)
                     return (long)GetLoongArch64JIR((uint*)location);
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
                     return (long)GetRiscV64PC((uint*)location);
+                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
+                    return (long)GetRiscV64JALR((uint*)location);
                 default:
                     Debug.Fail("Invalid RelocType: " + relocType);
                     return 0;
diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs b/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs
index 5ac150b37ec474..329df4adf57798 100644
--- a/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs
+++ b/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs
@@ -4026,12 +4026,15 @@ private static RelocType GetRelocType(TargetArchitecture targetArchitecture, ush
                 }
                 case TargetArchitecture.RiscV64:
                 {
-                    const ushort IMAGE_REL_RISCV64_PC = 3;
+                    const ushort IMAGE_REL_RISCV64_PC = 2;
+                    const ushort IMAGE_REL_RISCV64_JALR = 4;
 
                     switch (fRelocType)
                     {
                         case IMAGE_REL_RISCV64_PC:
                             return RelocType.IMAGE_REL_BASED_RISCV64_PC;
+                        case IMAGE_REL_RISCV64_JALR:
+                            return RelocType.IMAGE_REL_BASED_RISCV64_JALR;
                         default:
                             Debug.Fail("Invalid RelocType: " + fRelocType);
                             return 0;
diff --git a/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs b/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs
index 6a2501482ab786..b844fa972fcd2a 100644
--- a/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs
+++ b/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs
@@ -239,6 +239,12 @@ public void ProcessRelocation(RelocType relocationType, int sourceRVA, int targe
                         delta = targetRVA - sourceRVA;
                         break;
                     }
+                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
+                    {
+                        relocationLength = 8;
+                        delta = targetRVA - sourceRVA;
+                        break;
+                    }
 
                 default:
                     throw new NotSupportedException();
@@ -257,7 +263,8 @@ public void ProcessRelocation(RelocType relocationType, int sourceRVA, int targe
                              (relocationType == RelocType.IMAGE_REL_BASED_ARM64_PAGEOFFSET_12A) ||
                              (relocationType == RelocType.IMAGE_REL_BASED_LOONGARCH64_PC) ||
                              (relocationType == RelocType.IMAGE_REL_BASED_LOONGARCH64_JIR) ||
-                             (relocationType == RelocType.IMAGE_REL_BASED_RISCV64_PC)
+                             (relocationType == RelocType.IMAGE_REL_BASED_RISCV64_PC) ||
+                             (relocationType == RelocType.IMAGE_REL_BASED_RISCV64_JALR)
                              ) && (value != 0))
                         {
                             throw new NotSupportedException();

From c5d68c673bf446594774c3e965e9b66ea26430f5 Mon Sep 17 00:00:00 2001
From: Adeel <3840695+am11@users.noreply.github.com>
Date: Mon, 13 Jan 2025 00:15:47 +0200
Subject: [PATCH 02/14] Fix RELPTR32 and feedback

---
 src/coreclr/jit/emitriscv64.cpp                                 | 2 +-
 .../Compiler/ObjectWriter/ElfObjectWriter.cs                    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp
index 43a33239e92b98..1e5a13e9cf7bab 100644
--- a/src/coreclr/jit/emitriscv64.cpp
+++ b/src/coreclr/jit/emitriscv64.cpp
@@ -1627,7 +1627,7 @@ unsigned emitter::emitOutputCall(const insGroup* ig, BYTE* dst, instrDesc* id, c
         int reg2 = ((int)addr & 1) + 10;
         addr     = addr ^ 1;
 
-        if (!emitComp->IsTargetAbi(CORINFO_NATIVEAOT_ABI))
+        if (!emitComp->opts.compReloc)
         {
             assert(isValidSimm32(addr - (ssize_t)dst));
         }
diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
index d39e095db8247f..76756a7b11fd00 100644
--- a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
+++ b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -552,7 +552,7 @@ private void EmitRelocationsRiscV64(int sectionIndex, List<SymbolicRelocation> r
                     {
                         IMAGE_REL_BASED_DIR64 => R_RISCV_64,
                         IMAGE_REL_BASED_HIGHLOW => R_RISCV_32,
-                        IMAGE_REL_BASED_RELPTR32 => R_RISCV_RELATIVE,
+                        IMAGE_REL_BASED_RELPTR32 => R_RISCV_64,
                         IMAGE_REL_BASED_RISCV64_PC => R_RISCV_PCREL_HI20,
                         IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_CALL32,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)

From fe14fe7c38d4797c26c7a9937399388f633ce538 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Mon, 13 Jan 2025 01:26:06 +0200
Subject: [PATCH 03/14] Update
 src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Co-authored-by: Tomasz Sowiński <tomeksowi@gmail.com>
---
 .../Common/Compiler/DependencyAnalysis/Relocation.cs   | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
index fb2257945c06b5..329d64d54d8762 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
@@ -493,14 +493,8 @@ private static unsafe long GetRiscV64JALR(uint* pCode)
         {
             uint jalrInstr = *pCode;
 
-            // Extract the 12-bit signed immediate (bits 31:20 of the instruction).
-            long imm = (long)((jalrInstr >> 20) & 0xfff);
-
-            // Sign-extend the immediate.
-            if ((imm & 0x800) != 0)
-                imm |= 0xfffff000;
-
-            return imm;
+            // Extract and sign-extend the 12-bit signed immediate (bits 31:20 of the instruction).
+            return unchecked((int)jalrInstr) >> 20;
         }
 
         private static unsafe void PutRiscV64JALR(uint* pCode, long imm)

From 8d524f9be3ffc920f0c5d517b7d25b27c7e2c440 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Mon, 13 Jan 2025 02:35:18 +0200
Subject: [PATCH 04/14] Align with PutLoongArch64JIR

---
 .../Compiler/DependencyAnalysis/Relocation.cs | 34 ++++++++++++-------
 1 file changed, 22 insertions(+), 12 deletions(-)

diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
index 329d64d54d8762..93ec638e43956a 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
@@ -497,25 +497,35 @@ private static unsafe long GetRiscV64JALR(uint* pCode)
             return unchecked((int)jalrInstr) >> 20;
         }
 
-        private static unsafe void PutRiscV64JALR(uint* pCode, long imm)
+        private static unsafe void PutRiscV64JALR(uint* pCode, long imm32)
         {
-            // Verify that we got a valid offset within the 12-bit signed immediate range.
-            Debug.Assert(imm >= -0x800 && imm < 0x800);
+            // Verify that we got a valid offset within 32-bit signed range.
+            Debug.Assert((imm32 >= -0x80000000) && (imm32 < 0x80000000));
 
-            uint jalrInstr = *pCode;
+            uint pcInstr = *pCode;
+
+            // Validate that the first instruction is AUIPC
+            Debug.Assert((pcInstr & 0x7f) == 0x17);
 
-            Debug.Assert((jalrInstr & 0x7f) == 0x17);  // JALR opcode
+            // Break the immediate into high and low parts
+            long immHi20 = (imm32 + 0x800) >> 12;
+            long immLo12 = imm32 & 0xfff;
 
-            // Extract the lower 12 bits of the immediate.
-            uint imm12 = (uint)(imm & 0xfff);
+            // Assemble the AUIPC instruction with the upper 20 bits of imm32.
+            pcInstr |= (uint)((immHi20 & 0xfffff) << 12);
+            *pCode = pcInstr;
+
+            pcInstr = *(pCode + 1);
 
-            // Assemble the JALR instruction with the immediate.
-            jalrInstr &= ~0xfff00000;
-            jalrInstr |= (imm12 << 20);
+            // Validate that the second instruction is JALR
+            Debug.Assert((pcInstr & 0x7f) == 0x67);
 
-            *pCode = jalrInstr;
+            // Assemble the JALR instruction with the lower 12 bits of imm32.
+            pcInstr |= (uint)((immLo12 & 0xfff) << 20);
+            *(pCode + 1) = pcInstr;
 
-            Debug.Assert(GetRiscV64JALR(pCode) == imm);
+            // Debug validation to ensure reconstruction is correct.
+            Debug.Assert(GetRiscV64JALR(pCode) == imm32);
         }
 
         public Relocation(RelocType relocType, int offset, ISymbolNode target)

From 2b3f8ac8c161eca65123e186783454c653c2f380 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Tue, 14 Jan 2025 02:03:39 +0200
Subject: [PATCH 05/14] Consolidate relocs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Co-authored-by: Tomek Sowiński <tomeksowi@gmail.com>
---
 .../Compiler/DependencyAnalysis/Relocation.cs | 48 ++-----------------
 1 file changed, 3 insertions(+), 45 deletions(-)

diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
index 93ec638e43956a..b4655302ded8ff 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
@@ -470,7 +470,7 @@ private static unsafe int GetRiscV64PC(uint* pCode)
         private static unsafe void PutRiscV64PC(uint* pCode, long imm32)
         {
             // Verify that we got a valid offset
-            Debug.Assert((int)imm32 == imm32);
+            Debug.Assert((imm32 >= (long)-0x80000000 - 0x800) && (imm32 < (long)0x80000000 - 0x800));
 
             int doff = (int)(imm32 & 0xfff);
             uint auipcInstr = *pCode;
@@ -489,45 +489,6 @@ private static unsafe void PutRiscV64PC(uint* pCode, long imm32)
             Debug.Assert(GetRiscV64PC(pCode) == imm32);
         }
 
-        private static unsafe long GetRiscV64JALR(uint* pCode)
-        {
-            uint jalrInstr = *pCode;
-
-            // Extract and sign-extend the 12-bit signed immediate (bits 31:20 of the instruction).
-            return unchecked((int)jalrInstr) >> 20;
-        }
-
-        private static unsafe void PutRiscV64JALR(uint* pCode, long imm32)
-        {
-            // Verify that we got a valid offset within 32-bit signed range.
-            Debug.Assert((imm32 >= -0x80000000) && (imm32 < 0x80000000));
-
-            uint pcInstr = *pCode;
-
-            // Validate that the first instruction is AUIPC
-            Debug.Assert((pcInstr & 0x7f) == 0x17);
-
-            // Break the immediate into high and low parts
-            long immHi20 = (imm32 + 0x800) >> 12;
-            long immLo12 = imm32 & 0xfff;
-
-            // Assemble the AUIPC instruction with the upper 20 bits of imm32.
-            pcInstr |= (uint)((immHi20 & 0xfffff) << 12);
-            *pCode = pcInstr;
-
-            pcInstr = *(pCode + 1);
-
-            // Validate that the second instruction is JALR
-            Debug.Assert((pcInstr & 0x7f) == 0x67);
-
-            // Assemble the JALR instruction with the lower 12 bits of imm32.
-            pcInstr |= (uint)((immLo12 & 0xfff) << 20);
-            *(pCode + 1) = pcInstr;
-
-            // Debug validation to ensure reconstruction is correct.
-            Debug.Assert(GetRiscV64JALR(pCode) == imm32);
-        }
-
         public Relocation(RelocType relocType, int offset, ISymbolNode target)
         {
             RelocType = relocType;
@@ -586,10 +547,8 @@ public static unsafe void WriteValue(RelocType relocType, void* location, long v
                     PutLoongArch64JIR((uint*)location, value);
                     break;
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
-                    PutRiscV64PC((uint*)location, value);
-                    break;
                 case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
-                    PutRiscV64JALR((uint*)location, value);
+                    PutRiscV64PC((uint*)location, value);
                     break;
                 default:
                     Debug.Fail("Invalid RelocType: " + relocType);
@@ -657,9 +616,8 @@ public static unsafe long ReadValue(RelocType relocType, void* location)
                 case RelocType.IMAGE_REL_BASED_LOONGARCH64_JIR:
                     return (long)GetLoongArch64JIR((uint*)location);
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
-                    return (long)GetRiscV64PC((uint*)location);
                 case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
-                    return (long)GetRiscV64JALR((uint*)location);
+                    return (long)GetRiscV64PC((uint*)location);
                 default:
                     Debug.Fail("Invalid RelocType: " + relocType);
                     return 0;

From f8d453f682ada6db721d0e78e28a92e3467f34bc Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Tue, 14 Jan 2025 04:36:17 +0200
Subject: [PATCH 06/14] Use reloc-57

Co-authored-by: Filip Navara <filip.navara@gmail.com>
---
 .../Compiler/ObjectWriter/ElfObjectWriter.cs                    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
index 76756a7b11fd00..2e530c1670e826 100644
--- a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
+++ b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -552,7 +552,7 @@ private void EmitRelocationsRiscV64(int sectionIndex, List<SymbolicRelocation> r
                     {
                         IMAGE_REL_BASED_DIR64 => R_RISCV_64,
                         IMAGE_REL_BASED_HIGHLOW => R_RISCV_32,
-                        IMAGE_REL_BASED_RELPTR32 => R_RISCV_64,
+                        IMAGE_REL_BASED_RELPTR32 => R_RISCV_64_LO12,
                         IMAGE_REL_BASED_RISCV64_PC => R_RISCV_PCREL_HI20,
                         IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_CALL32,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)

From 5d4590a6bf8fdc18ab1728fa513aa4ec84bdf155 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Tue, 14 Jan 2025 05:20:48 +0200
Subject: [PATCH 07/14] Combine PC & JALR to correct reloc

---
 .../Compiler/ObjectWriter/ElfObjectWriter.cs                   | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
index 2e530c1670e826..dc9f2400cd7049 100644
--- a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
+++ b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -516,8 +516,7 @@ private void EmitRelocationsLoongArch64(int sectionIndex, List<SymbolicRelocatio
                         IMAGE_REL_BASED_DIR64 => R_LARCH_64,
                         IMAGE_REL_BASED_HIGHLOW => R_LARCH_32,
                         IMAGE_REL_BASED_RELPTR32 => R_LARCH_32_PCREL,
-                        IMAGE_REL_BASED_LOONGARCH64_PC => R_LARCH_PCALA_HI20,
-                        IMAGE_REL_BASED_LOONGARCH64_JIR => R_LARCH_CALL36,
+                        IMAGE_REL_BASED_RISCV64_PC or IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_64_HI20,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)
                     };
 

From 0dddbf97766575c16b154722528b4706a6d730e0 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Tue, 14 Jan 2025 05:45:05 +0200
Subject: [PATCH 08/14] Fix var macros

---
 .../nativeaot/Runtime/unix/unixasmmacrosriscv64.inc  | 12 +++---------
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/src/coreclr/nativeaot/Runtime/unix/unixasmmacrosriscv64.inc b/src/coreclr/nativeaot/Runtime/unix/unixasmmacrosriscv64.inc
index 5f6bd84a09476b..0bb8f96a640dbb 100644
--- a/src/coreclr/nativeaot/Runtime/unix/unixasmmacrosriscv64.inc
+++ b/src/coreclr/nativeaot/Runtime/unix/unixasmmacrosriscv64.inc
@@ -44,18 +44,12 @@ C_FUNC(\Name):
 .endm
 
 .macro PREPARE_EXTERNAL_VAR Name, HelperReg
-        lui \HelperReg, %hi(C_FUNC(\Name))
-        addi \HelperReg, \HelperReg, %lo(C_FUNC(\Name))
-.endm
-
-.macro PREPARE_EXTERNAL_VAR_INDIRECT Name, HelperReg
-        lui \HelperReg, %hi(C_FUNC(\Name))
-        ld  \HelperReg, %lo(C_FUNC(\Name))(\HelperReg)
+    la \HelperReg, C_FUNC(\Name) // Resolves the address in one step
 .endm
 
 .macro PREPARE_EXTERNAL_VAR_INDIRECT_W Name, HelperReg
-        lui \HelperReg, %hi(C_FUNC(\Name))
-        lw  \HelperReg, %lo(C_FUNC(\Name))(\HelperReg)
+    la \HelperReg, C_FUNC(\Name)
+    lw \HelperReg, 0(\HelperReg)
 .endm
 
 .macro PROLOG_STACK_ALLOC Size

From 36d76c7416d0372f2f4e5ff968671215e868c8c0 Mon Sep 17 00:00:00 2001
From: Adeel <3840695+am11@users.noreply.github.com>
Date: Tue, 14 Jan 2025 08:46:04 +0200
Subject: [PATCH 09/14] More fixes

---
 .../Microsoft.NETCore.Native.Unix.targets                 | 2 +-
 src/coreclr/nativeaot/Runtime/riscv64/ExceptionHandling.S | 2 +-
 .../nativeaot/Runtime/riscv64/UniversalTransition.S       | 6 +++++-
 .../Compiler/ObjectWriter/ElfObjectWriter.cs              | 8 ++++----
 4 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets b/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
index d2fe6e75e1db6f..1aa55ee427eb9f 100644
--- a/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
+++ b/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
@@ -179,7 +179,6 @@ The .NET Foundation licenses this file to you under the MIT license.
       <NativeLibrary Include="$(IlcFrameworkNativePath)libbrotlicommon.a" />
     </ItemGroup>
 
-
     <ItemGroup Condition="'$(StaticICULinking)' == 'true' and '$(NativeLib)' != 'Static' and '$(InvariantGlobalization)' != 'true'">
       <NativeLibrary Include="$(IntermediateOutputPath)libs/System.Globalization.Native/build/libSystem.Globalization.Native.a" />
       <DirectPInvoke Include="libSystem.Globalization.Native" />
@@ -222,6 +221,7 @@ The .NET Foundation licenses this file to you under the MIT license.
       <NativeSystemLibrary Include="log" Condition="'$(_linuxLibcFlavor)' == 'bionic'" />
       <NativeSystemLibrary Include="icucore" Condition="'$(_IsApplePlatform)' == 'true'" />
       <NativeSystemLibrary Include="m" />
+      <NativeSystemLibrary Include="atomic" Condition="'$(_targetArchitecture)' == 'riscv64'" />
     </ItemGroup>
 
     <ItemGroup>
diff --git a/src/coreclr/nativeaot/Runtime/riscv64/ExceptionHandling.S b/src/coreclr/nativeaot/Runtime/riscv64/ExceptionHandling.S
index 36707233d18f57..50330ce381089c 100644
--- a/src/coreclr/nativeaot/Runtime/riscv64/ExceptionHandling.S
+++ b/src/coreclr/nativeaot/Runtime/riscv64/ExceptionHandling.S
@@ -328,7 +328,7 @@
 
         // Normal case where a valid return address location is hijacked
         sd    a1, 0(a3)
-        tail  ClearThreadState
+        tail  LOCAL_LABEL(ClearThreadState)
 
 LOCAL_LABEL(TailCallWasHijacked):
 
diff --git a/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S b/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S
index 45d61e749700f1..f6c619d867ae92 100644
--- a/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S
+++ b/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S
@@ -136,6 +136,11 @@
         mv a1, t1                                         // Second parameter to target function
         jalr t0, t1, 0                                    // Jump to the function in t1
 
+        // We cannot make the label public as that tricks DIA stackwalker into thinking
+        // it's the beginning of a method. For this reason we export an auxiliary variable
+        // holding the address instead.
+    ALTERNATE_ENTRY ReturnFrom\FunctionName
+
         // Restore the result address from t2
         mv t2, a0                                       // Move result to t2
 
@@ -169,7 +174,6 @@
 
     .endm
 
-
     // To enable proper step-in behavior in the debugger, we need to have two instances
     // of the thunk. For the first one, the debugger steps into the call in the function,
     // for the other, it steps over it.
diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
index dc9f2400cd7049..042681b5bdb4b3 100644
--- a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
+++ b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -516,7 +516,8 @@ private void EmitRelocationsLoongArch64(int sectionIndex, List<SymbolicRelocatio
                         IMAGE_REL_BASED_DIR64 => R_LARCH_64,
                         IMAGE_REL_BASED_HIGHLOW => R_LARCH_32,
                         IMAGE_REL_BASED_RELPTR32 => R_LARCH_32_PCREL,
-                        IMAGE_REL_BASED_RISCV64_PC or IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_64_HI20,
+                        IMAGE_REL_BASED_LOONGARCH64_PC => R_LARCH_PCALA_HI20,
+                        IMAGE_REL_BASED_LOONGARCH64_JIR => R_LARCH_CALL36,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)
                     };
 
@@ -552,8 +553,7 @@ private void EmitRelocationsRiscV64(int sectionIndex, List<SymbolicRelocation> r
                         IMAGE_REL_BASED_DIR64 => R_RISCV_64,
                         IMAGE_REL_BASED_HIGHLOW => R_RISCV_32,
                         IMAGE_REL_BASED_RELPTR32 => R_RISCV_64_LO12,
-                        IMAGE_REL_BASED_RISCV64_PC => R_RISCV_PCREL_HI20,
-                        IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_CALL32,
+                        IMAGE_REL_BASED_RISCV64_PC or IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_64_HI20,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)
                     };
 
@@ -847,7 +847,7 @@ private void EmitObjectFile<TSize>(FileStream outputFileStream)
                     EM_LOONGARCH => 0x43u, // For LoongArch ELF psABI specify the ABI version (1) and modifiers (64-bit GPRs, 64-bit FPRs)
                     // TODO: update once RISC-V runtime supports "C" extension (compressed instructions)
                     // it should be 0x0005u EF_RISCV_RVC (0x0001) | EF_RISCV_FLOAT_ABI_DOUBLE (0x0006)
-                    EM_RISCV => 0x0004u, // EF_RISCV_FLOAT_ABI_DOUBLE (double precision floating-point ABI).
+                    EM_RISCV => 0x0005u, // EF_RISCV_FLOAT_ABI_DOUBLE (double precision floating-point ABI).
                     _ => 0u
                 },
             };

From 4f588612e6d0e5be490748bc2673d0ecf606f325 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Tue, 14 Jan 2025 09:18:34 +0200
Subject: [PATCH 10/14] Revert unrelated change

---
 .../Compiler/ObjectWriter/ElfObjectWriter.cs                    | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
index 042681b5bdb4b3..31e3bbee3fe87d 100644
--- a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
+++ b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -847,7 +847,7 @@ private void EmitObjectFile<TSize>(FileStream outputFileStream)
                     EM_LOONGARCH => 0x43u, // For LoongArch ELF psABI specify the ABI version (1) and modifiers (64-bit GPRs, 64-bit FPRs)
                     // TODO: update once RISC-V runtime supports "C" extension (compressed instructions)
                     // it should be 0x0005u EF_RISCV_RVC (0x0001) | EF_RISCV_FLOAT_ABI_DOUBLE (0x0006)
-                    EM_RISCV => 0x0005u, // EF_RISCV_FLOAT_ABI_DOUBLE (double precision floating-point ABI).
+                    EM_RISCV => 0x0004u, // EF_RISCV_FLOAT_ABI_DOUBLE (double precision floating-point ABI).
                     _ => 0u
                 },
             };

From 61f27aea2de90eb6cc55a95bb9b57e3e29442299 Mon Sep 17 00:00:00 2001
From: Adeel Mujahid <3840695+am11@users.noreply.github.com>
Date: Wed, 15 Jan 2025 01:29:13 +0200
Subject: [PATCH 11/14] Update emitriscv64.h

---
 src/coreclr/jit/emitriscv64.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/coreclr/jit/emitriscv64.h b/src/coreclr/jit/emitriscv64.h
index 6c73f3fe577fc4..c56d6f943fbe8f 100644
--- a/src/coreclr/jit/emitriscv64.h
+++ b/src/coreclr/jit/emitriscv64.h
@@ -195,11 +195,11 @@ static bool isValidSimm21(ssize_t value)
     return -(((int)1) << 20) <= value && value < (((int)1) << 20);
 };
 
-// Returns true if 'value' is a legal signed immediate 32 bit encoding.
+// Returns true if 'value' is a legal signed immediate 32-bit encoding with the offset adjustment.
 static bool isValidSimm32(ssize_t value)
 {
-    return -(((ssize_t)1) << 31) <= value && value < (((ssize_t)1) << 31);
-};
+    return (-(((ssize_t)1) << 31) - 0x800) <= value && value < (((ssize_t)1) << 31) - 0x800;
+}
 
 // Returns the number of bits used by the given 'size'.
 inline static unsigned getBitWidth(emitAttr size)

From f53d5f97c94d77a12bb4b0e7cf08e4459bffe45a Mon Sep 17 00:00:00 2001
From: Adeel <3840695+am11@users.noreply.github.com>
Date: Wed, 15 Jan 2025 16:29:13 +0200
Subject: [PATCH 12/14] Remove JALR

---
 src/coreclr/jit/emitriscv64.cpp                          | 2 +-
 src/coreclr/pal/inc/rt/ntimage.h                         | 3 +--
 .../Compiler/DependencyAnalysis/ObjectDataBuilder.cs     | 1 -
 .../Common/Compiler/DependencyAnalysis/Relocation.cs     | 3 ---
 .../DependencyAnalysis/Target_RiscV64/RiscV64Emitter.cs  | 2 +-
 src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs     | 5 +----
 .../Compiler/ObjectWriter/ElfObjectWriter.cs             | 2 +-
 .../ObjectWriter/RelocationHelper.cs                     | 9 +--------
 8 files changed, 6 insertions(+), 21 deletions(-)

diff --git a/src/coreclr/jit/emitriscv64.cpp b/src/coreclr/jit/emitriscv64.cpp
index 1e5a13e9cf7bab..12baec4bc9db03 100644
--- a/src/coreclr/jit/emitriscv64.cpp
+++ b/src/coreclr/jit/emitriscv64.cpp
@@ -1646,7 +1646,7 @@ unsigned emitter::emitOutputCall(const insGroup* ig, BYTE* dst, instrDesc* id, c
 #endif
         emitOutput_Instr(dst, 0x00000067 | (REG_DEFAULT_HELPER_CALL_TARGET << 15) | reg2 << 7);
 
-        emitRecordRelocation(dst - 4, (BYTE*)addr, IMAGE_REL_RISCV64_JALR);
+        emitRecordRelocation(dst - 4, (BYTE*)addr, IMAGE_REL_RISCV64_PC);
     }
     else
     {
diff --git a/src/coreclr/pal/inc/rt/ntimage.h b/src/coreclr/pal/inc/rt/ntimage.h
index 4cb6eae0d9cc14..3c7de052340495 100644
--- a/src/coreclr/pal/inc/rt/ntimage.h
+++ b/src/coreclr/pal/inc/rt/ntimage.h
@@ -1024,8 +1024,7 @@ typedef IMAGE_RELOCATION UNALIGNED *PIMAGE_RELOCATION;
 //
 // RISCV64 relocation types
 //
-#define IMAGE_REL_RISCV64_PC            0x0002
-#define IMAGE_REL_RISCV64_JALR          0x0004
+#define IMAGE_REL_RISCV64_PC            0x0003
 
 //
 // CEF relocation types.
diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/ObjectDataBuilder.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/ObjectDataBuilder.cs
index daa917e6b9fa80..53e4671b57a58f 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/ObjectDataBuilder.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/ObjectDataBuilder.cs
@@ -301,7 +301,6 @@ public void EmitReloc(ISymbolNode symbol, RelocType relocType, int delta = 0)
                 case RelocType.IMAGE_REL_BASED_LOONGARCH64_JIR:
 
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
-                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
                     Debug.Assert(delta == 0);
                     // Do not vacate space for this kind of relocation, because
                     // the space is embedded in the instruction.
diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
index b4655302ded8ff..90b1d496e41aae 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Relocation.cs
@@ -20,7 +20,6 @@ public enum RelocType
         IMAGE_REL_BASED_LOONGARCH64_PC       = 0x16,   // LoongArch64: pcalau12i+imm12
         IMAGE_REL_BASED_LOONGARCH64_JIR      = 0x17,   // LoongArch64: pcaddu18i+jirl
         IMAGE_REL_BASED_RISCV64_PC           = 0x18,   // RiscV64: auipc
-        IMAGE_REL_BASED_RISCV64_JALR         = 0x19,   // RiscV64: jalr (indirect jump)
         IMAGE_REL_BASED_RELPTR32             = 0x7C,   // 32-bit relative address from byte starting reloc
                                                        // This is a special NGEN-specific relocation type
                                                        // for relative pointer (used to make NGen relocation
@@ -547,7 +546,6 @@ public static unsafe void WriteValue(RelocType relocType, void* location, long v
                     PutLoongArch64JIR((uint*)location, value);
                     break;
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
-                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
                     PutRiscV64PC((uint*)location, value);
                     break;
                 default:
@@ -616,7 +614,6 @@ public static unsafe long ReadValue(RelocType relocType, void* location)
                 case RelocType.IMAGE_REL_BASED_LOONGARCH64_JIR:
                     return (long)GetLoongArch64JIR((uint*)location);
                 case RelocType.IMAGE_REL_BASED_RISCV64_PC:
-                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
                     return (long)GetRiscV64PC((uint*)location);
                 default:
                     Debug.Fail("Invalid RelocType: " + relocType);
diff --git a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Target_RiscV64/RiscV64Emitter.cs b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Target_RiscV64/RiscV64Emitter.cs
index 6b547abefb1905..aed078619dfd13 100644
--- a/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Target_RiscV64/RiscV64Emitter.cs
+++ b/src/coreclr/tools/Common/Compiler/DependencyAnalysis/Target_RiscV64/RiscV64Emitter.cs
@@ -111,7 +111,7 @@ public void EmitJMP(ISymbolNode symbol)
             }
             else
             {
-                Builder.EmitReloc(symbol, RelocType.IMAGE_REL_BASED_RISCV64_JALR);
+                Builder.EmitReloc(symbol, RelocType.IMAGE_REL_BASED_RISCV64_PC);
                 EmitPC(Register.X29); // auipc x29, 0
                 EmitJALR(Register.X0, Register.X29, 0); // jalr x0, 0(x29)
             }
diff --git a/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs b/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs
index 9d9ec9f3ee6364..c635b416708be2 100644
--- a/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs
+++ b/src/coreclr/tools/Common/JitInterface/CorInfoImpl.cs
@@ -4026,15 +4026,12 @@ private static RelocType GetRelocType(TargetArchitecture targetArchitecture, ush
                 }
                 case TargetArchitecture.RiscV64:
                 {
-                    const ushort IMAGE_REL_RISCV64_PC = 2;
-                    const ushort IMAGE_REL_RISCV64_JALR = 4;
+                    const ushort IMAGE_REL_RISCV64_PC = 3;
 
                     switch (fRelocType)
                     {
                         case IMAGE_REL_RISCV64_PC:
                             return RelocType.IMAGE_REL_BASED_RISCV64_PC;
-                        case IMAGE_REL_RISCV64_JALR:
-                            return RelocType.IMAGE_REL_BASED_RISCV64_JALR;
                         default:
                             Debug.Fail("Invalid RelocType: " + fRelocType);
                             return 0;
diff --git a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
index 31e3bbee3fe87d..e318cccff2411b 100644
--- a/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
+++ b/src/coreclr/tools/aot/ILCompiler.Compiler/Compiler/ObjectWriter/ElfObjectWriter.cs
@@ -553,7 +553,7 @@ private void EmitRelocationsRiscV64(int sectionIndex, List<SymbolicRelocation> r
                         IMAGE_REL_BASED_DIR64 => R_RISCV_64,
                         IMAGE_REL_BASED_HIGHLOW => R_RISCV_32,
                         IMAGE_REL_BASED_RELPTR32 => R_RISCV_64_LO12,
-                        IMAGE_REL_BASED_RISCV64_PC or IMAGE_REL_BASED_RISCV64_JALR => R_RISCV_64_HI20,
+                        IMAGE_REL_BASED_RISCV64_PC => R_RISCV_64_HI20,
                         _ => throw new NotSupportedException("Unknown relocation type: " + symbolicRelocation.Type)
                     };
 
diff --git a/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs b/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs
index b844fa972fcd2a..6a2501482ab786 100644
--- a/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs
+++ b/src/coreclr/tools/aot/ILCompiler.ReadyToRun/ObjectWriter/RelocationHelper.cs
@@ -239,12 +239,6 @@ public void ProcessRelocation(RelocType relocationType, int sourceRVA, int targe
                         delta = targetRVA - sourceRVA;
                         break;
                     }
-                case RelocType.IMAGE_REL_BASED_RISCV64_JALR:
-                    {
-                        relocationLength = 8;
-                        delta = targetRVA - sourceRVA;
-                        break;
-                    }
 
                 default:
                     throw new NotSupportedException();
@@ -263,8 +257,7 @@ public void ProcessRelocation(RelocType relocationType, int sourceRVA, int targe
                              (relocationType == RelocType.IMAGE_REL_BASED_ARM64_PAGEOFFSET_12A) ||
                              (relocationType == RelocType.IMAGE_REL_BASED_LOONGARCH64_PC) ||
                              (relocationType == RelocType.IMAGE_REL_BASED_LOONGARCH64_JIR) ||
-                             (relocationType == RelocType.IMAGE_REL_BASED_RISCV64_PC) ||
-                             (relocationType == RelocType.IMAGE_REL_BASED_RISCV64_JALR)
+                             (relocationType == RelocType.IMAGE_REL_BASED_RISCV64_PC)
                              ) && (value != 0))
                         {
                             throw new NotSupportedException();

From 7ded96c4bfe3e90a2ca1cb39bdb143d0c1483ca6 Mon Sep 17 00:00:00 2001
From: Adeel <3840695+am11@users.noreply.github.com>
Date: Fri, 17 Jan 2025 02:23:46 +0200
Subject: [PATCH 13/14] Address CR fb

---
 .../BuildIntegration/Microsoft.NETCore.Native.Unix.targets  | 6 ++++++
 src/coreclr/nativeaot/Runtime/amd64/UniversalTransition.asm | 4 ----
 src/coreclr/nativeaot/Runtime/arm/UniversalTransition.S     | 4 ----
 src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.S   | 3 ---
 src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.asm | 3 ---
 src/coreclr/nativeaot/Runtime/i386/UniversalTransition.asm  | 4 ----
 .../nativeaot/Runtime/loongarch64/UniversalTransition.S     | 3 ---
 src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S | 3 ---
 8 files changed, 6 insertions(+), 24 deletions(-)

diff --git a/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets b/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
index 1aa55ee427eb9f..d70262a3ab2397 100644
--- a/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
+++ b/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
@@ -221,6 +221,12 @@ The .NET Foundation licenses this file to you under the MIT license.
       <NativeSystemLibrary Include="log" Condition="'$(_linuxLibcFlavor)' == 'bionic'" />
       <NativeSystemLibrary Include="icucore" Condition="'$(_IsApplePlatform)' == 'true'" />
       <NativeSystemLibrary Include="m" />
+      <!--
+        TODO: Double-check if libatomic's emulated CAS-128 works as expected once AOT applications are
+        functional on linux-riscv64: https://github.com/dotnet/runtime/issues/106223.
+        CAS-128 is natively supported starting with the Zacas extension in Linux 6.8; however, hardware support
+        for RVA23 profile is not available at the time of writing.
+      -->
       <NativeSystemLibrary Include="atomic" Condition="'$(_targetArchitecture)' == 'riscv64'" />
     </ItemGroup>
 
diff --git a/src/coreclr/nativeaot/Runtime/amd64/UniversalTransition.asm b/src/coreclr/nativeaot/Runtime/amd64/UniversalTransition.asm
index 9ed827048c20f8..777ef9d2de620c 100644
--- a/src/coreclr/nativeaot/Runtime/amd64/UniversalTransition.asm
+++ b/src/coreclr/nativeaot/Runtime/amd64/UniversalTransition.asm
@@ -128,10 +128,6 @@ endif ; TRASH_SAVED_ARGUMENT_REGISTERS
 
 ALTERNATE_ENTRY ReturnFrom&FunctionName
 
-        ; We cannot make the label public as that tricks DIA stackwalker into thinking
-        ; it's the beginning of a method. For this reason we export the address
-        ; by means of an auxiliary variable.
-
         ; restore fp argument registers
         movdqa          xmm0, [rsp + DISTANCE_FROM_CHILDSP_TO_FP_REGS      ]
         movdqa          xmm1, [rsp + DISTANCE_FROM_CHILDSP_TO_FP_REGS + 10h]
diff --git a/src/coreclr/nativeaot/Runtime/arm/UniversalTransition.S b/src/coreclr/nativeaot/Runtime/arm/UniversalTransition.S
index 6eb4eaa1b1b6ac..ff7557ef0de488 100644
--- a/src/coreclr/nativeaot/Runtime/arm/UniversalTransition.S
+++ b/src/coreclr/nativeaot/Runtime/arm/UniversalTransition.S
@@ -125,10 +125,6 @@ NESTED_ENTRY Rhp\FunctionName, _TEXT, NoHandler
 
 GLOBAL_LABEL ReturnFrom\FunctionName
 
-        // We cannot make the label public as that tricks DIA stackwalker into thinking
-        // it's the beginning of a method. For this reason we export an auxiliary variable
-        // holding the address instead.
-
         // Move the result (the target address) to r12 so it doesn't get overridden when we restore the
         // argument registers. Additionally make sure the thumb2 bit is set.
         orr	         r12, r0, #1
diff --git a/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.S b/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.S
index 9aa069f0033402..c77fc7bfa9ea53 100644
--- a/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.S
+++ b/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.S
@@ -129,9 +129,6 @@
         mov         x1, xip1                                        // Second parameter to target function
         blr         xip0
 
-        // We cannot make the label public as that tricks DIA stackwalker into thinking
-        // it's the beginning of a method. For this reason we export an auxiliary variable
-        // holding the address instead.
 ALTERNATE_ENTRY ReturnFrom\FunctionName
 
         // Move the result (the target address) to x12 so it doesn't get overridden when we restore the
diff --git a/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.asm b/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.asm
index 36a9928940511f..7d3607f27a01eb 100644
--- a/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.asm
+++ b/src/coreclr/nativeaot/Runtime/arm64/UniversalTransition.asm
@@ -120,9 +120,6 @@
         mov         x1, xip1                                        ;; Second parameter to target function
         blr         xip0
 
-        ;; We cannot make the label public as that tricks DIA stackwalker into thinking
-        ;; it's the beginning of a method. For this reason we export an auxiliary variable
-        ;; holding the address instead.
     ALTERNATE_ENTRY ReturnFrom$FunctionName
 
         ;; Move the result (the target address) to x12 so it doesn't get overridden when we restore the
diff --git a/src/coreclr/nativeaot/Runtime/i386/UniversalTransition.asm b/src/coreclr/nativeaot/Runtime/i386/UniversalTransition.asm
index f5abc17e985d71..f744a9d936d4c8 100644
--- a/src/coreclr/nativeaot/Runtime/i386/UniversalTransition.asm
+++ b/src/coreclr/nativeaot/Runtime/i386/UniversalTransition.asm
@@ -76,10 +76,6 @@ ALTERNATE_ENTRY _Rhp&FunctionName&@0
 
 ALTERNATE_ENTRY _ReturnFrom&FunctionName
 
-        ; We cannot make the label public as that tricks DIA stackwalker into thinking
-        ; it's the beginning of a method. For this reason we export an auxiliary variable
-        ; holding the address instead.
-
         pop edx
         pop ecx
         add esp, 8
diff --git a/src/coreclr/nativeaot/Runtime/loongarch64/UniversalTransition.S b/src/coreclr/nativeaot/Runtime/loongarch64/UniversalTransition.S
index e9470e114588e4..13a48cb256b41b 100644
--- a/src/coreclr/nativeaot/Runtime/loongarch64/UniversalTransition.S
+++ b/src/coreclr/nativeaot/Runtime/loongarch64/UniversalTransition.S
@@ -137,9 +137,6 @@
         ori  $a1, $t8, 0                                         // Second parameter to target function
         jirl  $ra, $t7, 0
 
-        // We cannot make the label public as that tricks DIA stackwalker into thinking
-        // it's the beginning of a method. For this reason we export an auxiliary variable
-        // holding the address instead.
     ALTERNATE_ENTRY ReturnFrom\FunctionName
 
         // Move the result (the target address) to t3 so it doesn't get overridden when we restore the
diff --git a/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S b/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S
index f6c619d867ae92..7cc2616b53733b 100644
--- a/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S
+++ b/src/coreclr/nativeaot/Runtime/riscv64/UniversalTransition.S
@@ -136,9 +136,6 @@
         mv a1, t1                                         // Second parameter to target function
         jalr t0, t1, 0                                    // Jump to the function in t1
 
-        // We cannot make the label public as that tricks DIA stackwalker into thinking
-        // it's the beginning of a method. For this reason we export an auxiliary variable
-        // holding the address instead.
     ALTERNATE_ENTRY ReturnFrom\FunctionName
 
         // Restore the result address from t2

From 8a95da2f9a933f7364c5915e06986818c040332f Mon Sep 17 00:00:00 2001
From: Adeel <3840695+am11@users.noreply.github.com>
Date: Fri, 17 Jan 2025 03:10:46 +0200
Subject: [PATCH 14/14] Combine TODO comments related to CAS-128

---
 .../Microsoft.NETCore.Native.Unix.targets     |  7 +------
 .../nativeaot/Runtime/unix/PalRedhawkInline.h | 21 ++++++++++++-------
 2 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets b/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
index d70262a3ab2397..a11ba22a977ceb 100644
--- a/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
+++ b/src/coreclr/nativeaot/BuildIntegration/Microsoft.NETCore.Native.Unix.targets
@@ -221,12 +221,7 @@ The .NET Foundation licenses this file to you under the MIT license.
       <NativeSystemLibrary Include="log" Condition="'$(_linuxLibcFlavor)' == 'bionic'" />
       <NativeSystemLibrary Include="icucore" Condition="'$(_IsApplePlatform)' == 'true'" />
       <NativeSystemLibrary Include="m" />
-      <!--
-        TODO: Double-check if libatomic's emulated CAS-128 works as expected once AOT applications are
-        functional on linux-riscv64: https://github.com/dotnet/runtime/issues/106223.
-        CAS-128 is natively supported starting with the Zacas extension in Linux 6.8; however, hardware support
-        for RVA23 profile is not available at the time of writing.
-      -->
+      <!-- See the comment in PalInterlockedCompareExchange128 for details. -->
       <NativeSystemLibrary Include="atomic" Condition="'$(_targetArchitecture)' == 'riscv64'" />
     </ItemGroup>
 
diff --git a/src/coreclr/nativeaot/Runtime/unix/PalRedhawkInline.h b/src/coreclr/nativeaot/Runtime/unix/PalRedhawkInline.h
index 4ea2fc68a4cbbf..2bea01616f019b 100644
--- a/src/coreclr/nativeaot/Runtime/unix/PalRedhawkInline.h
+++ b/src/coreclr/nativeaot/Runtime/unix/PalRedhawkInline.h
@@ -94,21 +94,28 @@ FORCEINLINE int64_t PalInterlockedCompareExchange64(_Inout_ int64_t volatile *pD
     return result;
 }
 
-#if defined(HOST_AMD64) || defined(HOST_ARM64) || defined(HOST_LOONGARCH64) || defined(HOST_RISCV64)
+#if defined(HOST_64BIT)
 FORCEINLINE uint8_t PalInterlockedCompareExchange128(_Inout_ int64_t volatile *pDst, int64_t iValueHigh, int64_t iValueLow, int64_t *pComparandAndResult)
 {
     __int128_t iComparand = ((__int128_t)pComparandAndResult[1] << 64) + (uint64_t)pComparandAndResult[0];
-    // TODO-LOONGARCH64: for LoongArch64, it supports 128bits atomic from 3A6000-CPU which is ISA1.1's version.
-    // The LA64's compiler will translate the `__sync_val_compare_and_swap` into calling the libatomic's library interface to emulate
-    // the 128-bit CAS by mutex_lock if the target processor doesn't support the ISA1.1.
-    // But this emulation by libatomic doesn't satisfy requirements here which it must update two adjacent pointers atomically.
-    // this is being discussed in https://github.com/dotnet/runtime/issues/109276.
+
+    // TODO-LOONGARCH64: the 128-bit CAS is supported starting from the 3A6000 CPU (ISA1.1).
+    // When running on older hardware that doesn't support native CAS-128, the system falls back
+    // to a mutex-based approach via libatomic, which is not suitable for runtime requirements.
+    //
+    // TODO-RISCV64: double-check if libatomic's emulated CAS-128 works as expected once AOT applications are
+    // functional on linux-riscv64: https://github.com/dotnet/runtime/issues/106223.
+    // CAS-128 is natively supported starting with the Zacas extension in Linux 6.8; however, hardware support
+    // for RVA23 profile is not available at the time of writing.
+    //
+    // See https://github.com/dotnet/runtime/issues/109276.
+
     __int128_t iResult = __sync_val_compare_and_swap((__int128_t volatile*)pDst, iComparand, ((__int128_t)iValueHigh << 64) + (uint64_t)iValueLow);
     PalInterlockedOperationBarrier();
     pComparandAndResult[0] = (int64_t)iResult; pComparandAndResult[1] = (int64_t)(iResult >> 64);
     return iComparand == iResult;
 }
-#endif // HOST_AMD64 || HOST_ARM64 || HOST_LOONGARCH64 || HOST_RISCV64
+#endif // HOST_64BIT
 
 #ifdef HOST_64BIT