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asm! support for the Xtensa architecture (#68)
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6 files changed

+525
-0
lines changed

6 files changed

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‎compiler/rustc_codegen_llvm/src/asm.rs

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -262,6 +262,7 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
262262
}
263263
InlineAsmArch::SpirV => {}
264264
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {}
265+
InlineAsmArch::Xtensa => {}
265266
InlineAsmArch::Bpf => {}
266267
InlineAsmArch::Msp430 => {
267268
constraints.push("~{sr}".to_string());
@@ -692,6 +693,9 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
692693
| X86InlineAsmRegClass::tmm_reg,
693694
) => unreachable!("clobber-only"),
694695
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => "r",
696+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => "r",
697+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => "f",
698+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => "b",
695699
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => "r",
696700
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => "w",
697701
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => "r",
@@ -754,6 +758,7 @@ fn modifier_to_llvm(
754758
InlineAsmRegClass::Mips(_) => None,
755759
InlineAsmRegClass::Nvptx(_) => None,
756760
InlineAsmRegClass::PowerPC(_) => None,
761+
InlineAsmRegClass::Xtensa(_) => None,
757762
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)
758763
| InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => None,
759764
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::vreg) => {
@@ -871,6 +876,9 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
871876
unreachable!("clobber-only")
872877
}
873878
InlineAsmRegClass::Wasm(WasmInlineAsmRegClass::local) => cx.type_i32(),
879+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::reg) => cx.type_i32(),
880+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::freg) => cx.type_f32(),
881+
InlineAsmRegClass::Xtensa(XtensaInlineAsmRegClass::breg) => cx.type_i1(),
874882
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::reg) => cx.type_i64(),
875883
InlineAsmRegClass::Bpf(BpfInlineAsmRegClass::wreg) => cx.type_i32(),
876884
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg) => cx.type_i8(),

‎compiler/rustc_span/src/symbol.rs

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -446,6 +446,7 @@ symbols! {
446446
async_for_loop,
447447
async_iterator,
448448
async_iterator_poll_next,
449+
atomctl,
449450
atomic,
450451
atomic_mod,
451452
atomics,
@@ -486,6 +487,7 @@ symbols! {
486487
braced_empty_structs,
487488
branch,
488489
breakpoint,
490+
breg,
489491
bridge,
490492
bswap,
491493
builtin_syntax,
@@ -615,6 +617,7 @@ symbols! {
615617
constant,
616618
constructor,
617619
convert_identity,
620+
coprocessor,
618621
copy,
619622
copy_closures,
620623
copy_nonoverlapping,
@@ -701,6 +704,7 @@ symbols! {
701704
derive_default_enum,
702705
destruct,
703706
destructuring_assignment,
707+
dfpaccel,
704708
diagnostic,
705709
diagnostic_namespace,
706710
direct,
@@ -762,6 +766,7 @@ symbols! {
762766
ermsb_target_feature,
763767
exact_div,
764768
except,
769+
exception,
765770
exchange_malloc,
766771
exclusive_range_pattern,
767772
exhaustive_integer_patterns,
@@ -783,6 +788,7 @@ symbols! {
783788
expr,
784789
extended_key_value_attributes,
785790
extended_varargs_abi_support,
791+
extendedl32r,
786792
extern_absolute_paths,
787793
extern_crate_item_prelude,
788794
extern_crate_self,
@@ -886,6 +892,7 @@ symbols! {
886892
format_macro,
887893
format_placeholder,
888894
format_unsafe_arg,
895+
fp,
889896
freeze,
890897
freeze_impls,
891898
freg,
@@ -934,6 +941,7 @@ symbols! {
934941
hash,
935942
hexagon_target_feature,
936943
hidden,
944+
highpriinterrupts,
937945
homogeneous_aggregate,
938946
host,
939947
html_favicon_url,
@@ -1012,6 +1020,8 @@ symbols! {
10121020
instruction_set,
10131021
integer_: "integer", // underscore to avoid clashing with the function `sym::integer` below
10141022
integral,
1023+
intel,
1024+
interrupt,
10151025
into_async_iter_into_iter,
10161026
into_future,
10171027
into_iter,
@@ -1099,6 +1109,7 @@ symbols! {
10991109
loongarch_target_feature,
11001110
loop_break_value,
11011111
lt,
1112+
mac16,
11021113
macro_at_most_once_rep,
11031114
macro_attributes_in_derive_output,
11041115
macro_escape,
@@ -1141,6 +1152,7 @@ symbols! {
11411152
mem_variant_count,
11421153
mem_zeroed,
11431154
member_constraints,
1155+
memctl,
11441156
memory,
11451157
memtag,
11461158
message,
@@ -1192,6 +1204,8 @@ symbols! {
11921204
mir_unwind_unreachable,
11931205
mir_variant,
11941206
miri,
1207+
misc,
1208+
miscsr,
11951209
mmx_reg,
11961210
modifiers,
11971211
module,
@@ -1401,6 +1415,8 @@ symbols! {
14011415
prelude_import,
14021416
preserves_flags,
14031417
prfchw_target_feature,
1418+
prid,
1419+
primitive,
14041420
print_macro,
14051421
println_macro,
14061422
proc_dash_macro: "proc-macro",
@@ -1644,8 +1660,10 @@ symbols! {
16441660
rustdoc_missing_doc_code_examples,
16451661
rustfmt,
16461662
rvalue_static_promotion,
1663+
rvector,
16471664
rwpi,
16481665
s,
1666+
s32c1i,
16491667
safety,
16501668
sanitize,
16511669
sanitizer_cfi_generalize_pointers,
@@ -1835,9 +1853,11 @@ symbols! {
18351853
thread,
18361854
thread_local,
18371855
thread_local_macro,
1856+
threadptr,
18381857
three_way_compare,
18391858
thumb2,
18401859
thumb_mode: "thumb-mode",
1860+
timerint,
18411861
tmm_reg,
18421862
to_owned_method,
18431863
to_string,
@@ -2011,6 +2031,8 @@ symbols! {
20112031
wasm_import_module,
20122032
wasm_target_feature,
20132033
while_let,
2034+
width,
2035+
windowed,
20142036
windows,
20152037
windows_subsystem,
20162038
with_negative_coherence,
@@ -2028,7 +2050,9 @@ symbols! {
20282050
writeln_macro,
20292051
x87_reg,
20302052
xer,
2053+
xloop,
20312054
xmm_reg,
2055+
xtensa_target_feature,
20322056
yeet_desugar_details,
20332057
yeet_expr,
20342058
yes,

‎compiler/rustc_target/src/asm/mod.rs

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -192,6 +192,7 @@ mod s390x;
192192
mod spirv;
193193
mod wasm;
194194
mod x86;
195+
mod xtensa;
195196

196197
pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
197198
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
@@ -209,6 +210,7 @@ pub use riscv::{RiscVInlineAsmReg, RiscVInlineAsmRegClass};
209210
pub use s390x::{S390xInlineAsmReg, S390xInlineAsmRegClass};
210211
pub use spirv::{SpirVInlineAsmReg, SpirVInlineAsmRegClass};
211212
pub use wasm::{WasmInlineAsmReg, WasmInlineAsmRegClass};
213+
pub use xtensa::{XtensaInlineAsmReg, XtensaInlineAsmRegClass};
212214
pub use x86::{X86InlineAsmReg, X86InlineAsmRegClass};
213215

214216
#[derive(Copy, Clone, Encodable, Decodable, Debug, Eq, PartialEq, Hash)]
@@ -231,6 +233,7 @@ pub enum InlineAsmArch {
231233
SpirV,
232234
Wasm32,
233235
Wasm64,
236+
Xtensa,
234237
Bpf,
235238
Avr,
236239
Msp430,
@@ -261,6 +264,7 @@ impl FromStr for InlineAsmArch {
261264
"spirv" => Ok(Self::SpirV),
262265
"wasm32" => Ok(Self::Wasm32),
263266
"wasm64" => Ok(Self::Wasm64),
267+
"xtensa" => Ok(Self::Xtensa),
264268
"bpf" => Ok(Self::Bpf),
265269
"avr" => Ok(Self::Avr),
266270
"msp430" => Ok(Self::Msp430),
@@ -286,6 +290,7 @@ pub enum InlineAsmReg {
286290
S390x(S390xInlineAsmReg),
287291
SpirV(SpirVInlineAsmReg),
288292
Wasm(WasmInlineAsmReg),
293+
Xtensa(XtensaInlineAsmReg),
289294
Bpf(BpfInlineAsmReg),
290295
Avr(AvrInlineAsmReg),
291296
Msp430(Msp430InlineAsmReg),
@@ -307,6 +312,7 @@ impl InlineAsmReg {
307312
Self::LoongArch(r) => r.name(),
308313
Self::Mips(r) => r.name(),
309314
Self::S390x(r) => r.name(),
315+
Self::Xtensa(r) => r.name(),
310316
Self::Bpf(r) => r.name(),
311317
Self::Avr(r) => r.name(),
312318
Self::Msp430(r) => r.name(),
@@ -327,6 +333,7 @@ impl InlineAsmReg {
327333
Self::LoongArch(r) => InlineAsmRegClass::LoongArch(r.reg_class()),
328334
Self::Mips(r) => InlineAsmRegClass::Mips(r.reg_class()),
329335
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
336+
Self::Xtensa(r) => InlineAsmRegClass::Xtensa(r.reg_class()),
330337
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
331338
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
332339
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
@@ -358,6 +365,9 @@ impl InlineAsmReg {
358365
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
359366
Self::Mips(MipsInlineAsmReg::parse(name)?)
360367
}
368+
InlineAsmArch::Xtensa => {
369+
Self::Xtensa(XtensaInlineAsmReg::parse(name)?)
370+
}
361371
InlineAsmArch::S390x => Self::S390x(S390xInlineAsmReg::parse(name)?),
362372
InlineAsmArch::SpirV => Self::SpirV(SpirVInlineAsmReg::parse(name)?),
363373
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {
@@ -393,6 +403,7 @@ impl InlineAsmReg {
393403
Self::S390x(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
394404
Self::Bpf(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
395405
Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
406+
Self::Xtensa(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
396407
Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
397408
Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
398409
Self::CSKY(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
@@ -418,6 +429,7 @@ impl InlineAsmReg {
418429
Self::LoongArch(r) => r.emit(out, arch, modifier),
419430
Self::Mips(r) => r.emit(out, arch, modifier),
420431
Self::S390x(r) => r.emit(out, arch, modifier),
432+
Self::Xtensa(r) => r.emit(out, arch, modifier),
421433
Self::Bpf(r) => r.emit(out, arch, modifier),
422434
Self::Avr(r) => r.emit(out, arch, modifier),
423435
Self::Msp430(r) => r.emit(out, arch, modifier),
@@ -438,6 +450,7 @@ impl InlineAsmReg {
438450
Self::LoongArch(_) => cb(self),
439451
Self::Mips(_) => cb(self),
440452
Self::S390x(_) => cb(self),
453+
Self::Xtensa(_) => cb(self),
441454
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
442455
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
443456
Self::Msp430(_) => cb(self),
@@ -463,6 +476,7 @@ pub enum InlineAsmRegClass {
463476
S390x(S390xInlineAsmRegClass),
464477
SpirV(SpirVInlineAsmRegClass),
465478
Wasm(WasmInlineAsmRegClass),
479+
Xtensa(XtensaInlineAsmRegClass),
466480
Bpf(BpfInlineAsmRegClass),
467481
Avr(AvrInlineAsmRegClass),
468482
Msp430(Msp430InlineAsmRegClass),
@@ -487,6 +501,7 @@ impl InlineAsmRegClass {
487501
Self::S390x(r) => r.name(),
488502
Self::SpirV(r) => r.name(),
489503
Self::Wasm(r) => r.name(),
504+
Self::Xtensa(r) => r.name(),
490505
Self::Bpf(r) => r.name(),
491506
Self::Avr(r) => r.name(),
492507
Self::Msp430(r) => r.name(),
@@ -513,6 +528,7 @@ impl InlineAsmRegClass {
513528
Self::S390x(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::S390x),
514529
Self::SpirV(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::SpirV),
515530
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
531+
Self::Xtensa(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Xtensa),
516532
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
517533
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
518534
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
@@ -542,6 +558,7 @@ impl InlineAsmRegClass {
542558
Self::S390x(r) => r.suggest_modifier(arch, ty),
543559
Self::SpirV(r) => r.suggest_modifier(arch, ty),
544560
Self::Wasm(r) => r.suggest_modifier(arch, ty),
561+
Self::Xtensa(r) => r.suggest_modifier(arch, ty),
545562
Self::Bpf(r) => r.suggest_modifier(arch, ty),
546563
Self::Avr(r) => r.suggest_modifier(arch, ty),
547564
Self::Msp430(r) => r.suggest_modifier(arch, ty),
@@ -571,6 +588,7 @@ impl InlineAsmRegClass {
571588
Self::S390x(r) => r.default_modifier(arch),
572589
Self::SpirV(r) => r.default_modifier(arch),
573590
Self::Wasm(r) => r.default_modifier(arch),
591+
Self::Xtensa(r) => r.default_modifier(arch),
574592
Self::Bpf(r) => r.default_modifier(arch),
575593
Self::Avr(r) => r.default_modifier(arch),
576594
Self::Msp430(r) => r.default_modifier(arch),
@@ -599,6 +617,7 @@ impl InlineAsmRegClass {
599617
Self::S390x(r) => r.supported_types(arch),
600618
Self::SpirV(r) => r.supported_types(arch),
601619
Self::Wasm(r) => r.supported_types(arch),
620+
Self::Xtensa(r) => r.supported_types(arch),
602621
Self::Bpf(r) => r.supported_types(arch),
603622
Self::Avr(r) => r.supported_types(arch),
604623
Self::Msp430(r) => r.supported_types(arch),
@@ -636,6 +655,7 @@ impl InlineAsmRegClass {
636655
}
637656
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(name)?),
638657
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?),
658+
InlineAsmArch::Xtensa => Self::Xtensa(XtensaInlineAsmRegClass::parse(name)?),
639659
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?),
640660
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?),
641661
InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmRegClass::parse(name)?),
@@ -658,6 +678,7 @@ impl InlineAsmRegClass {
658678
Self::S390x(r) => r.valid_modifiers(arch),
659679
Self::SpirV(r) => r.valid_modifiers(arch),
660680
Self::Wasm(r) => r.valid_modifiers(arch),
681+
Self::Xtensa(r) => r.valid_modifiers(arch),
661682
Self::Bpf(r) => r.valid_modifiers(arch),
662683
Self::Avr(r) => r.valid_modifiers(arch),
663684
Self::Msp430(r) => r.valid_modifiers(arch),
@@ -702,6 +723,7 @@ impl fmt::Display for InlineAsmRegOrRegClass {
702723
/// Set of types which can be used with a particular register class.
703724
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
704725
pub enum InlineAsmType {
726+
I1,
705727
I8,
706728
I16,
707729
I32,
@@ -725,6 +747,7 @@ impl InlineAsmType {
725747

726748
pub fn size(self) -> Size {
727749
Size::from_bytes(match self {
750+
Self::I1 => return Size::from_bits(1),
728751
Self::I8 => 1,
729752
Self::I16 => 2,
730753
Self::I32 => 4,
@@ -746,6 +769,7 @@ impl InlineAsmType {
746769
impl fmt::Display for InlineAsmType {
747770
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
748771
match *self {
772+
Self::I1 => f.write_str("i1"),
749773
Self::I8 => f.write_str("i8"),
750774
Self::I16 => f.write_str("i16"),
751775
Self::I32 => f.write_str("i32"),
@@ -839,6 +863,11 @@ pub fn allocatable_registers(
839863
wasm::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
840864
map
841865
}
866+
InlineAsmArch::Xtensa => {
867+
let mut map = xtensa::regclass_map();
868+
xtensa::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
869+
map
870+
}
842871
InlineAsmArch::Bpf => {
843872
let mut map = bpf::regclass_map();
844873
bpf::fill_reg_map(arch, reloc_model, target_features, target, &mut map);

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