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I have read the documentation at readthedocs and the issue is not addressed there.
I have tested that the issue is present in current master branch (aka latest git).
I have searched the issue tracker for a similar issue.
If there is a stack dump, I have decoded it.
I have filled out all fields below.
Platform
Platform == all [n/a]
Settings in IDE
IDE == all [n/a]
Problem Description
I've got a reasonably popular audio codec library for the ESP8266 that drives I2S DACs for decoded output. Many people have found that at high levels their DACs generate noise/garbage, but when they drop the volume or add a delay (R/C on the I2SDOUT pin) to the data it works properly. I thought it was wiring/cap issues, but it's a SW bug in core.
After looking through the ESP32 manual's I2S section the cause is the I2S on the ESP8266 is being configured improperly.
The I2S module, by default, is configured to send PCM format waveforms where the MSB and the Left/Right select are output on the same clock. I2S, however, requires a 1-bit delay from LRCLK to MSB.
There's a config bit, undocumented on the ESP8266 but listed in ESP32, which should add this delay, I2STMS. We're setting it on receive, for some reason, even though the code in core can't actually receive...
Basic Infos
Platform
Platform == all [n/a]
Settings in IDE
IDE == all [n/a]
Problem Description
I've got a reasonably popular audio codec library for the ESP8266 that drives I2S DACs for decoded output. Many people have found that at high levels their DACs generate noise/garbage, but when they drop the volume or add a delay (R/C on the I2SDOUT pin) to the data it works properly. I thought it was wiring/cap issues, but it's a SW bug in core.
After looking through the ESP32 manual's I2S section the cause is the I2S on the ESP8266 is being configured improperly.
The I2S module, by default, is configured to send PCM format waveforms where the MSB and the Left/Right select are output on the same clock. I2S, however, requires a 1-bit delay from LRCLK to MSB.
There's a config bit, undocumented on the ESP8266 but listed in ESP32, which should add this delay, I2STMS. We're setting it on receive, for some reason, even though the code in core can't actually receive...
Will send in a PR.
MCVE Sketch
N/A, but you can try https://github.com/earlephilhower/ESP8266Audio/blob/master/examples/PlayRTTTLToI2SDAC/PlayRTTTLToI2SDAC.ino if you're so inclined.
Debug Messages
N/A
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