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feat(esp32p4): Initial changes required for ESP32-P4
* esp32-p4: Initial changes to build with Arduino Signed-off-by: Lucas Saavedra Vaz <[email protected]>
1 parent 6768208 commit fcd64f7

22 files changed

+208
-104
lines changed

‎README.md

+1
Original file line numberDiff line numberDiff line change
@@ -59,6 +59,7 @@ Here are the ESP32 series supported by the Arduino-ESP32 project:
5959
| ESP32-S3 | Yes | Yes | [ESP32-S3](https://www.espressif.com/sites/default/files/documentation/esp32-s3_datasheet_en.pdf) |
6060
| ESP32-C6 | Yes | Yes | [ESP32-C6](https://www.espressif.com/sites/default/files/documentation/esp32-c6_datasheet_en.pdf) |
6161
| ESP32-H2 | Yes | Yes | [ESP32-H2](https://www.espressif.com/sites/default/files/documentation/esp32-h2_datasheet_en.pdf) |
62+
| ESP32-P4 | No | Yes | ESP32-P4 |
6263

6364
> [!NOTE]
6465
> ESP32-C2 is also supported by Arduino-ESP32 but requires rebuilding the static libraries. This is not trivial and requires a good understanding of the ESP-IDF

‎cores/esp32/Esp.cpp

+6
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,9 @@ extern "C" {
6060
#elif CONFIG_IDF_TARGET_ESP32H2
6161
#include "esp32h2/rom/spi_flash.h"
6262
#define ESP_FLASH_IMAGE_BASE 0x0000 // Esp32h2 is located at 0x0000
63+
#elif CONFIG_IDF_TARGET_ESP32P4
64+
#include "esp32p4/rom/spi_flash.h"
65+
#define ESP_FLASH_IMAGE_BASE 0x2000 // Esp32p4 is located at 0x2000
6366
#else
6467
#error Target CONFIG_IDF_TARGET is not supported
6568
#endif
@@ -335,6 +338,8 @@ uint32_t EspClass::getFlashChipSpeed(void) {
335338
return magicFlashChipSpeed(fhdr.spi_speed);
336339
}
337340

341+
// FIXME for P4
342+
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
338343
FlashMode_t EspClass::getFlashChipMode(void) {
339344
#if CONFIG_IDF_TARGET_ESP32S2
340345
uint32_t spi_ctrl = REG_READ(PERIPHS_SPI_FLASH_CTRL);
@@ -361,6 +366,7 @@ FlashMode_t EspClass::getFlashChipMode(void) {
361366
}
362367
return (FM_DOUT);
363368
}
369+
#endif // if !defined(CONFIG_IDF_TARGET_ESP32P4)
364370

365371
uint32_t EspClass::magicFlashChipSize(uint8_t byte) {
366372
/*

‎cores/esp32/HardwareSerial.h

+12
Original file line numberDiff line numberDiff line change
@@ -125,6 +125,8 @@ typedef enum {
125125
#define SOC_RX0 (gpio_num_t)17
126126
#elif CONFIG_IDF_TARGET_ESP32H2
127127
#define SOC_RX0 (gpio_num_t)23
128+
#elif CONFIG_IDF_TARGET_ESP32P4
129+
#define SOC_RX0 (gpio_num_t)38
128130
#endif
129131
#endif
130132

@@ -141,6 +143,8 @@ typedef enum {
141143
#define SOC_TX0 (gpio_num_t)16
142144
#elif CONFIG_IDF_TARGET_ESP32H2
143145
#define SOC_TX0 (gpio_num_t)24
146+
#elif CONFIG_IDF_TARGET_ESP32P4
147+
#define SOC_TX0 (gpio_num_t)37
144148
#endif
145149
#endif
146150

@@ -162,6 +166,8 @@ typedef enum {
162166
#define RX1 (gpio_num_t)4
163167
#elif CONFIG_IDF_TARGET_ESP32H2
164168
#define RX1 (gpio_num_t)0
169+
#elif CONFIG_IDF_TARGET_ESP32P4
170+
#define RX1 (gpio_num_t)11
165171
#endif
166172
#endif
167173

@@ -180,6 +186,8 @@ typedef enum {
180186
#define TX1 (gpio_num_t)5
181187
#elif CONFIG_IDF_TARGET_ESP32H2
182188
#define TX1 (gpio_num_t)1
189+
#elif CONFIG_IDF_TARGET_ESP32P4
190+
#define TX1 (gpio_num_t)10
183191
#endif
184192
#endif
185193
#endif /* SOC_UART_HP_NUM > 1 */
@@ -192,6 +200,8 @@ typedef enum {
192200
#define RX2 (gpio_num_t)4
193201
#elif CONFIG_IDF_TARGET_ESP32S3
194202
#define RX2 (gpio_num_t)19
203+
#elif CONFIG_IDF_TARGET_ESP32P4
204+
#define RX2 (gpio_num_t)15
195205
#endif
196206
#endif
197207

@@ -200,6 +210,8 @@ typedef enum {
200210
#define TX2 (gpio_num_t)25
201211
#elif CONFIG_IDF_TARGET_ESP32S3
202212
#define TX2 (gpio_num_t)20
213+
#elif CONFIG_IDF_TARGET_ESP32P4
214+
#define TX2 (gpio_num_t)14
203215
#endif
204216
#endif
205217
#endif /* SOC_UART_HP_NUM > 2 */

‎cores/esp32/esp32-hal-adc.c

+5-5
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ static bool adcDetachBus(void *pin) {
7575
if (err != ESP_OK) {
7676
return false;
7777
}
78-
#elif !defined(CONFIG_IDF_TARGET_ESP32H2)
78+
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
7979
err = adc_cali_delete_scheme_line_fitting(adc_handle[adc_unit].adc_cali_handle);
8080
if (err != ESP_OK) {
8181
return false;
@@ -127,7 +127,7 @@ esp_err_t __analogChannelConfig(adc_bitwidth_t width, adc_attenuation_t atten, i
127127
log_e("adc_cali_create_scheme_curve_fitting failed with error: %d", err);
128128
return err;
129129
}
130-
#elif !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
130+
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
131131
log_d("Deleting ADC_UNIT_%d line cali handle", adc_unit);
132132
err = adc_cali_delete_scheme_line_fitting(adc_handle[adc_unit].adc_cali_handle);
133133
if (err != ESP_OK) {
@@ -310,7 +310,7 @@ uint32_t __analogReadMilliVolts(uint8_t pin) {
310310
.bitwidth = __analogWidth,
311311
};
312312
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_handle[adc_unit].adc_cali_handle);
313-
#elif !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
313+
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
314314
adc_cali_line_fitting_config_t cali_config = {
315315
.unit_id = adc_unit,
316316
.bitwidth = __analogWidth,
@@ -379,7 +379,7 @@ static bool adcContinuousDetachBus(void *adc_unit_number) {
379379
if (err != ESP_OK) {
380380
return false;
381381
}
382-
#elif !defined(CONFIG_IDF_TARGET_ESP32H2)
382+
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
383383
err = adc_cali_delete_scheme_line_fitting(adc_handle[adc_unit].adc_cali_handle);
384384
if (err != ESP_OK) {
385385
return false;
@@ -552,7 +552,7 @@ bool analogContinuous(const uint8_t pins[], size_t pins_count, uint32_t conversi
552552
.bitwidth = __adcContinuousWidth,
553553
};
554554
err = adc_cali_create_scheme_curve_fitting(&cali_config, &adc_handle[adc_unit].adc_cali_handle);
555-
#elif !defined(CONFIG_IDF_TARGET_ESP32H2) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
555+
#elif (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)) //ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
556556
adc_cali_line_fitting_config_t cali_config = {
557557
.unit_id = adc_unit,
558558
.bitwidth = __adcContinuousWidth,

‎cores/esp32/esp32-hal-cpu.c

+8-6
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919
#include "esp_attr.h"
2020
#include "esp_log.h"
2121
#include "soc/rtc.h"
22-
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
22+
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
2323
#include "soc/rtc_cntl_reg.h"
2424
#include "soc/syscon_reg.h"
2525
#endif
@@ -46,6 +46,8 @@
4646
#include "esp32c6/rom/rtc.h"
4747
#elif CONFIG_IDF_TARGET_ESP32H2
4848
#include "esp32h2/rom/rtc.h"
49+
#elif CONFIG_IDF_TARGET_ESP32P4
50+
#include "esp32p4/rom/rtc.h"
4951
#else
5052
#error Target CONFIG_IDF_TARGET is not supported
5153
#endif
@@ -161,7 +163,7 @@ bool removeApbChangeCallback(void *arg, apb_change_cb_t cb) {
161163
}
162164

163165
static uint32_t calculateApb(rtc_cpu_freq_config_t *conf) {
164-
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
166+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
165167
return APB_CLK_FREQ;
166168
#else
167169
if (conf->freq_mhz >= 80) {
@@ -177,7 +179,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
177179
rtc_cpu_freq_config_t conf, cconf;
178180
uint32_t capb, apb;
179181
//Get XTAL Frequency and calculate min CPU MHz
180-
#ifndef CONFIG_IDF_TARGET_ESP32H2
182+
#if (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
181183
rtc_xtal_freq_t xtal = rtc_clk_xtal_freq_get();
182184
#endif
183185
#if CONFIG_IDF_TARGET_ESP32
@@ -193,7 +195,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
193195
}
194196
}
195197
#endif
196-
#ifndef CONFIG_IDF_TARGET_ESP32H2
198+
#if (!defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4))
197199
if (cpu_freq_mhz > xtal && cpu_freq_mhz != 240 && cpu_freq_mhz != 160 && cpu_freq_mhz != 120 && cpu_freq_mhz != 80) {
198200
if (xtal >= RTC_XTAL_FREQ_40M) {
199201
log_e("Bad frequency: %u MHz! Options are: 240, 160, 120, 80, %u, %u and %u MHz", cpu_freq_mhz, xtal, xtal / 2, xtal / 4);
@@ -235,7 +237,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
235237
}
236238
//Make the frequency change
237239
rtc_clk_cpu_freq_set_config_fast(&conf);
238-
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
240+
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
239241
if (capb != apb) {
240242
//Update REF_TICK (uncomment if REF_TICK is different than 1MHz)
241243
//if(conf.freq_mhz < 80){
@@ -248,7 +250,7 @@ bool setCpuFrequencyMhz(uint32_t cpu_freq_mhz) {
248250
}
249251
#endif
250252
//Update FreeRTOS Tick Divisor
251-
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
253+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
252254

253255
#elif CONFIG_IDF_TARGET_ESP32S3
254256

‎cores/esp32/esp32-hal-i2c-slave.c

+22-3
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@
4141
#include "esp_intr_alloc.h"
4242
#include "soc/i2c_reg.h"
4343
#include "soc/i2c_struct.h"
44+
#include "soc/periph_defs.h"
4445
#include "hal/i2c_ll.h"
4546
#include "hal/clk_gate_ll.h"
4647
#include "esp32-hal-log.h"
@@ -49,13 +50,20 @@
4950

5051
#define I2C_SLAVE_USE_RX_QUEUE 0 // 1: Queue, 0: RingBuffer
5152

53+
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
5254
#if SOC_HP_I2C_NUM > 1
5355
#define I2C_SCL_IDX(p) ((p == 0) ? I2CEXT0_SCL_OUT_IDX : ((p == 1) ? I2CEXT1_SCL_OUT_IDX : 0))
5456
#define I2C_SDA_IDX(p) ((p == 0) ? I2CEXT0_SDA_OUT_IDX : ((p == 1) ? I2CEXT1_SDA_OUT_IDX : 0))
5557
#else
5658
#define I2C_SCL_IDX(p) I2CEXT0_SCL_OUT_IDX
5759
#define I2C_SDA_IDX(p) I2CEXT0_SDA_OUT_IDX
5860
#endif
61+
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)
62+
63+
#ifdef CONFIG_IDF_TARGET_ESP32P4
64+
#define I2C_SCL_IDX(p) ((p == 0) ? I2C0_SCL_PAD_OUT_IDX : ((p == 1) ? I2C1_SCL_PAD_OUT_IDX : 0))
65+
#define I2C_SDA_IDX(p) ((p == 0) ? I2C0_SDA_PAD_OUT_IDX : ((p == 1) ? I2C1_SDA_PAD_OUT_IDX : 0))
66+
#endif // ifdef CONFIG_IDF_TARGET_ESP32P4
5967

6068
#if CONFIG_IDF_TARGET_ESP32
6169
#define I2C_TXFIFO_WM_INT_ENA I2C_TXFIFO_EMPTY_INT_ENA
@@ -173,7 +181,7 @@ static inline void i2c_ll_stretch_clr(i2c_dev_t *hw) {
173181
}
174182

175183
static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw) {
176-
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
184+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
177185
return hw->sr.slave_addressed;
178186
#else
179187
return hw->status_reg.slave_addressed;
@@ -182,7 +190,7 @@ static inline bool i2c_ll_slave_addressed(i2c_dev_t *hw) {
182190

183191
static inline bool i2c_ll_slave_rw(i2c_dev_t *hw) //not exposed by hal_ll
184192
{
185-
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2
193+
#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4
186194
return hw->sr.slave_rw;
187195
#else
188196
return hw->status_reg.slave_rw;
@@ -306,14 +314,15 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
306314
frequency = 100000L;
307315
}
308316
frequency = (frequency * 5) / 4;
309-
317+
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
310318
if (i2c->num == 0) {
311319
periph_ll_enable_clk_clear_rst(PERIPH_I2C0_MODULE);
312320
#if SOC_HP_I2C_NUM > 1
313321
} else {
314322
periph_ll_enable_clk_clear_rst(PERIPH_I2C1_MODULE);
315323
#endif
316324
}
325+
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)
317326

318327
i2c_ll_slave_init(i2c->dev);
319328
i2c_ll_slave_set_fifo_mode(i2c->dev, true);
@@ -341,12 +350,22 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
341350

342351
if (!i2c->intr_handle) {
343352
uint32_t flags = ESP_INTR_FLAG_LOWMED | ESP_INTR_FLAG_SHARED;
353+
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
344354
if (i2c->num == 0) {
345355
ret = esp_intr_alloc(ETS_I2C_EXT0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
346356
#if SOC_HP_I2C_NUM > 1
347357
} else {
348358
ret = esp_intr_alloc(ETS_I2C_EXT1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
349359
#endif
360+
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)
361+
#ifdef CONFIG_IDF_TARGET_ESP32P4
362+
if (i2c->num == 0) {
363+
ret = esp_intr_alloc(ETS_I2C0_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
364+
#if SOC_I2C_NUM > 1
365+
} else {
366+
ret = esp_intr_alloc(ETS_I2C1_INTR_SOURCE, flags, &i2c_slave_isr_handler, i2c, &i2c->intr_handle);
367+
#endif
368+
#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4
350369
}
351370

352371
if (ret != ESP_OK) {

‎cores/esp32/esp32-hal-ledc.c

+10
Original file line numberDiff line numberDiff line change
@@ -323,11 +323,21 @@ bool ledcOutputInvert(uint8_t pin, bool out_invert) {
323323
ledc_channel_handle_t *bus = (ledc_channel_handle_t *)perimanGetPinBus(pin, ESP32_BUS_TYPE_LEDC);
324324
if (bus != NULL) {
325325
gpio_set_level(pin, out_invert);
326+
#if !defined(CONFIG_IDF_TARGET_ESP32P4)
326327
#ifdef SOC_LEDC_SUPPORT_HS_MODE
327328
esp_rom_gpio_connect_out_signal(pin, ((bus->channel / 8 == 0) ? LEDC_HS_SIG_OUT0_IDX : LEDC_LS_SIG_OUT0_IDX) + ((bus->channel) % 8), out_invert, 0);
328329
#else
329330
esp_rom_gpio_connect_out_signal(pin, LEDC_LS_SIG_OUT0_IDX + ((bus->channel) % 8), out_invert, 0);
330331
#endif
332+
#endif // !defined(CONFIG_IDF_TARGET_ESP32P4)
333+
334+
#ifdef CONFIG_IDF_TARGET_ESP32P4
335+
#ifdef SOC_LEDC_SUPPORT_HS_MODE
336+
esp_rom_gpio_connect_out_signal(pin, ((bus->channel / 8 == 0) ? LEDC_HS_SIG_OUT0_IDX : LEDC_LS_SIG_OUT_PAD_OUT0_IDX) + ((bus->channel) % 8), out_invert, 0);
337+
#else
338+
esp_rom_gpio_connect_out_signal(pin, LEDC_LS_SIG_OUT_PAD_OUT0_IDX + ((bus->channel) % 8), out_invert, 0);
339+
#endif
340+
#endif // #ifdef CONFIG_IDF_TARGET_ESP32P4
331341
return true;
332342
}
333343
return false;

‎cores/esp32/esp32-hal-matrix.c

+2
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,8 @@
3232
#include "esp32c6/rom/gpio.h"
3333
#elif CONFIG_IDF_TARGET_ESP32H2
3434
#include "esp32h2/rom/gpio.h"
35+
#elif CONFIG_IDF_TARGET_ESP32P4
36+
#include "esp32p4/rom/gpio.h"
3537
#else
3638
#error Target CONFIG_IDF_TARGET is not supported
3739
#endif

‎cores/esp32/esp32-hal-misc.c

+3-1
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@
2929
#endif //CONFIG_BT_ENABLED
3030
#include <sys/time.h>
3131
#include "soc/rtc.h"
32-
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
32+
#if !defined(CONFIG_IDF_TARGET_ESP32C2) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
3333
#include "soc/rtc_cntl_reg.h"
3434
#include "soc/syscon_reg.h"
3535
#endif
@@ -53,6 +53,8 @@
5353
#include "esp32c6/rom/rtc.h"
5454
#elif CONFIG_IDF_TARGET_ESP32H2
5555
#include "esp32h2/rom/rtc.h"
56+
#elif CONFIG_IDF_TARGET_ESP32P4
57+
#include "esp32p4/rom/rtc.h"
5658

5759
#else
5860
#error Target CONFIG_IDF_TARGET is not supported

‎cores/esp32/esp32-hal-psram.c

+2
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,8 @@
2727
#include "esp32s2/rom/cache.h"
2828
#elif CONFIG_IDF_TARGET_ESP32S3
2929
#include "esp32s3/rom/cache.h"
30+
#elif CONFIG_IDF_TARGET_ESP32P4
31+
#include "esp32p4/rom/cache.h"
3032
#else
3133
#error Target CONFIG_IDF_TARGET is not supported
3234
#endif

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