From 0fbb76accf446e1b54c77c723ca41d6b4308a432 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Sun, 1 Sep 2019 19:59:42 +0200 Subject: [PATCH 1/2] Inline ESP::getCycleCount() to make it safe to call from ISRs --- cores/esp32/Esp.cpp | 7 ------- cores/esp32/Esp.h | 9 ++++++++- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/cores/esp32/Esp.cpp b/cores/esp32/Esp.cpp index 8df9514ee66..54451127ef3 100644 --- a/cores/esp32/Esp.cpp +++ b/cores/esp32/Esp.cpp @@ -92,13 +92,6 @@ void EspClass::deepSleep(uint32_t time_us) esp_deep_sleep(time_us); } -uint32_t EspClass::getCycleCount() -{ - uint32_t ccount; - __asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount)); - return ccount; -} - void EspClass::restart(void) { esp_restart(); diff --git a/cores/esp32/Esp.h b/cores/esp32/Esp.h index 9acb6665c3d..60470aacf2c 100644 --- a/cores/esp32/Esp.h +++ b/cores/esp32/Esp.h @@ -76,7 +76,7 @@ class EspClass uint8_t getChipRevision(); uint32_t getCpuFreqMHz(){ return getCpuFrequencyMhz(); } - uint32_t getCycleCount(); + inline uint32_t getCycleCount() __attribute__((always_inline)); const char * getSdkVersion(); void deepSleep(uint32_t time_us); @@ -101,6 +101,13 @@ class EspClass }; +uint32_t EspClass::getCycleCount() +{ + uint32_t ccount; + __asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount)); + return ccount; +} + extern EspClass ESP; #endif //ESP_H From 9f3e75d35285a607f51c510f4b7a6165c7525e31 Mon Sep 17 00:00:00 2001 From: "Dirk O. Kaar" Date: Tue, 10 Sep 2019 23:42:32 +0200 Subject: [PATCH 2/2] Attribute IRAM_ATTR ISR-safe function in addition to inlining. --- cores/esp32/Esp.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cores/esp32/Esp.h b/cores/esp32/Esp.h index 60470aacf2c..2580eecf65b 100644 --- a/cores/esp32/Esp.h +++ b/cores/esp32/Esp.h @@ -101,7 +101,7 @@ class EspClass }; -uint32_t EspClass::getCycleCount() +uint32_t IRAM_ATTR EspClass::getCycleCount() { uint32_t ccount; __asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount));