Merge branch 'feature/add_esp32c6_spi_ym2_18feb' into 'master'

Add ESP32-C6 SPI support for Linux and MCU

See merge request app-frameworks/esp_hosted!281

Author: mantriyogesh

README.md

@@ -118,7 +118,7 @@ Following table summarizes this entire discussion.
   </tr>
   <tr>
     <td>Chipsets supported</td>
-    <td>ESP32, <span>ESP32-C2/C3/S2/S3</span></td>
+    <td>ESP32, <span>ESP32-C2/C3/C6/S2/S3</span></td>
     <td>ESP32, <span>ESP32-C3</span></td>
   </tr>
 </table>

esp_hosted_fg/README.md

@@ -42,16 +42,17 @@ ESP-Hosted-FG solution provides following WLAN and BT/BLE features to the host:
 	- WLAN Soft AP
 - BT/BLE Features:
 	- ESP32 supports BR/EDR and BLE with v4.2
-	- ESP32-C3/ESP32-S3 supports BLE v4.2 and v5.0
+	- ESP32-C2/C3/C6/ESP32-S3 supports BLE v4.2 and v5.0
 
 ### 1.2 Supported ESP boards
 
 ESP-Hosted-FG solution is supported on following ESP boards:
 - ESP32
 - ESP32-S2
-- ESP32-C3
 - ESP32-S3
 - ESP32-C2
+- ESP32-C3
+- ESP32-C6
 
 ### 1.3 Supported Hosts
 
@@ -85,6 +86,9 @@ The below table explains which feature is supported on which transport interface
 | ESP32-C3 | SDIO | NA | NA | NA |
 | ESP32-C3 | SPI | Yes | Yes | BLE 5.0 |
 | ESP32-C3 | UART | No | No | BLE 5.0 |
+| ESP32-C6 | SDIO | ComingSoon | ComingSoon | ComingSoon |
+| ESP32-C6 | SPI | Yes | Yes | WIP |
+| ESP32-C6 | UART | No | No | WIP |
 | ESP32-S3 | SDIO | NA | NA | NA |
 | ESP32-S3 | SPI | Yes | Yes | BLE 5.0 |
 | ESP32-S3 | UART | No | No | BLE 5.0 |
@@ -113,6 +117,9 @@ The below table explains which feature is supported on which transport interface
 | ESP32-C3 | SDIO | NA | NA | NA |
 | ESP32-C3 | SPI | Yes | Yes | BLE 5.0\* |
 | ESP32-C3 | UART | No | No | BLE 5.0\*\* |
+| ESP32-C6 | SDIO | ComingSoon | ComingSoon | ComingSoon |
+| ESP32-C6 | SPI | Yes | Yes | WIP |
+| ESP32-C6 | UART | No | No | WIP |
 | ESP32-S3 | SDIO | NA | NA | NA |
 | ESP32-S3 | SPI | Yes | Yes | BLE 5.0\* |
 | ESP32-S3 | UART | No | No | BLE 5.0\*\* |
@@ -138,6 +145,12 @@ Note: BT stands for Bluetooth BR/EDR and BLE stands for Bluetooth Low Energy spe
 > With the help of this UART interface, BT/BLE stack can directly interact with BT controller present on ESP bypassing host driver and firmware
 > ESP Hosted host driver and a firmware plays no role in this communication
 
+WIP
+> Work In progress
+
+ComingSoon
+> Will be scheduled after WIP
+
 * Linux hosts support OTA update (Over The Air ESP firmware update) in C and python. MCU hosts can refer to the same for their development. For detailed documentation, please read
 [ota_update.md](docs/Linux_based_host/ota_update.md).
 

esp_hosted_fg/docs/Linux_based_host/SPI_setup.md

@@ -54,7 +54,7 @@ Setup image is here.
 ![alt text](rpi_esp32_c2_setup.jpeg "setup of Raspberry-Pi as host and ESP32-C2 as ESP peripheral")
 
 
-#### 1.1.3 ESP32-C3 setup
+#### 1.1.4 ESP32-C3 setup
 | Raspberry-Pi Pin | ESP32-C3 Pin | Function |
 |:----------------:|:------------:|:--------:|
 | 24 | IO10 | CS0 |
@@ -70,7 +70,24 @@ Setup image is here.
 
 ![alt text](rpi_esp32_c3_setup.jpg "setup of Raspberry-Pi as host and ESP32-C3 as ESP peripheral")
 
-#### 1.1.4 ESP32-S3 setup
+#### 1.1.5 ESP32-C6 setup
+| Raspberry-Pi Pin | ESP32-C6 Pin | Function |
+|:----------------:|:------------:|:--------:|
+| 24 | IO10 | CS0 |
+| 23 | IO06 | SCLK |
+| 21 | IO02 | MISO |
+| 19 | IO07 | MOSI |
+| 25 | GND | Ground |
+| 15 | IO03 | Handshake |
+| 13 | IO04 | Data ready |
+| 31 | RST | ESP Reset |
+
+Setup image is here.
+
+![alt text](rpi_esp32_c6_setup.jpg "setup of Raspberry-Pi as host and ESP32-C6 as ESP peripheral")
+
+
+#### 1.1.6 ESP32-S3 setup
 - For ESP32-S3, microUSB power is expected to insert in [UART port](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html#description-of-components)
 
 | Raspberry-Pi Pin | ESP32-S3 Pin | Function |

esp_hosted_fg/docs/Linux_based_host/rpi_esp32_c6_setup.jpg

@@ -28,7 +28,7 @@ Wi-Fi can be configured as either as `STATION` mode or `SOFTAP` mode or `STATION
 * **STATION+SOFTAP Mode**
     - This is combination of both the modes. In this mode, host behaves as station and connects to external AP. At the same time, host with help of ESP device, can create the Wi-Fi network.
 
-Host firmware provides Wi-Fi connectivity using control path and data path. Control path commands uses `protocomm` layer of ESP-IDF to serialize structured control data and communicates using SPI transport interface between Host(MCU based Host) and ESP peripheral (ESP32/ESP32-C2/ESP32-C3/ESP32-S2/ESP32-S3). User can use control commands to build application.
+Host firmware provides Wi-Fi connectivity using control path and data path. Control path commands uses `protocomm` layer of ESP-IDF to serialize structured control data and communicates using SPI transport interface between Host(MCU based Host) and ESP peripheral (ESP32/ESP32-C2/ESP32-C3/ESP32-C6/ESP32-S2/ESP32-S3). User can use control commands to build application.
 
 
 ### 2.1 Start Project with STM32
@@ -39,7 +39,7 @@ We have tested project for `SPI` transport with STM32F469I-Discovery board and `
 | ESP32 Board | STM32 Board  | Transport  |
 |:---------:|:------:|:----------:|
 | ESP32 | STM32F412ZGT6-Nucleo 144  | SDIO |
-| ESP32/S2/S3/C2/C3 | STM32F469I-Discovery  | SPI |
+| ESP32/S2/S3/C2/C3/C6 | STM32F469I-Discovery  | SPI |
 
 :warning: <code>**Note1:** For SDIO, please check [pull up requirements](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/peripherals/sd_pullup_requirements.html) while choosing ESP module</code>
 
@@ -51,7 +51,7 @@ We have tested project for `SPI` transport with STM32F469I-Discovery board and `
 * For SPI transport:
 ```
 For ESP32 peripheral: Select stm_spi_host_v1.ioc file
-For ESP32-C2/ESP32-C3/ESP32-S2/ESP32-S3 peripheral: Select stm_spi_host_v2.ioc file
+For ESP32-C2/ESP32-C3/ESP32-C6/ESP32-S2/ESP32-S3 peripheral: Select stm_spi_host_v2.ioc file
 ```
 * For SDIO transport:
 ```

esp_hosted_fg/docs/MCU_based_host/Getting_started.md

@@ -28,7 +28,19 @@ We recommend STM32CubeIDE version 1.4 IDE from STMicroelectronics on host machin
 * **Serial port communication program**:
 	For Linux and Mac development hosts, minicom is needed. For Windows based hosts Tera Term is needed.
 
-### 1.1.3 ESP-Hosted Code Repository
+### 1.1.3 Things worth noting
+* **Porting solution to Non-STM32 MCUs**
+	ESP-Hosted solution using one ESP chipset and host and other as slave can be found at [ESP as Host](https://github.com/espressif/esp-hosted/issues/186#issuecomment-1429252815)
+	This solution can be checked for easy porting to non-STM32 based MCUs. Port layer is much simplified here. Formal support is coming soon in upcoming releases.
+
+* **Network stack integration**
+	Although currently network stack is kept open to port for user, in the upcoming releaes, we plan to showcase lwip as example network stack.
+	Sample example of porting done by [Dror Gluska](https://github.com/drorgl) can be referred at https://github.com/drorgl/stm32-lwip-esp-hosted
+
+* **Clock considerations for STM32**
+	For STM32 based hosts, the default clocks are intentionally kept smaller for simplicity. Once base solution is working, It is recommended to increase/tune the SPI clock using ioc in STM32CubeIDE or STM32CubeMX.
+
+### 1.1.4 ESP-Hosted Code Repository
 Clone ESP-Hosted repository on machine, where STM32CubeIDE used to connect/flash to host.
 ```
 $ git clone --recurse-submodules <url_of_esp_hosted_repository>

esp_hosted_fg/docs/MCU_based_host/MCU_based_readme.md

@@ -69,6 +69,22 @@ Setup image is here.
 
 ![alt text](stm_esp32_c3_setup.jpg "Setup of STM32F469I as host and ESP32-C3 as peripheral")
 
+#### Hardware connections for ESP32-C6
+| STM32 Pin | ESP32-C6 Pin | Function |
+|:---------:|:-----------:|:--------:|
+| PB4  (pin5) | IO02 | MISO |
+| PA5  (pin7) | IO06 | CLK |
+| PB5  (pin9) | IO07 | MOSI |
+| PA15 (pin11)| IO10 | CS |
+| GND  (pin2) | GND | GND |
+| PC6  (pin6) | IO03 | Handshake |
+| PC7  (pin8) | IO04 | Data ready from ESP |
+| PB13  (pin10) | RST | Reset ESP |
+
+Setup image is here.
+
+![alt text](stm_esp32_c6_setup.jpg "Setup of STM32F469I as host and ESP32-C6 as peripheral")
+
 #### Hardware connections for ESP32-S3
 | STM32 Pin | ESP32-S3 Pin | Function |
 |:---------:|:-----------:|:--------:|
@@ -89,7 +105,8 @@ Setup image is here.
 ## 2.1 ESP-IDF requirement
 :warning:`Note: ESP-IDF is needed to compile ESP-Hosted firmware source. Skip this step if you are planning to use pre-built release binaries.`
 
-- Clone the ESP-IDF [release/v5.0](https://github.com/espressif/esp-idf/tree/release/v5.0)  and checkout to `release/v5.0` branch.
+- For chipsets except ESP32-C6, Clone the ESP-IDF [release/v5.0](https://github.com/espressif/esp-idf/tree/release/v5.0)  and checkout to `release/v5.0` branch.
+- For chipset ESP32-C6, Clone the ESP-IDF [master](https://github.com/espressif/esp-idf) branch
 - The control path between MCU host and ESP peripheral is based on `protobuf`. For that, corresponding stack layer, `protocomm` from ESP-IDF is used. It will be already present in ESP-IDF, no extra setup required for that.
 
 ### 2.2 Setup
@@ -102,34 +119,29 @@ Setup image is here.
 #### 2.2.2 Compilation using source
 
 - Note: Please use the same git commit both at ESP and Host
-- Clone the ESP-IDF [release/v5.0](https://github.com/espressif/esp-idf/tree/release/v5.0) and git checkout to `release/v5.0` branch.
-- [Set-up the ESP-IDF](https://docs.espressif.com/projects/esp-idf/en/release-v5.0/esp32/get-started/index.html)
+- For chipsets except ESP32-C6
+  - Clone the ESP-IDF [release/v5.0](https://github.com/espressif/esp-idf/tree/release/v5.0) and git checkout to `release/v5.0` branch.
+  - [Set-up the ESP-IDF](https://docs.espressif.com/projects/esp-idf/en/release-v5.0/esp32/get-started/index.html)
+- For chipset ESP32-C6
+  - Clone the ESP-IDF [master](https://github.com/espressif/esp-idf)
+  - [Set-up the ESP-IDF](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/get-started/index.html)
 - Navigate to `esp_hosted_fg/esp/esp_driver/network_adapter` directory.
 
 ##### Using cmake
 
 ```
 $ idf.py fullclean
+$ idf.py --preview set-target <esp_chipset>
 ```
-:warning: Skip this step for ESP32. Run for ESP32-S2 / ESP32-C2 / ESP32-C3
-```
-$ idf.py set-target esp32s2
-```
-or
-```
-$ idf.py set-target esp32c2
-```
-or
-```
-$ idf.py set-target esp32c3
-```
+where <esp_chipset> could be one from "esp32", "esp32s2", "esp32s3", "esp32c2", "esp32c3", "esp32c6"
+
 
 Run following command and navigate to `Example Configuration -> Transport layer -> SPI interface -> select` and exit from menuconfig. Read more about [idf.py](https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/api-guides/build-system.html#using-the-build-system) here.
 ```
 $ idf.py menuconfig
 ```
 
-:warning: Skip below step for ESP32-S2 / ESP32-C2 / ESP32-C3. Run for  ESP32 only.
+:warning: Skip below step for ESP32-S2/S3/C2/C3/C6. Run for  ESP32 only.
 
 Change SPI controller to VSPI. Please navigate to `Example Configuration → SPI Configuration` and change value of `SPI controller to use` to `3`
 

esp_hosted_fg/docs/MCU_based_host/SPI_setup.md

@@ -5,6 +5,9 @@ menu "Example Configuration"
         default ESP_SDIO_HOST_INTERFACE if IDF_TARGET_ESP32
         default ESP_SPI_HOST_INTERFACE if IDF_TARGET_ESP32S2
         default ESP_SPI_HOST_INTERFACE if IDF_TARGET_ESP32S3
+        default ESP_SPI_HOST_INTERFACE if IDF_TARGET_ESP32C2
+        default ESP_SPI_HOST_INTERFACE if IDF_TARGET_ESP32C3
+        default ESP_SPI_HOST_INTERFACE if IDF_TARGET_ESP32C6
         help
             Bus interface to be used for communication with the host
 
@@ -35,6 +38,7 @@ menu "Example Configuration"
         int "GPIO pin for handshake"
         default 3 if IDF_TARGET_ESP32C2
         default 3 if IDF_TARGET_ESP32C3
+        default 3 if IDF_TARGET_ESP32C6
         default 2
         help
             GPIO pin to use for handshake with other spi controller
@@ -47,15 +51,17 @@ menu "Example Configuration"
 
     config ESP_SPI_TX_Q_SIZE
         int "ESP to Host SPI queue size"
-        default 10
+        default 10 if IDF_TARGET_ESP32
+        default 20
         help
-            Very small tx queue will lower ESP -- SPI --> Host data rate (Only ESP32-C2)
+            Very small tx queue will lower ESP == SPI ==> Host data rate
 
     config ESP_SPI_RX_Q_SIZE
         int "Host to ESP SPI queue size"
-        default 10
+        default 10 if IDF_TARGET_ESP32
+        default 20
         help
-            Very small RX queue will lower ESP <-- SPI -- Host data rate (Only ESP32-C2)
+            Very small RX queue will lower ESP <== SPI == Host data rate
 
     config ESP_SPI_CHECKSUM
         bool "SPI checksum ENABLE/DISABLE"
@@ -77,11 +83,11 @@ menu "Example Configuration"
     config EXAMPLE_HCI_UART_BAUDRATE
         int "UART Baudrate for HCI: Only applicable for ESP32-C3/ESP32-S3"
         range 115200 921600
-        depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3
+        depends on IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2 || IDF_TARGET_ESP32C6
         depends on BT_CTRL_HCI_MODE_UART_H4
         default 921600
         help
-            UART Baudrate for HCI over ESP32C3/ESP32S3. Please use standard baudrate.
+            UART Baudrate for HCI over ESP32C2/C3/C6/S3. Please use standard baudrate.
 
     config ESP_DEFAULT_TASK_STACK_SIZE
         int "ESP-Hosted task stack size"

esp_hosted_fg/docs/MCU_based_host/stm_esp32_c6_setup.jpg

@@ -777,7 +777,7 @@ void app_main()
 
 	ESP_ERROR_CHECK(initialise_wifi());
 
-	ESP_TCPIP_INIT();
+	//ESP_TCPIP_INIT(); //Not needed
 
 	ESP_LOGI(TAG,"Initial set up done");
 

esp_hosted_fg/docs/esp_hosted_performance.png

@@ -111,6 +111,21 @@ static const char TAG[] = "SPI_DRIVER";
      * */
     #define SPI_CLK_MHZ            30
 
+#elif defined CONFIG_IDF_TARGET_ESP32C6
+
+    #define ESP_SPI_CONTROLLER     1
+    #define GPIO_MOSI              7
+    #define GPIO_MISO              2
+    #define GPIO_SCLK              6
+    #define GPIO_CS                10
+    #define DMA_CHAN               SPI_DMA_CH_AUTO
+
+    /* Max supported SPI slave Clock for ESP32-C6 = **60MHz**
+     * Below value could be fine tuned to achieve highest
+     * data rate in accordance with SPI Master
+     * */
+    #define SPI_CLK_MHZ            30
+
 #elif defined CONFIG_IDF_TARGET_ESP32S3
 
     #define ESP_SPI_CONTROLLER     1
@@ -135,17 +150,9 @@ static const char TAG[] = "SPI_DRIVER";
 /* SPI internal configs */
 #define SPI_BUFFER_SIZE            1600
 #define SPI_QUEUE_SIZE             3
-#ifdef CONFIG_IDF_TARGET_ESP32
-    #define SPI_RX_QUEUE_SIZE      10
-    #define SPI_TX_QUEUE_SIZE      10
-#elif CONFIG_IDF_TARGET_ESP32C2
-    /* TODO: Use this for all the chipsets */
-    #define SPI_RX_QUEUE_SIZE      CONFIG_ESP_SPI_RX_Q_SIZE
-    #define SPI_TX_QUEUE_SIZE      CONFIG_ESP_SPI_TX_Q_SIZE
-#else
-    #define SPI_RX_QUEUE_SIZE      20
-    #define SPI_TX_QUEUE_SIZE      20
-#endif
+
+#define SPI_RX_QUEUE_SIZE          CONFIG_ESP_SPI_RX_Q_SIZE
+#define SPI_TX_QUEUE_SIZE          CONFIG_ESP_SPI_TX_Q_SIZE
 
 static interface_context_t context;
 static interface_handle_t if_handle_g;

esp_hosted_fg/esp/esp_driver/network_adapter/main/Kconfig.projbuild

@@ -0,0 +1,26 @@
+CONFIG_SDIO_DAT2_DISABLED=
+
+# BT Configuration
+CONFIG_BT_ENABLED=y
+CONFIG_BT_CONTROLLER_ONLY=y
+CONFIG_BT_BLUEDROID_ENABLED=
+CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y
+CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=n
+CONFIG_BTDM_CTRL_MODE_BTDM=n
+
+# SPI/SDIO only
+CONFIG_BT_LE_HCI_INTERFACE_USE_RAM=y
+
+# #WLAN over SPI + BLE over UART
+# #UART pins, Enable below config, delete sdkconfig and rebuild
+# CONFIG_BT_LE_HCI_INTERFACE_USE_UART=y
+# CONFIG_BT_LE_HCI_UART_TX_PIN=5
+# CONFIG_BT_LE_HCI_UART_RX_PIN=18
+# CONFIG_BT_LE_HCI_UART_FLOWCTRL=n
+# # 4 pin solution is not stable for c6
+# #CONFIG_BT_LE_HCI_UART_RTS_PIN=19
+# #CONFIG_BT_LE_HCI_UART_CTS_PIN=8
+
+CONFIG_ESP32_WIFI_NVS_ENABLED=
+
+CONFIG_ESP_CACHE_MALLOC=y

esp_hosted_fg/esp/esp_driver/network_adapter/main/app_main.c

@@ -99,7 +99,7 @@ usage()
     echo "  spi:    sets ESP32<->RPi communication over SPI"
     echo "  sdio:   sets ESP32<->RPi communication over SDIO"
     echo "  btuart: Set GPIO pins on RPi for HCI UART operations with TX, RX, CTS, RTS (defaulted to option btuart_4pins)"
-    echo "  btuart_2pins: Set GPIO pins on RPi for HCI UART operations with only TX & RX pins configured (only for ESP32-C2)"
+    echo "  btuart_2pins: Set GPIO pins on RPi for HCI UART operations with only TX & RX pins configured (only for ESP32-C2/C6)"
     echo "  resetpin=6:     Set GPIO pins on RPi connected to EN pin of ESP32, used to reset ESP32 (default:6 for BCM6)"
     echo "\nExample:"
     echo "  - Prepare RPi for WLAN operation on SDIO. sdio is default if no interface mentioned"