Revert "drm/msm/sde: Introduce KCAL color control"

This reverts commit dc89310.

Author: onettboots

drivers/gpu/drm/msm/Kconfig

@@ -185,15 +185,6 @@ config EXPOSURE_ADJUSTMENT
 	help
           The EXPOSURE ADJUSTMENT provides exposure adjustment function without change
           panel hardware brightness to avoid PWM flicker on OLED devices.
-		  
-config DRM_MSM_KCAL_CTRL
-	bool "Enable kernel-level color calibration control"
-	depends on DRM_MSM
-	default y
-	help
-	  Choose this option for kernel-level color calibration control.
-	  This will adjust every atomic operation pcc and hsic call
-	  configuration with the values from kernel.
 
 config DRM_SDE_EVTLOG_DEBUG
 	bool "Enable event logging in MSM DRM"

drivers/gpu/drm/msm/Makefile

@@ -60,8 +60,6 @@ msm_drm-y := \
  msm_drm-$(CONFIG_DEBUG_FS) += sde_dbg.o \
 	sde_dbg_evtlog.o
 
-msm_drm-$(CONFIG_DRM_MSM_KCAL_CTRL) += sde/sde_hw_kcal_ctrl.o
-
 msm_drm-$(CONFIG_DRM_MSM_HDMI) += hdmi/hdmi.o \
 	hdmi/hdmi_audio.o \
 	hdmi/hdmi_bridge.o \

drivers/gpu/drm/msm/sde/sde_hw_kcal_ctrl.c

@@ -13,7 +13,6 @@
 #include "sde_reg_dma.h"
 #include "sde_hw_reg_dma_v1_color_proc.h"
 #include "sde_hw_color_proc_common_v4.h"
-#include "sde_hw_kcal_ctrl.h"
 #include "sde_hw_ctl.h"
 #include "sde_hw_sspp.h"
 #include "sde_hwio.h"
@@ -1037,23 +1036,11 @@ reg_dmav1_setup_dspp_pa_hsicv17_apply(struct sde_hw_dspp *ctx,
 	return rc;
 }
 
-static inline void
-reg_dmav1_setup_dspp_pa_hsicv17_kcal(struct sde_hw_dspp *ctx, void *ctl)
-{
-	struct drm_msm_pa_hsic hsic_cfg = sde_hw_kcal_hsic_struct();
-	int rc;
-
-	rc = reg_dmav1_setup_dspp_pa_hsicv17_apply(ctx, &hsic_cfg, ctl);
-	if (rc)
-		pr_err("kernel hsic application failed ret %d\n", rc);
-}
-
 void reg_dmav1_setup_dspp_pccv4(struct sde_hw_dspp *ctx, void *cfg)
 {
 	struct sde_hw_reg_dma_ops *dma_ops;
 	struct sde_reg_dma_kickoff_cfg kick_off;
 	struct sde_hw_cp_cfg *hw_cfg = cfg;
-	struct sde_hw_kcal *kcal = sde_hw_kcal_get();
 	struct sde_reg_dma_setup_ops_cfg dma_write_cfg;
 	struct drm_msm_pcc *pcc_cfg;
 	struct drm_msm_pcc_coeff *coeffs = NULL;
@@ -1125,10 +1112,6 @@ void reg_dmav1_setup_dspp_pccv4(struct sde_hw_dspp *ctx, void *cfg)
 		data[i + 3] = coeffs->r;
 		data[i + 6] = coeffs->g;
 		data[i + 9] = coeffs->b;
-
-		if (kcal->enabled)
-			sde_hw_kcal_pcc_adjust(data, i);
-
 		data[i + 12] = coeffs->rg;
 		data[i + 15] = coeffs->rb;
 		data[i + 18] = coeffs->gb;
@@ -1161,22 +1144,16 @@ void reg_dmav1_setup_dspp_pccv4(struct sde_hw_dspp *ctx, void *cfg)
 	if (rc)
 		DRM_ERROR("failed to kick off ret %d\n", rc);
 
-	if (kcal->enabled)
-		reg_dmav1_setup_dspp_pa_hsicv17_kcal(ctx, hw_cfg->ctl);
 exit:
 	kfree(data);
 }
 
 void reg_dmav1_setup_dspp_pa_hsicv17(struct sde_hw_dspp *ctx, void *cfg)
 {
 	struct sde_hw_cp_cfg *hw_cfg = cfg;
-	struct sde_hw_kcal *kcal = sde_hw_kcal_get();
 	u32 opcode = 0;
 	int rc;
 
-	if (kcal->enabled)
-		return;
-
 	opcode = SDE_REG_READ(&ctx->hw, ctx->cap->sblk->hsic.base);
 
 	rc = reg_dma_dspp_check(ctx, cfg, HSIC);