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Christophe RoullierPaolo Abeni
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net: stmmac: dwmac-stm32: add management of stm32mp13 for stm32
Add Ethernet support for STM32MP13. STM32MP13 is STM32 SOC with 2 GMACs instances. GMAC IP version is SNPS 4.20. GMAC IP configure with 1 RX and 1 TX queue. DMA HW capability register supported RX Checksum Offload Engine supported TX Checksum insertion supported Wake-Up On Lan supported TSO supported Signed-off-by: Christophe Roullier <[email protected]> Reviewed-by: Marek Vasut <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
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drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

Lines changed: 28 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,7 @@ struct stm32_ops {
104104
int (*parse_data)(struct stm32_dwmac *dwmac,
105105
struct device *dev);
106106
bool clk_rx_enable_in_suspend;
107+
bool is_mp13;
107108
u32 syscfg_clr_off;
108109
};
109110

@@ -224,11 +225,18 @@ static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)
224225
{
225226
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
226227
u32 reg = dwmac->mode_reg;
227-
int val;
228+
int val = 0;
228229

229230
switch (plat_dat->mac_interface) {
230231
case PHY_INTERFACE_MODE_MII:
231-
val = SYSCFG_PMCR_ETH_SEL_MII;
232+
/*
233+
* STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.
234+
* SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and
235+
* acts as a selector between 0:GMII and 1:MII. As STM32MP13xx
236+
* supports only MII, ETH_SELMII is not present.
237+
*/
238+
if (!dwmac->ops->is_mp13) /* Select MII mode on STM32MP15xx */
239+
val |= SYSCFG_PMCR_ETH_SEL_MII;
232240
break;
233241
case PHY_INTERFACE_MODE_GMII:
234242
val = SYSCFG_PMCR_ETH_SEL_GMII;
@@ -359,8 +367,12 @@ static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
359367

360368
dwmac->mode_mask = SYSCFG_MP1_ETH_MASK;
361369
err = of_property_read_u32_index(np, "st,syscon", 2, &dwmac->mode_mask);
362-
if (err)
363-
dev_dbg(dev, "Warning sysconfig register mask not set\n");
370+
if (err) {
371+
if (dwmac->ops->is_mp13)
372+
dev_err(dev, "Sysconfig register mask must be set (%d)\n", err);
373+
else
374+
dev_dbg(dev, "Warning sysconfig register mask not set\n");
375+
}
364376

365377
return err;
366378
}
@@ -560,12 +572,24 @@ static struct stm32_ops stm32mp1_dwmac_data = {
560572
.resume = stm32mp1_resume,
561573
.parse_data = stm32mp1_parse_data,
562574
.syscfg_clr_off = 0x44,
575+
.is_mp13 = false,
576+
.clk_rx_enable_in_suspend = true
577+
};
578+
579+
static struct stm32_ops stm32mp13_dwmac_data = {
580+
.set_mode = stm32mp1_set_mode,
581+
.suspend = stm32mp1_suspend,
582+
.resume = stm32mp1_resume,
583+
.parse_data = stm32mp1_parse_data,
584+
.syscfg_clr_off = 0x08,
585+
.is_mp13 = true,
563586
.clk_rx_enable_in_suspend = true
564587
};
565588

566589
static const struct of_device_id stm32_dwmac_match[] = {
567590
{ .compatible = "st,stm32-dwmac", .data = &stm32mcu_dwmac_data},
568591
{ .compatible = "st,stm32mp1-dwmac", .data = &stm32mp1_dwmac_data},
592+
{ .compatible = "st,stm32mp13-dwmac", .data = &stm32mp13_dwmac_data},
569593
{ }
570594
};
571595
MODULE_DEVICE_TABLE(of, stm32_dwmac_match);

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