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Auto merge of rust-lang#156405 - JonathanBrouwer:rollup-yJcad1j, r=JonathanBrouwer
Rollup of 10 pull requests Successful merges: - rust-lang#156394 (miri subtree update) - rust-lang#154972 (Implement `core::arch::return_address` and tests) - rust-lang#155679 (rustdoc: Reify emission types) - rust-lang#155982 (Fix closure HIR span context mismatch) - rust-lang#156323 (Handle --print=backend-has-mnemonic in cg_clif) - rust-lang#156387 (std fs tests: avoid matching on OS-provided error string) - rust-lang#156129 (compiletest: Migrate from `PassMode`/`FailMode` to `PassFailMode`) - rust-lang#156192 (core: Replace `ptr::slice_from_raw_parts` with `slice::from_raw_parts`) - rust-lang#156365 (stream_send_recv_stress tests: wait for threads to finish) - rust-lang#156368 (Fix invalid unreachable in is_known_valid_scrutinee for Reborrow)
2 parents e8f92f5 + cfd0d4c commit 4b0c9d7

174 files changed

Lines changed: 3332 additions & 1434 deletions

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compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1523,6 +1523,12 @@ fn codegen_regular_intrinsic_call<'tcx>(
15231523
fx.bcx.set_cold_block(fx.bcx.current_block().unwrap());
15241524
}
15251525

1526+
sym::return_address => {
1527+
let val = fx.bcx.ins().get_return_address(fx.pointer_type);
1528+
let val = CValue::by_val(val, ret.layout());
1529+
ret.write_cvalue(fx, val);
1530+
}
1531+
15261532
// Unimplemented intrinsics must have a fallback body. The fallback body is obtained
15271533
// by converting the `InstanceKind::Intrinsic` to an `InstanceKind::Item`.
15281534
_ => {

compiler/rustc_codegen_cranelift/src/lib.rs

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -200,6 +200,11 @@ impl CodegenBackend for CraneliftCodegenBackend {
200200
println!("Cranelift version: {}", cranelift_codegen::VERSION);
201201
}
202202

203+
fn has_mnemonic(&self, sess: &Session, mnemonic: &str) -> bool {
204+
// All Cranelift supported targets support ret except for s390x
205+
mnemonic == "ret" && sess.target.arch != Arch::S390x
206+
}
207+
203208
fn target_cpu(&self, sess: &Session) -> String {
204209
// FIXME handle `-Ctarget-cpu=native`
205210
match sess.opts.cg.target_cpu {

compiler/rustc_codegen_llvm/src/intrinsic.rs

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -849,6 +849,22 @@ impl<'ll, 'tcx> IntrinsicCallBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
849849
}
850850
}
851851

852+
sym::return_address => {
853+
match self.sess().target.arch {
854+
// Expand this list as needed
855+
| Arch::Wasm32
856+
| Arch::Wasm64 => {
857+
let ty = self.type_ptr();
858+
self.const_null(ty)
859+
}
860+
_ => {
861+
let ty = self.type_ix(32);
862+
let val = self.const_int(ty, 0);
863+
self.call_intrinsic("llvm.returnaddress", &[], &[val])
864+
}
865+
}
866+
}
867+
852868
_ => {
853869
debug!("unknown intrinsic '{}' -- falling back to default body", name);
854870
// Call the fallback body instead of generating the intrinsic code

compiler/rustc_codegen_llvm/src/lib.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -314,6 +314,10 @@ impl CodegenBackend for LlvmCodegenBackend {
314314
llvm::LLVMRustLLVMHasZstdCompression()
315315
}
316316

317+
fn has_mnemonic(&self, sess: &Session, mnemonic: &str) -> bool {
318+
llvm_util::target_has_mnemonic(sess, mnemonic)
319+
}
320+
317321
fn target_config(&self, sess: &Session) -> TargetConfig {
318322
target_config(sess)
319323
}

compiler/rustc_codegen_llvm/src/llvm_util.rs

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -480,10 +480,6 @@ pub(crate) fn print(req: &PrintRequest, out: &mut String, sess: &Session) {
480480
match req.kind {
481481
PrintKind::TargetCPUs => print_target_cpus(sess, tm.raw(), out),
482482
PrintKind::TargetFeatures => print_target_features(sess, tm.raw(), out),
483-
PrintKind::BackendHasMnemonic => {
484-
let mnemonic = req.arg.as_deref().expect("BackendHasMnemonic requires arg");
485-
print_target_has_mnemonic(tm.raw(), mnemonic, out)
486-
}
487483
_ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
488484
}
489485
}
@@ -746,9 +742,9 @@ pub(crate) fn tune_cpu(sess: &Session) -> Option<&str> {
746742
Some(handle_native(name))
747743
}
748744

749-
fn print_target_has_mnemonic(tm: &llvm::TargetMachine, mnemonic: &str, out: &mut String) {
750-
use std::fmt::Write;
745+
pub(crate) fn target_has_mnemonic(sess: &Session, mnemonic: &str) -> bool {
746+
require_inited();
747+
let tm = create_informational_target_machine(sess, false);
751748
let cstr = SmallCStr::new(mnemonic);
752-
let has_mnemonic = unsafe { llvm::LLVMRustTargetHasMnemonic(tm, cstr.as_ptr()) };
753-
writeln!(out, "{}", has_mnemonic).unwrap();
749+
unsafe { llvm::LLVMRustTargetHasMnemonic(tm.raw(), cstr.as_ptr()) }
754750
}

compiler/rustc_codegen_ssa/src/mir/intrinsic.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,8 @@ impl<'a, 'tcx, Bx: BuilderMethods<'a, 'tcx>> FunctionCx<'a, 'tcx, Bx> {
121121
| sym::contract_checks
122122
| sym::atomic_fence
123123
| sym::atomic_singlethreadfence
124-
| sym::caller_location => {}
124+
| sym::caller_location
125+
| sym::return_address => {}
125126
_ => {
126127
span_bug!(
127128
span,

compiler/rustc_codegen_ssa/src/traits/backend.rs

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -92,6 +92,14 @@ pub trait CodegenBackend {
9292
false
9393
}
9494

95+
/// Value printed by `--print=backend-has-mnemonic:...`.
96+
///
97+
/// Used by compiletest to determine whether tests involving `asm!()` should
98+
/// be executed or skipped.
99+
fn has_mnemonic(&self, _sess: &Session, _mnemonic: &str) -> bool {
100+
false
101+
}
102+
95103
/// The metadata loader used to load rlib and dylib metadata.
96104
///
97105
/// Alternative codegen backends may want to use different rlib or dylib formats than the

compiler/rustc_driver_impl/src/lib.rs

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -802,7 +802,9 @@ fn print_crate_info(
802802
println_info!("{}", calling_conventions.join("\n"));
803803
}
804804
BackendHasMnemonic => {
805-
codegen_backend.print(req, &mut crate_info, sess);
805+
let has_mnemonic: bool =
806+
codegen_backend.has_mnemonic(sess, req.arg.as_ref().unwrap());
807+
println_info!("{has_mnemonic}");
806808
}
807809
BackendHasZstd => {
808810
let has_zstd: bool = codegen_backend.has_zstd();

compiler/rustc_hir_analysis/src/check/intrinsic.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -180,6 +180,7 @@ fn intrinsic_operation_unsafety(tcx: TyCtxt<'_>, intrinsic_id: LocalDefId) -> hi
180180
| sym::ptr_guaranteed_cmp
181181
| sym::ptr_mask
182182
| sym::ptr_metadata
183+
| sym::return_address
183184
| sym::rotate_left
184185
| sym::rotate_right
185186
| sym::round_ties_even_f16
@@ -793,6 +794,8 @@ pub(crate) fn check_intrinsic_type(
793794
| sym::atomic_xor => (2, 1, vec![Ty::new_mut_ptr(tcx, param(0)), param(1)], param(0)),
794795
sym::atomic_fence | sym::atomic_singlethreadfence => (0, 1, Vec::new(), tcx.types.unit),
795796

797+
sym::return_address => (0, 0, vec![], Ty::new_imm_ptr(tcx, tcx.types.unit)),
798+
796799
other => {
797800
tcx.dcx().emit_err(UnrecognizedIntrinsicFunction { span, name: other });
798801
return;

compiler/rustc_middle/src/hir/map.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -980,8 +980,8 @@ impl<'tcx> TyCtxt<'tcx> {
980980
span,
981981
..
982982
}) => {
983-
// Ensure that the returned span has the item's SyntaxContext.
984-
fn_decl_span.find_ancestor_inside(*span).unwrap_or(*span)
983+
// Ensure that the returned span has the closure expression's SyntaxContext.
984+
fn_decl_span.find_ancestor_inside_same_ctxt(*span).unwrap_or(*span)
985985
}
986986
_ => self.hir_span_with_body(hir_id),
987987
};

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