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tests: Improve coverage of emitinlinerv32.c.
Signed-off-by: Jeff Epler <jepler@gmail.com>
1 parent ccec4a2 commit fd05db1

3 files changed

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tests/ports/unix/mpy_coverage.py

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Original file line numberDiff line numberDiff line change
@@ -71,6 +71,17 @@ def run_one_arch(arch, inlineasm=None):
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run_dir(f"inlineasm/{inlineasm}", emit_arch=arch, emit_opt="EMIT_OPT_NATIVE_PYTHON")
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def run_extra_cases(emit_arch, cases):
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arch_support_check(emit_arch)
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for content in cases:
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try:
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compiled = mpycross.compile(content, "<expect-error>", emit_arch=emit_arch)
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print(f"OK")
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except SyntaxError as e:
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print(e)
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if __name__ == "__main__":
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arch_support_check("host")
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run_dir(f"basics", emit_opt="EMIT_OPT_BYTECODE")
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Original file line numberDiff line numberDiff line change
@@ -1,3 +1,49 @@
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import mpy_coverage
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mpy_coverage.run_one_arch("rv32imc", "rv32")
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print("Expected to compile")
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mpy_coverage.run_extra_cases(
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"rv32imc",
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[
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"@micropython.asm_rv32\ndef f(): ebreak()",
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],
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)
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# Test "argument out of range" specifically for label targets
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nl = "\n"
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beqz_test = f"""
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@micropython.asm_rv32
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def f():
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c_beqz(a0, l)
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{nl.join(" ecall()" for _ in range(64))}
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label(l)
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"""
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print("Expected to fail")
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mpy_coverage.run_extra_cases(
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"rv32imc",
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[
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"@micropython.asm_rv32\ndef f(a0, a1, a2, a3, a4): ac_li(a0, 1)",
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"@micropython.asm_rv32\ndef f(a0, a4): ac_li(a0, 1)",
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"@micropython.asm_rv32\ndef f(a0): csrrc()",
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"@micropython.asm_rv32\ndef f(a0): csrrc(s0, s0, s0)",
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"@micropython.asm_rv32\ndef f(a0): csrrc(s0, s0, 0xffffff)",
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"@micropython.asm_rv32\ndef f(a0): csrrc(s0, 0, s0)",
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"@micropython.asm_rv32\ndef f(a0): moo()",
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"@micropython.asm_rv32\ndef f(a0): beq(a0,a0,0)",
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"@micropython.asm_rv32\ndef f(a0): beq(a0,a0,3.14)",
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"@micropython.asm_rv32\ndef f(a0): beq(a0,a0,y)",
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"@micropython.asm_rv32\ndef f(): lw(a3, 99999(a3))",
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"@micropython.asm_rv32\ndef f(): lw(a3, -99999(a3))",
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"@micropython.asm_rv32\ndef f(): lw(a3, +99999(a3))",
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"@micropython.asm_rv32\ndef f(): lw(a3, (a3))",
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"@micropython.asm_rv32\ndef f(): lw()",
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"@micropython.asm_rv32\ndef f(): a=di(a2, a2, -1)",
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"@micropython.asm_rv32\ndef f(ax): beq(ax, ax, 1)",
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"@micropython.asm_rv32\ndef f(): c_lui(zero, 0)",
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"@micropython.asm_rv32\ndef f(): c_lui(a0, 0)",
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"@micropython.asm_rv32\ndef f(): csrrci(a0, 63, 63)",
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beqz_test,
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],
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)

tests/ports/unix/mpy_coverage_rv32imc.py.exp

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Original file line numberDiff line numberDiff line change
@@ -595,3 +595,27 @@ Compiling asmsanity.py with rv32imc EMIT_OPT_NATIVE_PYTHON
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Compiling asmshift.py with rv32imc EMIT_OPT_NATIVE_PYTHON
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Compiling asmstack.py with rv32imc EMIT_OPT_NATIVE_PYTHON
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Compiling asmsum.py with rv32imc EMIT_OPT_NATIVE_PYTHON
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Expected to compile
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OK
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Expected to fail
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can only have up to 4 parameters for RV32 assembly
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parameters must be registers in sequence a0 to a3
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opcode 'csrrc': expecting 3 arguments
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opcode 'csrrc' argument 3: expecting integer
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opcode 'csrrc' argument 3: out of range
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opcode 'csrrc' argument 2: expecting register
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unknown RV32 instruction 'moo'
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opcode 'beq' argument 3: expecting label
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opcode 'beq' argument 3: expecting label
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opcode 'beq' argument 3: undefined label 'y'
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opcode 'lw' argument 2: out of range
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opcode 'lw' argument 2: out of range
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opcode 'lw' argument 2: out of range
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opcode 'lw' argument 2: expecting offset
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opcode 'lw': expecting 2 arguments
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expecting an assembler instruction
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parameters must be registers in sequence a0 to a3
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opcode 'c_lui' argument 1: unknown register
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opcode 'c_lui' argument 2: must not be zero
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opcode 'csrrci' argument 3: out of range
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opcode 'c_beqz' argument 2: out of range

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