@@ -45,6 +45,7 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
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const LLT s16 = LLT::scalar (16 );
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const LLT s32 = LLT::scalar (32 );
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const LLT s64 = LLT::scalar (64 );
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+ const LLT s80 = LLT::scalar (80 );
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const LLT s128 = LLT::scalar (128 );
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const LLT sMaxScalar = Subtarget.is64Bit () ? s64 : s32;
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@@ -292,6 +293,53 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
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getActionDefinitionsBuilder ({G_FRAME_INDEX, G_GLOBAL_VALUE}).legalFor ({p0});
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+ // load/store
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+ for (unsigned Op : {G_LOAD, G_STORE}) {
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+ auto &Action = getActionDefinitionsBuilder (Op);
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+ Action.legalForTypesWithMemDesc ({{s8, p0, s1, 1 },
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+ {s8, p0, s8, 1 },
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+ {s16, p0, s8, 1 },
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+ {s16, p0, s16, 1 },
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+ {s32, p0, s8, 1 },
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+ {s32, p0, s16, 1 },
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+ {s32, p0, s32, 1 },
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+ {s80, p0, s80, 1 },
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+ {p0, p0, p0, 1 }});
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+ if (Is64Bit)
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+ Action.legalForTypesWithMemDesc ({{s64, p0, s8, 1 },
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+ {s64, p0, s16, 1 },
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+ {s64, p0, s32, 1 },
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+ {s64, p0, s64, 1 }});
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+ if (HasSSE1)
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+ Action.legalForTypesWithMemDesc ({{v16s8, p0, v16s8, 1 },
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+ {v8s16, p0, v8s16, 1 },
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+ {v4s32, p0, v4s32, 1 },
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+ {v2s64, p0, v2s64, 1 }});
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+ if (HasAVX)
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+ Action.legalForTypesWithMemDesc ({{v32s8, p0, v32s8, 1 },
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+ {v16s16, p0, v16s16, 1 },
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+ {v8s32, p0, v8s32, 1 },
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+ {v4s64, p0, v4s64, 1 }});
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+ if (HasAVX512)
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+ Action.legalForTypesWithMemDesc ({{v64s8, p0, v64s8, 1 },
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+ {v32s16, p0, v32s16, 1 },
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+ {v16s32, p0, v16s32, 1 },
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+ {v8s64, p0, v8s64, 1 }});
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+ Action.widenScalarToNextPow2 (0 , /* Min=*/ 8 ).clampScalar (0 , s8, sMaxScalar );
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+ }
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+
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+ for (unsigned Op : {G_SEXTLOAD, G_ZEXTLOAD}) {
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+ auto &Action = getActionDefinitionsBuilder (Op);
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+ Action.legalForTypesWithMemDesc ({{s16, p0, s8, 1 },
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+ {s32, p0, s8, 1 },
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+ {s32, p0, s16, 1 }});
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+ if (Is64Bit)
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+ Action.legalForTypesWithMemDesc ({{s64, p0, s8, 1 },
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+ {s64, p0, s16, 1 },
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+ {s64, p0, s32, 1 }});
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+ // TODO - SSE41/AVX2/AVX512F/AVX512BW vector extensions
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+ }
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+
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// sext, zext, and anyext
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getActionDefinitionsBuilder ({G_SEXT, G_ZEXT, G_ANYEXT})
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.legalIf ([=](const LegalityQuery &Query) {
@@ -442,13 +490,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
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setLegalizerInfoSSE2 ();
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setLegalizerInfoAVX ();
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setLegalizerInfoAVX2 ();
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- setLegalizerInfoAVX512 ();
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auto &LegacyInfo = getLegacyLegalizerInfo ();
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- for (unsigned MemOp : {G_LOAD, G_STORE})
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- LegacyInfo.setLegalizeScalarToDifferentSizeStrategy (
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- MemOp, 0 , LegacyLegalizerInfo::narrowToSmallerAndWidenToSmallest);
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-
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LegacyInfo.computeTables ();
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verify (*STI.getInstrInfo ());
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}
@@ -460,22 +503,13 @@ bool X86LegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
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void X86LegalizerInfo::setLegalizerInfo32bit () {
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- const LLT p0 = LLT::pointer (0 , TM.getPointerSizeInBits (0 ));
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const LLT s8 = LLT::scalar (8 );
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const LLT s16 = LLT::scalar (16 );
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const LLT s32 = LLT::scalar (32 );
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const LLT s64 = LLT::scalar (64 );
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auto &LegacyInfo = getLegacyLegalizerInfo ();
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- for (unsigned MemOp : {G_LOAD, G_STORE}) {
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- for (auto Ty : {s8, s16, s32, p0})
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- LegacyInfo.setAction ({MemOp, Ty}, LegacyLegalizeActions::Legal);
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-
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- // And everything's fine in addrspace 0.
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- LegacyInfo.setAction ({MemOp, 1 , p0}, LegacyLegalizeActions::Legal);
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- }
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-
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// Merge/Unmerge
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for (const auto &Ty : {s16, s32, s64}) {
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LegacyInfo.setAction ({G_MERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
@@ -493,14 +527,10 @@ void X86LegalizerInfo::setLegalizerInfo64bit() {
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if (!Subtarget.is64Bit ())
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return ;
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- const LLT s64 = LLT::scalar (64 );
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const LLT s128 = LLT::scalar (128 );
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auto &LegacyInfo = getLegacyLegalizerInfo ();
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- for (unsigned MemOp : {G_LOAD, G_STORE})
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- LegacyInfo.setAction ({MemOp, s64}, LegacyLegalizeActions::Legal);
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-
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// Merge/Unmerge
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LegacyInfo.setAction ({G_MERGE_VALUES, s128}, LegacyLegalizeActions::Legal);
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LegacyInfo.setAction ({G_UNMERGE_VALUES, 1 , s128},
@@ -519,10 +549,6 @@ void X86LegalizerInfo::setLegalizerInfoSSE1() {
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auto &LegacyInfo = getLegacyLegalizerInfo ();
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- for (unsigned MemOp : {G_LOAD, G_STORE})
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- for (auto Ty : {v4s32, v2s64})
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- LegacyInfo.setAction ({MemOp, Ty}, LegacyLegalizeActions::Legal);
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-
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// Merge/Unmerge
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for (const auto &Ty : {v4s32, v2s64}) {
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LegacyInfo.setAction ({G_UNMERGE_VALUES, 1 , Ty},
@@ -579,10 +605,6 @@ void X86LegalizerInfo::setLegalizerInfoAVX() {
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auto &LegacyInfo = getLegacyLegalizerInfo ();
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- for (unsigned MemOp : {G_LOAD, G_STORE})
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- for (auto Ty : {v8s32, v4s64})
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- LegacyInfo.setAction ({MemOp, Ty}, LegacyLegalizeActions::Legal);
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-
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// Merge/Unmerge
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for (const auto &Ty :
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{v32s8, v64s8, v16s16, v32s16, v8s32, v16s32, v4s64, v8s64}) {
@@ -620,17 +642,3 @@ void X86LegalizerInfo::setLegalizerInfoAVX2() {
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LegacyInfo.setAction ({G_UNMERGE_VALUES, Ty}, LegacyLegalizeActions::Legal);
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}
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}
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-
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- void X86LegalizerInfo::setLegalizerInfoAVX512 () {
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- if (!Subtarget.hasAVX512 ())
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- return ;
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-
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- const LLT v16s32 = LLT::fixed_vector (16 , 32 );
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- const LLT v8s64 = LLT::fixed_vector (8 , 64 );
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-
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- auto &LegacyInfo = getLegacyLegalizerInfo ();
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-
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- for (unsigned MemOp : {G_LOAD, G_STORE})
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- for (auto Ty : {v16s32, v8s64})
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- LegacyInfo.setAction ({MemOp, Ty}, LegacyLegalizeActions::Legal);
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- }
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