77from coreblocks .params import GenParams
88from coreblocks .arch import OpType
99from coreblocks .interface .layouts import RSLayouts
10+ from coreblocks .interface .keys import InstructionPrecommitKey
1011from transactron .lib .metrics import HwExpHistogram , TaggedLatencyMeasurer
11- from transactron .utils import RecordDict
12+ from transactron .utils import DependencyContext , RecordDict
1213from transactron .utils import assign
1314from transactron .utils .assign import AssignType
1415from transactron .utils .amaranth_ext .functions import popcount
@@ -44,6 +45,8 @@ def __init__(
4445 self .ready_for = [list (op_list ) for op_list in ready_for ]
4546 self .get_ready_list = [Method (o = self .layouts .get_ready_list_out , nonexclusive = True ) for _ in self .ready_for ]
4647
48+ self .dependency_manager = DependencyContext .get ()
49+
4750 self .data = Array (Signal (self .internal_layout ) for _ in range (self .rs_entries ))
4851 self .data_ready = Signal (self .rs_entries )
4952
@@ -67,10 +70,14 @@ def elaborate(self, platform) -> TModule:
6770 def _elaborate (self , m : TModule , selected_id : Value , select_possible : Value , take_vector : Value ):
6871 m .submodules += [self .perf_rs_wait_time , self .perf_num_full ]
6972
70- for i , record in enumerate (self .data ):
71- m .d .comb += self .data_ready [i ].eq (
72- ~ record .rs_data .rp_s1 .bool () & ~ record .rs_data .rp_s2 .bool () & record .rec_full .bool ()
73- )
73+ with Transaction (name = "readiness" ).body (m ):
74+ precommit = self .dependency_manager .get_dependency (InstructionPrecommitKey ())
75+ info = precommit (m )
76+ for i , record in enumerate (self .data ):
77+ m .d .comb += self .data_ready [i ].eq (
78+ (~ record .rs_data .rp_s1 .bool () & ~ record .rs_data .rp_s2 .bool () & record .rec_full .bool ())
79+ | ~ info .side_fx
80+ )
7481
7582 ready_lists : list [Value ] = []
7683 for op_list in self .ready_for :
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