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jayfoadjayfoad
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Add some -early-live-intervals RUN lines (#66058)
This adds test coverage for an upcoming change to TwoAddressInstructionPass::processTiedPairs.
1 parent 1cf2599 commit 0528dbf

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3 files changed

+89
-42
lines changed

3 files changed

+89
-42
lines changed

‎llvm/test/CodeGen/SystemZ/rot-02.ll

+16-7
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,8 @@
22
; Test removal of AND operations that don't affect last 6 bits of rotate amount
33
; operand.
44
;
5-
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
5+
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefixes=CHECK,CHECK-LV
6+
; RUN: llc < %s -mtriple=s390x-linux-gnu -early-live-intervals | FileCheck %s -check-prefixes=CHECK,CHECK-LIS
67

78
; Test that AND is not removed when some lower 5 bits are not set.
89
define i32 @f1(i32 %val, i32 %amt) {
@@ -75,12 +76,20 @@ define i64 @f4(i64 %val, i64 %amt) {
7576

7677
; Test that AND is not entirely removed if the result is reused.
7778
define i32 @f5(i32 %val, i32 %amt) {
78-
; CHECK-LABEL: f5:
79-
; CHECK: # %bb.0:
80-
; CHECK-NEXT: rll %r2, %r2, 0(%r3)
81-
; CHECK-NEXT: nilf %r3, 63
82-
; CHECK-NEXT: ar %r2, %r3
83-
; CHECK-NEXT: br %r14
79+
; CHECK-LV-LABEL: f5:
80+
; CHECK-LV: # %bb.0:
81+
; CHECK-LV-NEXT: rll %r2, %r2, 0(%r3)
82+
; CHECK-LV-NEXT: nilf %r3, 63
83+
; CHECK-LV-NEXT: ar %r2, %r3
84+
; CHECK-LV-NEXT: br %r14
85+
;
86+
; CHECK-LIS-LABEL: f5:
87+
; CHECK-LIS: # %bb.0:
88+
; CHECK-LIS-NEXT: rll %r0, %r2, 0(%r3)
89+
; CHECK-LIS-NEXT: nilf %r3, 63
90+
; CHECK-LIS-NEXT: ar %r3, %r0
91+
; CHECK-LIS-NEXT: lr %r2, %r3
92+
; CHECK-LIS-NEXT: br %r14
8493
%and = and i32 %amt, 63
8594

8695
%inv = sub i32 32, %and

‎llvm/test/CodeGen/X86/combine-or.ll

+21-10
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
2+
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefixes=CHECK,CHECK-LV
3+
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -early-live-intervals | FileCheck %s -check-prefixes=CHECK,CHECK-LIS
34

45
define i32 @or_self(i32 %x) {
56
; CHECK-LABEL: or_self:
@@ -235,15 +236,25 @@ define <4 x i32> @test17(<4 x i32> %a, <4 x i32> %b) {
235236

236237

237238
define <4 x i32> @test18(<4 x i32> %a, <4 x i32> %b) {
238-
; CHECK-LABEL: test18:
239-
; CHECK: # %bb.0:
240-
; CHECK-NEXT: pxor %xmm2, %xmm2
241-
; CHECK-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
242-
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
243-
; CHECK-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
244-
; CHECK-NEXT: por %xmm0, %xmm2
245-
; CHECK-NEXT: movdqa %xmm2, %xmm0
246-
; CHECK-NEXT: retq
239+
; CHECK-LV-LABEL: test18:
240+
; CHECK-LV: # %bb.0:
241+
; CHECK-LV-NEXT: pxor %xmm2, %xmm2
242+
; CHECK-LV-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3,4,5,6,7]
243+
; CHECK-LV-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
244+
; CHECK-LV-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
245+
; CHECK-LV-NEXT: por %xmm0, %xmm2
246+
; CHECK-LV-NEXT: movdqa %xmm2, %xmm0
247+
; CHECK-LV-NEXT: retq
248+
;
249+
; CHECK-LIS-LABEL: test18:
250+
; CHECK-LIS: # %bb.0:
251+
; CHECK-LIS-NEXT: pxor %xmm2, %xmm2
252+
; CHECK-LIS-NEXT: pxor %xmm3, %xmm3
253+
; CHECK-LIS-NEXT: pblendw {{.*#+}} xmm3 = xmm0[0,1],xmm3[2,3,4,5,6,7]
254+
; CHECK-LIS-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,0,1,1]
255+
; CHECK-LIS-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
256+
; CHECK-LIS-NEXT: por %xmm2, %xmm0
257+
; CHECK-LIS-NEXT: retq
247258
%shuf1 = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32><i32 4, i32 0, i32 4, i32 4>
248259
%shuf2 = shufflevector <4 x i32> %b, <4 x i32> zeroinitializer, <4 x i32><i32 0, i32 4, i32 4, i32 4>
249260
%or = or <4 x i32> %shuf1, %shuf2

‎llvm/test/CodeGen/X86/combine-rotates.ll

+52-25
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
2+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,SSE2-LV
3+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -early-live-intervals | FileCheck %s --check-prefixes=CHECK,SSE2,SSE2-LIS
34
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,XOP
45
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
56
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
@@ -114,30 +115,56 @@ define i32 @combine_rot_select_zero(i32, i32) {
114115
}
115116

116117
define <4 x i32> @combine_vec_rot_select_zero(<4 x i32>, <4 x i32>) {
117-
; SSE2-LABEL: combine_vec_rot_select_zero:
118-
; SSE2: # %bb.0:
119-
; SSE2-NEXT: pxor %xmm2, %xmm2
120-
; SSE2-NEXT: pcmpeqd %xmm1, %xmm2
121-
; SSE2-NEXT: pslld $23, %xmm1
122-
; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
123-
; SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
124-
; SSE2-NEXT: cvttps2dq %xmm1, %xmm1
125-
; SSE2-NEXT: movdqa %xmm0, %xmm3
126-
; SSE2-NEXT: pmuludq %xmm1, %xmm3
127-
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
128-
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
129-
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
130-
; SSE2-NEXT: pmuludq %xmm5, %xmm1
131-
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
132-
; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
133-
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
134-
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
135-
; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
136-
; SSE2-NEXT: por %xmm4, %xmm3
137-
; SSE2-NEXT: pand %xmm2, %xmm0
138-
; SSE2-NEXT: pandn %xmm3, %xmm2
139-
; SSE2-NEXT: por %xmm2, %xmm0
140-
; SSE2-NEXT: retq
118+
; SSE2-LV-LABEL: combine_vec_rot_select_zero:
119+
; SSE2-LV: # %bb.0:
120+
; SSE2-LV-NEXT: pxor %xmm2, %xmm2
121+
; SSE2-LV-NEXT: pcmpeqd %xmm1, %xmm2
122+
; SSE2-LV-NEXT: pslld $23, %xmm1
123+
; SSE2-LV-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
124+
; SSE2-LV-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
125+
; SSE2-LV-NEXT: cvttps2dq %xmm1, %xmm1
126+
; SSE2-LV-NEXT: movdqa %xmm0, %xmm3
127+
; SSE2-LV-NEXT: pmuludq %xmm1, %xmm3
128+
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
129+
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
130+
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
131+
; SSE2-LV-NEXT: pmuludq %xmm5, %xmm1
132+
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
133+
; SSE2-LV-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
134+
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
135+
; SSE2-LV-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
136+
; SSE2-LV-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
137+
; SSE2-LV-NEXT: por %xmm4, %xmm3
138+
; SSE2-LV-NEXT: pand %xmm2, %xmm0
139+
; SSE2-LV-NEXT: pandn %xmm3, %xmm2
140+
; SSE2-LV-NEXT: por %xmm2, %xmm0
141+
; SSE2-LV-NEXT: retq
142+
;
143+
; SSE2-LIS-LABEL: combine_vec_rot_select_zero:
144+
; SSE2-LIS: # %bb.0:
145+
; SSE2-LIS-NEXT: pxor %xmm2, %xmm2
146+
; SSE2-LIS-NEXT: pcmpeqd %xmm1, %xmm2
147+
; SSE2-LIS-NEXT: pslld $23, %xmm1
148+
; SSE2-LIS-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
149+
; SSE2-LIS-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
150+
; SSE2-LIS-NEXT: cvttps2dq %xmm1, %xmm1
151+
; SSE2-LIS-NEXT: movdqa %xmm0, %xmm3
152+
; SSE2-LIS-NEXT: pmuludq %xmm1, %xmm3
153+
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
154+
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3]
155+
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
156+
; SSE2-LIS-NEXT: pmuludq %xmm5, %xmm1
157+
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
158+
; SSE2-LIS-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
159+
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
160+
; SSE2-LIS-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
161+
; SSE2-LIS-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
162+
; SSE2-LIS-NEXT: por %xmm4, %xmm3
163+
; SSE2-LIS-NEXT: pand %xmm2, %xmm0
164+
; SSE2-LIS-NEXT: pandn %xmm3, %xmm2
165+
; SSE2-LIS-NEXT: por %xmm0, %xmm2
166+
; SSE2-LIS-NEXT: movdqa %xmm2, %xmm0
167+
; SSE2-LIS-NEXT: retq
141168
;
142169
; XOP-LABEL: combine_vec_rot_select_zero:
143170
; XOP: # %bb.0:

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