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[ELF] Pass Ctx & to Arch-specific code
1 parent e5f7e73 commit 0dbc85a

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8 files changed

+39
-35
lines changed

8 files changed

+39
-35
lines changed

‎lld/ELF/Arch/ARM.cpp

Lines changed: 14 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -310,7 +310,7 @@ void ARM::addPltHeaderSymbols(InputSection &isec) const {
310310

311311
// Long form PLT entries that do not have any restrictions on the displacement
312312
// of the .plt from the .got.plt.
313-
static void writePltLong(uint8_t *buf, uint64_t gotPltEntryAddr,
313+
static void writePltLong(Ctx &ctx, uint8_t *buf, uint64_t gotPltEntryAddr,
314314
uint64_t pltEntryAddr) {
315315
write32(ctx, buf + 0, 0xe59fc004); // ldr ip, L2
316316
write32(ctx, buf + 4, 0xe08cc00f); // L1: add ip, ip, pc
@@ -339,7 +339,7 @@ void ARM::writePlt(uint8_t *buf, const Symbol &sym,
339339
};
340340
if (!llvm::isUInt<27>(offset)) {
341341
// We cannot encode the Offset, use the long form.
342-
writePltLong(buf, sym.getGotPltVA(ctx), pltEntryAddr);
342+
writePltLong(ctx, buf, sym.getGotPltVA(ctx), pltEntryAddr);
343343
return;
344344
}
345345
write32(ctx, buf + 0, pltData[0] | ((offset >> 20) & 0xff));
@@ -562,8 +562,8 @@ void ARM::encodeAluGroup(uint8_t *loc, const Relocation &rel, uint64_t val,
562562
(read32(ctx, loc) & 0xff3ff000) | opcode | rot | (imm & 0xff));
563563
}
564564

565-
static void encodeLdrGroup(uint8_t *loc, const Relocation &rel, uint64_t val,
566-
int group) {
565+
static void encodeLdrGroup(Ctx &ctx, uint8_t *loc, const Relocation &rel,
566+
uint64_t val, int group) {
567567
// R_ARM_LDR_PC_Gn is S + A - P, we have ((S + A) | T) - P, if S is a
568568
// function then addr is 0 (modulo 2) and Pa is 0 (modulo 4) so we can clear
569569
// bottom bit to recover S + A - P.
@@ -580,8 +580,8 @@ static void encodeLdrGroup(uint8_t *loc, const Relocation &rel, uint64_t val,
580580
write32(ctx, loc, (read32(ctx, loc) & 0xff7ff000) | opcode | imm);
581581
}
582582

583-
static void encodeLdrsGroup(uint8_t *loc, const Relocation &rel, uint64_t val,
584-
int group) {
583+
static void encodeLdrsGroup(Ctx &ctx, uint8_t *loc, const Relocation &rel,
584+
uint64_t val, int group) {
585585
// R_ARM_LDRS_PC_Gn is S + A - P, we have ((S + A) | T) - P, if S is a
586586
// function then addr is 0 (modulo 2) and Pa is 0 (modulo 4) so we can clear
587587
// bottom bit to recover S + A - P.
@@ -804,22 +804,22 @@ void ARM::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
804804
encodeAluGroup(loc, rel, val, 2, true);
805805
break;
806806
case R_ARM_LDR_PC_G0:
807-
encodeLdrGroup(loc, rel, val, 0);
807+
encodeLdrGroup(ctx, loc, rel, val, 0);
808808
break;
809809
case R_ARM_LDR_PC_G1:
810-
encodeLdrGroup(loc, rel, val, 1);
810+
encodeLdrGroup(ctx, loc, rel, val, 1);
811811
break;
812812
case R_ARM_LDR_PC_G2:
813-
encodeLdrGroup(loc, rel, val, 2);
813+
encodeLdrGroup(ctx, loc, rel, val, 2);
814814
break;
815815
case R_ARM_LDRS_PC_G0:
816-
encodeLdrsGroup(loc, rel, val, 0);
816+
encodeLdrsGroup(ctx, loc, rel, val, 0);
817817
break;
818818
case R_ARM_LDRS_PC_G1:
819-
encodeLdrsGroup(loc, rel, val, 1);
819+
encodeLdrsGroup(ctx, loc, rel, val, 1);
820820
break;
821821
case R_ARM_LDRS_PC_G2:
822-
encodeLdrsGroup(loc, rel, val, 2);
822+
encodeLdrsGroup(ctx, loc, rel, val, 2);
823823
break;
824824
case R_ARM_THM_ALU_PREL_11_0: {
825825
// ADR encoding T2 (sub), T3 (add) i:imm3:imm8
@@ -1096,11 +1096,11 @@ static void toLittleEndianInstructions(uint8_t *buf, uint64_t start,
10961096
CodeState curState = static_cast<CodeState>(width);
10971097
if (curState == CodeState::Arm)
10981098
for (uint64_t i = start; i < end; i += width)
1099-
write32le(buf + i, read32(ctx, buf + i));
1099+
write32le(buf + i, read32be(buf + i));
11001100

11011101
if (curState == CodeState::Thumb)
11021102
for (uint64_t i = start; i < end; i += width)
1103-
write16le(buf + i, read16(ctx, buf + i));
1103+
write16le(buf + i, read16be(buf + i));
11041104
}
11051105

11061106
// Arm BE8 big endian format requires instructions to be little endian, with

‎lld/ELF/Arch/LoongArch.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -744,7 +744,7 @@ void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
744744
}
745745
}
746746

747-
static bool relax(InputSection &sec) {
747+
static bool relax(Ctx &ctx, InputSection &sec) {
748748
const uint64_t secAddr = sec.getVA();
749749
const MutableArrayRef<Relocation> relocs = sec.relocs();
750750
auto &aux = *sec.relaxAux;
@@ -833,7 +833,7 @@ bool LoongArch::relaxOnce(int pass) const {
833833
if (!(osec->flags & SHF_EXECINSTR))
834834
continue;
835835
for (InputSection *sec : getInputSections(*osec, storage))
836-
changed |= relax(*sec);
836+
changed |= relax(ctx, *sec);
837837
}
838838
return changed;
839839
}

‎lld/ELF/Arch/Mips.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -248,8 +248,8 @@ static void writeShuffle(Ctx &ctx, uint8_t *loc, uint64_t v, uint8_t bitsSize,
248248
}
249249

250250
template <endianness E>
251-
static void writeMicroRelocation16(uint8_t *loc, uint64_t v, uint8_t bitsSize,
252-
uint8_t shift) {
251+
static void writeMicroRelocation16(Ctx &ctx, uint8_t *loc, uint64_t v,
252+
uint8_t bitsSize, uint8_t shift) {
253253
uint16_t instr = read16(ctx, loc);
254254
uint16_t mask = 0xffff >> (16 - bitsSize);
255255
uint16_t data = (instr & ~mask) | ((v >> shift) & mask);
@@ -519,7 +519,8 @@ static bool isMicroBranchReloc(RelType type) {
519519
}
520520

521521
template <class ELFT>
522-
static uint64_t fixupCrossModeJump(uint8_t *loc, RelType type, uint64_t val) {
522+
static uint64_t fixupCrossModeJump(Ctx &ctx, uint8_t *loc, RelType type,
523+
uint64_t val) {
523524
// Here we need to detect jump/branch from regular MIPS code
524525
// to a microMIPS target and vice versa. In that cases jump
525526
// instructions need to be replaced by their "cross-mode"
@@ -577,7 +578,7 @@ void MIPS<ELFT>::relocate(uint8_t *loc, const Relocation &rel,
577578
std::tie(type, val) = calculateMipsRelChain(ctx, loc, type, val);
578579

579580
// Detect cross-mode jump/branch and fix instruction.
580-
val = fixupCrossModeJump<ELFT>(loc, type, val);
581+
val = fixupCrossModeJump<ELFT>(ctx, loc, type, val);
581582

582583
// Thread pointer and DRP offsets from the start of TLS data area.
583584
// https://www.linux-mips.org/wiki/NPTL
@@ -727,11 +728,11 @@ void MIPS<ELFT>::relocate(uint8_t *loc, const Relocation &rel,
727728
break;
728729
case R_MICROMIPS_PC7_S1:
729730
checkInt(loc, val, 8, rel);
730-
writeMicroRelocation16<e>(loc, val, 7, 1);
731+
writeMicroRelocation16<e>(ctx, loc, val, 7, 1);
731732
break;
732733
case R_MICROMIPS_PC10_S1:
733734
checkInt(loc, val, 11, rel);
734-
writeMicroRelocation16<e>(loc, val, 10, 1);
735+
writeMicroRelocation16<e>(ctx, loc, val, 10, 1);
735736
break;
736737
case R_MICROMIPS_PC16_S1:
737738
checkInt(loc, val, 17, rel);

‎lld/ELF/Arch/PPC64.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1169,7 +1169,8 @@ void PPC64::writePlt(uint8_t *buf, const Symbol &sym,
11691169

11701170
void PPC64::writeIplt(uint8_t *buf, const Symbol &sym,
11711171
uint64_t /*pltEntryAddr*/) const {
1172-
writePPC64LoadAndBranch(buf, sym.getGotPltVA(ctx) - getPPC64TocBase(ctx));
1172+
writePPC64LoadAndBranch(ctx, buf,
1173+
sym.getGotPltVA(ctx) - getPPC64TocBase(ctx));
11731174
}
11741175

11751176
static std::pair<RelType, uint64_t> toAddr16Rel(RelType type, uint64_t val) {

‎lld/ELF/OutputSections.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -458,7 +458,7 @@ template <class ELFT> void OutputSection::maybeCompress(Ctx &ctx) {
458458
flags |= SHF_COMPRESSED;
459459
}
460460

461-
static void writeInt(uint8_t *buf, uint64_t data, uint64_t size) {
461+
static void writeInt(Ctx &ctx, uint8_t *buf, uint64_t data, uint64_t size) {
462462
if (size == 1)
463463
*buf = data;
464464
else if (size == 2)
@@ -563,7 +563,8 @@ void OutputSection::writeTo(Ctx &ctx, uint8_t *buf, parallel::TaskGroup &tg) {
563563
if (auto *data = dyn_cast<ByteCommand>(cmd)) {
564564
if (!std::exchange(written, true))
565565
fn(0, numSections);
566-
writeInt(buf + data->offset, data->expression().getValue(), data->size);
566+
writeInt(ctx, buf + data->offset, data->expression().getValue(),
567+
data->size);
567568
}
568569
if (written || !numSections)
569570
return;

‎lld/ELF/SyntheticSections.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -506,7 +506,7 @@ void EhFrameSection::iterateFDEWithLSDA(
506506
}
507507
}
508508

509-
static void writeCieFde(uint8_t *buf, ArrayRef<uint8_t> d) {
509+
static void writeCieFde(Ctx &ctx, uint8_t *buf, ArrayRef<uint8_t> d) {
510510
memcpy(buf, d.data(), d.size());
511511
// Fix the size field. -4 since size does not include the size field itself.
512512
write32(ctx, buf, d.size() - 4);
@@ -632,11 +632,11 @@ void EhFrameSection::writeTo(uint8_t *buf) {
632632
// Write CIE and FDE records.
633633
for (CieRecord *rec : cieRecords) {
634634
size_t cieOffset = rec->cie->outputOff;
635-
writeCieFde(buf + cieOffset, rec->cie->data());
635+
writeCieFde(ctx, buf + cieOffset, rec->cie->data());
636636

637637
for (EhSectionPiece *fde : rec->fdes) {
638638
size_t off = fde->outputOff;
639-
writeCieFde(buf + off, fde->data());
639+
writeCieFde(ctx, buf + off, fde->data());
640640

641641
// FDE's second word should have the offset to an associated CIE.
642642
// Write it.
@@ -4077,7 +4077,8 @@ static bool isExtabRef(uint32_t unwind) {
40774077
// unwinding instructions in Cur are identical to Prev. Linker generated
40784078
// EXIDX_CANTUNWIND entries are represented by nullptr as they do not have an
40794079
// InputSection.
4080-
static bool isDuplicateArmExidxSec(InputSection *prev, InputSection *cur) {
4080+
static bool isDuplicateArmExidxSec(Ctx &ctx, InputSection *prev,
4081+
InputSection *cur) {
40814082
// Get the last table Entry from the previous .ARM.exidx section. If Prev is
40824083
// nullptr then it will be a synthesized EXIDX_CANTUNWIND entry.
40834084
uint32_t prevUnwind = 1;
@@ -4166,7 +4167,7 @@ void ARMExidxSyntheticSection::finalizeContents() {
41664167
for (size_t i = 1; i < executableSections.size(); ++i) {
41674168
InputSection *ex1 = findExidxSection(executableSections[prev]);
41684169
InputSection *ex2 = findExidxSection(executableSections[i]);
4169-
if (!isDuplicateArmExidxSec(ex1, ex2)) {
4170+
if (!isDuplicateArmExidxSec(ctx, ex1, ex2)) {
41704171
selectedSections.push_back(executableSections[i]);
41714172
prev = i;
41724173
}

‎lld/ELF/Thunks.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1232,7 +1232,7 @@ void PPC32LongThunk::writeTo(uint8_t *buf) {
12321232
write32(ctx, buf + 4, 0x4e800420); // bctr
12331233
}
12341234

1235-
void elf::writePPC64LoadAndBranch(uint8_t *buf, int64_t offset) {
1235+
void elf::writePPC64LoadAndBranch(Ctx &ctx, uint8_t *buf, int64_t offset) {
12361236
uint16_t offHa = (offset + 0x8000) >> 16;
12371237
uint16_t offLo = offset & 0xffff;
12381238

@@ -1246,7 +1246,7 @@ void PPC64PltCallStub::writeTo(uint8_t *buf) {
12461246
int64_t offset = destination.getGotPltVA(ctx) - getPPC64TocBase(ctx);
12471247
// Save the TOC pointer to the save-slot reserved in the call frame.
12481248
write32(ctx, buf + 0, 0xf8410018); // std r2,24(r1)
1249-
writePPC64LoadAndBranch(buf + 4, offset);
1249+
writePPC64LoadAndBranch(ctx, buf + 4, offset);
12501250
}
12511251

12521252
void PPC64PltCallStub::addSymbols(ThunkSection &isec) {
@@ -1289,7 +1289,7 @@ void PPC64R2SaveStub::writeTo(uint8_t *buf) {
12891289
const int64_t offsetFromTOC =
12901290
ctx.in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
12911291
getPPC64TocBase(ctx);
1292-
writePPC64LoadAndBranch(buf + 4, offsetFromTOC);
1292+
writePPC64LoadAndBranch(ctx, buf + 4, offsetFromTOC);
12931293
}
12941294
}
12951295

@@ -1352,7 +1352,7 @@ void PPC64LongBranchThunk::writeTo(uint8_t *buf) {
13521352
int64_t offset =
13531353
ctx.in.ppc64LongBranchTarget->getEntryVA(&destination, addend) -
13541354
getPPC64TocBase(ctx);
1355-
writePPC64LoadAndBranch(buf, offset);
1355+
writePPC64LoadAndBranch(ctx, buf, offset);
13561356
}
13571357

13581358
void PPC64LongBranchThunk::addSymbols(ThunkSection &isec) {

‎lld/ELF/Thunks.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,7 @@ Thunk *addLandingPadThunk(Ctx &, Symbol &s, int64_t a);
8484

8585
void writePPC32PltCallStub(Ctx &, uint8_t *buf, uint64_t gotPltVA,
8686
const InputFile *file, int64_t addend);
87-
void writePPC64LoadAndBranch(uint8_t *buf, int64_t offset);
87+
void writePPC64LoadAndBranch(Ctx &, uint8_t *buf, int64_t offset);
8888

8989
} // namespace lld::elf
9090

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