@@ -621,7 +621,7 @@ def CountBits : DXILOp<31, unaryBits> {
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def FirstbitHi : DXILOp<33, unaryBits> {
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let Doc = "Returns the location of the first set bit starting from "
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"the highest order bit and working downward.";
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- let LLVMIntrinsic = int_dx_firstbituhigh;
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+ let intrinsics = [ IntrinSelect< int_dx_firstbituhigh> ] ;
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let arguments = [OverloadTy];
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let result = Int32Ty;
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let overloads =
@@ -633,7 +633,7 @@ def FirstbitHi : DXILOp<33, unaryBits> {
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def FirstbitSHi : DXILOp<34, unaryBits> {
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let Doc = "Returns the location of the first set bit from "
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"the highest order bit based on the sign.";
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- let LLVMIntrinsic = int_dx_firstbitshigh;
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+ let intrinsics = [ IntrinSelect< int_dx_firstbitshigh> ] ;
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let arguments = [OverloadTy];
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let result = Int32Ty;
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let overloads =
@@ -826,7 +826,7 @@ def CheckAccessFullyMapped : DXILOp<71, checkAccessFullyMapped> {
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def Discard : DXILOp<82, discard> {
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let Doc = "discard the current pixel";
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- let LLVMIntrinsic = int_dx_discard;
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+ let intrinsics = [ IntrinSelect< int_dx_discard> ] ;
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let arguments = [Int1Ty];
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let result = VoidTy;
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let stages = [Stages<DXIL1_0, [pixel]>];
@@ -874,7 +874,7 @@ def FlattenedThreadIdInGroup : DXILOp<96, flattenedThreadIdInGroup> {
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def MakeDouble : DXILOp<101, makeDouble> {
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let Doc = "creates a double value";
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- let LLVMIntrinsic = int_dx_asdouble;
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+ let intrinsics = [ IntrinSelect< int_dx_asdouble> ] ;
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let arguments = [Int32Ty, Int32Ty];
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let result = DoubleTy;
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let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -893,7 +893,7 @@ def SplitDouble : DXILOp<102, splitDouble> {
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def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
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let Doc = "signed dot product of 4 x i8 vectors packed into i32, with "
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"accumulate to i32";
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- let LLVMIntrinsic = int_dx_dot4add_i8packed;
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+ let intrinsics = [ IntrinSelect< int_dx_dot4add_i8packed> ] ;
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let arguments = [Int32Ty, Int32Ty, Int32Ty];
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let result = Int32Ty;
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let attributes = [Attributes<DXIL1_0, [ReadNone]>];
@@ -903,7 +903,7 @@ def Dot4AddI8Packed : DXILOp<163, dot4AddPacked> {
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def Dot4AddU8Packed : DXILOp<164, dot4AddPacked> {
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let Doc = "unsigned dot product of 4 x i8 vectors packed into i32, with "
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"accumulate to i32";
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- let LLVMIntrinsic = int_dx_dot4add_u8packed;
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+ let intrinsics = [ IntrinSelect< int_dx_dot4add_u8packed> ] ;
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let arguments = [Int32Ty, Int32Ty, Int32Ty];
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let result = Int32Ty;
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let attributes = [Attributes<DXIL1_0, [ReadNone]>];
@@ -926,7 +926,7 @@ def CreateHandleFromBinding : DXILOp<217, createHandleFromBinding> {
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def WaveActiveAnyTrue : DXILOp<113, waveAnyTrue> {
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let Doc = "returns true if the expression is true in any of the active lanes in the current wave";
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- let LLVMIntrinsic = int_dx_wave_any;
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+ let intrinsics = [ IntrinSelect< int_dx_wave_any> ] ;
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let arguments = [Int1Ty];
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let result = Int1Ty;
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let stages = [Stages<DXIL1_0, [all_stages]>];
@@ -962,11 +962,12 @@ def WaveGetLaneIndex : DXILOp<111, waveGetLaneIndex> {
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def WaveAllBitCount : DXILOp<135, waveAllOp> {
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let Doc = "returns the count of bits set to 1 across the wave";
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- let LLVMIntrinsic = int_dx_wave_active_countbits;
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+ let intrinsics = [ IntrinSelect< int_dx_wave_active_countbits> ] ;
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let arguments = [Int1Ty];
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let result = Int32Ty;
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let stages = [Stages<DXIL1_0, [all_stages]>];
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let attributes = [Attributes<DXIL1_0, [ReadNone]>];
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+ }
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def Barrier : DXILOp<80, barrier> {
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let Doc = "inserts a memory barrier in the shader";
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