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Chen Zheng
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[PowerPC] add TargetParser for PPC target (#97541)
For now only focus on the CPU type, will work on the CPU features part later. With the CPU handling in TargetParser, clang and llc/opt are able to query common interfaces. So we can set same default CPU and CPU features with same interfaces.
1 parent 8608cc1 commit 25482b3

13 files changed

Lines changed: 324 additions & 163 deletions

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‎clang/lib/Basic/Targets/PPC.cpp‎

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#include "clang/Basic/Diagnostic.h"
1515
#include "clang/Basic/MacroBuilder.h"
1616
#include "clang/Basic/TargetBuiltins.h"
17+
#include "llvm/TargetParser/PPCTargetParser.h"
1718

1819
using namespace clang;
1920
using namespace clang::targets;
@@ -882,25 +883,12 @@ ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
882883
return llvm::ArrayRef(GCCAddlRegNames);
883884
}
884885

885-
static constexpr llvm::StringLiteral ValidCPUNames[] = {
886-
{"generic"}, {"440"}, {"450"}, {"601"}, {"602"},
887-
{"603"}, {"603e"}, {"603ev"}, {"604"}, {"604e"},
888-
{"620"}, {"630"}, {"g3"}, {"7400"}, {"g4"},
889-
{"7450"}, {"g4+"}, {"750"}, {"8548"}, {"970"},
890-
{"g5"}, {"a2"}, {"e500"}, {"e500mc"}, {"e5500"},
891-
{"power3"}, {"pwr3"}, {"power4"}, {"pwr4"}, {"power5"},
892-
{"pwr5"}, {"power5x"}, {"pwr5x"}, {"power6"}, {"pwr6"},
893-
{"power6x"}, {"pwr6x"}, {"power7"}, {"pwr7"}, {"power8"},
894-
{"pwr8"}, {"power9"}, {"pwr9"}, {"power10"}, {"pwr10"},
895-
{"power11"}, {"pwr11"}, {"powerpc"}, {"ppc"}, {"ppc32"},
896-
{"powerpc64"}, {"ppc64"}, {"powerpc64le"}, {"ppc64le"}, {"future"}};
897-
898886
bool PPCTargetInfo::isValidCPUName(StringRef Name) const {
899-
return llvm::is_contained(ValidCPUNames, Name);
887+
return llvm::PPC::isValidCPU(Name);
900888
}
901889

902890
void PPCTargetInfo::fillValidCPUList(SmallVectorImpl<StringRef> &Values) const {
903-
Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
891+
llvm::PPC::fillValidCPUList(Values);
904892
}
905893

906894
void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {

‎clang/lib/Driver/ToolChains/Arch/PPC.cpp‎

Lines changed: 0 additions & 73 deletions
Original file line numberDiff line numberDiff line change
@@ -20,79 +20,6 @@ using namespace clang::driver::tools;
2020
using namespace clang;
2121
using namespace llvm::opt;
2222

23-
static std::string getPPCGenericTargetCPU(const llvm::Triple &T) {
24-
// LLVM may default to generating code for the native CPU,
25-
// but, like gcc, we default to a more generic option for
26-
// each architecture. (except on AIX)
27-
if (T.isOSAIX())
28-
return "pwr7";
29-
else if (T.getArch() == llvm::Triple::ppc64le)
30-
return "ppc64le";
31-
else if (T.getArch() == llvm::Triple::ppc64)
32-
return "ppc64";
33-
else
34-
return "ppc";
35-
}
36-
37-
static std::string normalizeCPUName(StringRef CPUName, const llvm::Triple &T) {
38-
// Clang/LLVM does not actually support code generation
39-
// for the 405 CPU. However, there are uses of this CPU ID
40-
// in projects that previously used GCC and rely on Clang
41-
// accepting it. Clang has always ignored it and passed the
42-
// generic CPU ID to the back end.
43-
if (CPUName == "generic" || CPUName == "405")
44-
return getPPCGenericTargetCPU(T);
45-
46-
if (CPUName == "native") {
47-
std::string CPU = std::string(llvm::sys::getHostCPUName());
48-
if (!CPU.empty() && CPU != "generic")
49-
return CPU;
50-
else
51-
return getPPCGenericTargetCPU(T);
52-
}
53-
54-
return llvm::StringSwitch<const char *>(CPUName)
55-
.Case("common", "generic")
56-
.Case("440fp", "440")
57-
.Case("630", "pwr3")
58-
.Case("G3", "g3")
59-
.Case("G4", "g4")
60-
.Case("G4+", "g4+")
61-
.Case("8548", "e500")
62-
.Case("G5", "g5")
63-
.Case("power3", "pwr3")
64-
.Case("power4", "pwr4")
65-
.Case("power5", "pwr5")
66-
.Case("power5x", "pwr5x")
67-
.Case("power6", "pwr6")
68-
.Case("power6x", "pwr6x")
69-
.Case("power7", "pwr7")
70-
.Case("power8", "pwr8")
71-
.Case("power9", "pwr9")
72-
.Case("power10", "pwr10")
73-
.Case("power11", "pwr11")
74-
.Case("future", "future")
75-
.Case("powerpc", "ppc")
76-
.Case("powerpc64", "ppc64")
77-
.Case("powerpc64le", "ppc64le")
78-
.Default(CPUName.data());
79-
}
80-
81-
/// Get the (LLVM) name of the PowerPC cpu we are tuning for.
82-
std::string ppc::getPPCTuneCPU(const ArgList &Args, const llvm::Triple &T) {
83-
if (Arg *A = Args.getLastArg(clang::driver::options::OPT_mtune_EQ))
84-
return normalizeCPUName(A->getValue(), T);
85-
return getPPCGenericTargetCPU(T);
86-
}
87-
88-
/// Get the (LLVM) name of the PowerPC cpu we are targeting.
89-
std::string ppc::getPPCTargetCPU(const Driver &D, const ArgList &Args,
90-
const llvm::Triple &T) {
91-
if (Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
92-
return normalizeCPUName(A->getValue(), T);
93-
return getPPCGenericTargetCPU(T);
94-
}
95-
9623
const char *ppc::getPPCAsmModeForCPU(StringRef Name) {
9724
return llvm::StringSwitch<const char *>(Name)
9825
.Case("pwr7", "-mpower7")

‎clang/lib/Driver/ToolChains/Arch/PPC.h‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -35,10 +35,6 @@ enum class ReadGOTPtrMode {
3535

3636
FloatABI getPPCFloatABI(const Driver &D, const llvm::opt::ArgList &Args);
3737

38-
std::string getPPCTargetCPU(const Driver &D, const llvm::opt::ArgList &Args,
39-
const llvm::Triple &T);
40-
std::string getPPCTuneCPU(const llvm::opt::ArgList &Args,
41-
const llvm::Triple &T);
4238
const char *getPPCAsmModeForCPU(StringRef Name);
4339
ReadGOTPtrMode getPPCReadGOTPtrMode(const Driver &D, const llvm::Triple &Triple,
4440
const llvm::opt::ArgList &Args);

‎clang/lib/Driver/ToolChains/Clang.cpp‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@
6060
#include "llvm/TargetParser/ARMTargetParserCommon.h"
6161
#include "llvm/TargetParser/Host.h"
6262
#include "llvm/TargetParser/LoongArchTargetParser.h"
63+
#include "llvm/TargetParser/PPCTargetParser.h"
6364
#include "llvm/TargetParser/RISCVISAInfo.h"
6465
#include "llvm/TargetParser/RISCVTargetParser.h"
6566
#include <cctype>
@@ -2026,10 +2027,10 @@ void Clang::AddPPCTargetArgs(const ArgList &Args,
20262027
ArgStringList &CmdArgs) const {
20272028
const Driver &D = getToolChain().getDriver();
20282029
const llvm::Triple &T = getToolChain().getTriple();
2029-
if (Args.getLastArg(options::OPT_mtune_EQ)) {
2030+
if (Arg *A = Args.getLastArg(options::OPT_mtune_EQ)) {
20302031
CmdArgs.push_back("-tune-cpu");
2031-
std::string CPU = ppc::getPPCTuneCPU(Args, T);
2032-
CmdArgs.push_back(Args.MakeArgString(CPU));
2032+
StringRef CPU = llvm::PPC::getNormalizedPPCTuneCPU(T, A->getValue());
2033+
CmdArgs.push_back(Args.MakeArgString(CPU.str()));
20332034
}
20342035

20352036
// Select the ABI to use.

‎clang/lib/Driver/ToolChains/CommonArgs.cpp‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,7 @@
6464
#include "llvm/Support/VirtualFileSystem.h"
6565
#include "llvm/Support/YAMLParser.h"
6666
#include "llvm/TargetParser/Host.h"
67+
#include "llvm/TargetParser/PPCTargetParser.h"
6768
#include "llvm/TargetParser/TargetParser.h"
6869
#include <optional>
6970

@@ -634,7 +635,10 @@ std::string tools::getCPUName(const Driver &D, const ArgList &Args,
634635
case llvm::Triple::ppcle:
635636
case llvm::Triple::ppc64:
636637
case llvm::Triple::ppc64le:
637-
return ppc::getPPCTargetCPU(D, Args, T);
638+
if (Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
639+
return std::string(
640+
llvm::PPC::getNormalizedPPCTargetCPU(T, A->getValue()));
641+
return std::string(llvm::PPC::getNormalizedPPCTargetCPU(T));
638642

639643
case llvm::Triple::csky:
640644
if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ))

‎clang/test/CodeGen/aix-builtin-cpu-is.c‎

Lines changed: 25 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,52 +1,60 @@
1-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc970\");}" > %t.c
1+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc970\");}" > %t.c
22
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
33

4-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc-cell-be\");}" > %t.c
4+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc-cell-be\");}" > %t.c
55
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
66

7-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppca2\");}" > %t.c
7+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppca2\");}" > %t.c
88
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
99

10-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc405\");}" > %t.c
10+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc405\");}" > %t.c
1111
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
1212

13-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc440\");}" > %t.c
13+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc440\");}" > %t.c
1414
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
1515

16-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc464\");}" > %t.c
16+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc464\");}" > %t.c
1717
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
1818

19-
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc476\");}" > %t.c
19+
// RUN: echo "int main() { return __builtin_cpu_is(\"ppc476\");}" > %t.c
2020
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
2121

22-
// RUN: echo "int main() { return __builtin_cpu_is(\"power4\");}" > %t.c
22+
// RUN: echo "int main() { return __builtin_cpu_is(\"power4\");}" > %t.c
2323
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
2424

25-
// RUN: echo "int main() { return __builtin_cpu_is(\"power5\");}" > %t.c
25+
// RUN: echo "int main() { return __builtin_cpu_is(\"power5\");}" > %t.c
2626
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
2727

28-
// RUN: echo "int main() { return __builtin_cpu_is(\"power5+\");}" > %t.c
28+
// RUN: echo "int main() { return __builtin_cpu_is(\"power5+\");}" > %t.c
2929
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
3030

31-
// RUN: echo "int main() { return __builtin_cpu_is(\"power6\");}" > %t.c
31+
// RUN: echo "int main() { return __builtin_cpu_is(\"power6\");}" > %t.c
3232
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
3333

34-
// RUN: echo "int main() { return __builtin_cpu_is(\"power6x\");}" > %t.c
34+
// RUN: echo "int main() { return __builtin_cpu_is(\"power6x\");}" > %t.c
3535
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s
3636

37-
// RUN: echo "int main() { return __builtin_cpu_is(\"power7\");}" > %t.c
37+
// RUN: echo "int main() { return __builtin_cpu_is(\"power7\");}" > %t.c
3838
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DVALUE=32768 \
3939
// RUN: --check-prefix=CHECKOP
4040

41-
// RUN: echo "int main() { return __builtin_cpu_is(\"power8\");}" > %t.c
41+
// RUN: echo "int main() { return __builtin_cpu_is(\"pwr7\");}" > %t.c
42+
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DVALUE=32768 \
43+
// RUN: --check-prefix=CHECKOP
44+
45+
// RUN: echo "int main() { return __builtin_cpu_is(\"power8\");}" > %t.c
4246
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DVALUE=65536 \
4347
// RUN: --check-prefix=CHECKOP
4448

45-
// RUN: echo "int main() { return __builtin_cpu_is(\"power9\");}" > %t.c
49+
// RUN: echo "int main() { return __builtin_cpu_is(\"power9\");}" > %t.c
4650
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DVALUE=131072\
4751
// RUN: --check-prefix=CHECKOP
4852

49-
// RUN: echo "int main() { return __builtin_cpu_is(\"power10\");}" > %t.c
53+
// RUN: echo "int main() { return __builtin_cpu_is(\"power10\");}" > %t.c
54+
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DVALUE=262144 \
55+
// RUN: --check-prefix=CHECKOP
56+
57+
// RUN: echo "int main() { return __builtin_cpu_is(\"pwr10\");}" > %t.c
5058
// RUN: %clang_cc1 -triple powerpc-ibm-aix7.2.0.0 -emit-llvm -o - %t.c | FileCheck %s -DVALUE=262144 \
5159
// RUN: --check-prefix=CHECKOP
5260

@@ -67,7 +75,7 @@
6775
// CHECKOP-NEXT: %retval = alloca i32, align 4
6876
// CHECKOP-NEXT: store i32 0, ptr %retval, align 4
6977
// CHECKOP-NEXT: %0 = load i32, ptr getelementptr inbounds ({ i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i64, i32, i32, i32, i32, i64, i64, i64, i64, i32, i32, i32, i32, i32, i32, i64, i32, i8, i8, i8, i8, i32, i32, i16, i16, [3 x i32], i32 }, ptr @_system_configuration, i32 0, i32 1), align 4
70-
// CHECKOP-NEXT: %1 = icmp eq i32 %0, [[VALUE]]
78+
// CHECKOP-NEXT: %1 = icmp eq i32 %0, [[VALUE]]
7179
// CHECKOP-NEXT: %conv = zext i1 %1 to i32
7280
// CHECKOP-NEXT: ret i32 %conv
7381
// CHECKOP-NEXT: }

‎clang/test/CodeGen/builtin-cpu-supports.c‎

Lines changed: 68 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -143,60 +143,82 @@ int v4() { return __builtin_cpu_supports("x86-64-v4"); }
143143
// CHECK-PPC-NEXT: br label [[RETURN]]
144144
// CHECK-PPC: if.else5:
145145
// CHECK-PPC-NEXT: [[CPU_IS6:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
146-
// CHECK-PPC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[CPU_IS6]], 45
147-
// CHECK-PPC-NEXT: br i1 [[TMP9]], label [[IF_THEN7:%.*]], label [[IF_ELSE9:%.*]]
146+
// CHECK-PPC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[CPU_IS6]], 39
147+
// CHECK-PPC-NEXT: br i1 [[TMP9]], label [[IF_THEN7:%.*]], label [[IF_ELSE8:%.*]]
148148
// CHECK-PPC: if.then7:
149149
// CHECK-PPC-NEXT: [[TMP10:%.*]] = load i32, ptr [[A_ADDR]], align 4
150-
// CHECK-PPC-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP10]], 3
151-
// CHECK-PPC-NEXT: store i32 [[ADD8]], ptr [[RETVAL]], align 4
150+
// CHECK-PPC-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 3
151+
// CHECK-PPC-NEXT: store i32 [[MUL]], ptr [[RETVAL]], align 4
152152
// CHECK-PPC-NEXT: br label [[RETURN]]
153-
// CHECK-PPC: if.else9:
154-
// CHECK-PPC-NEXT: [[CPU_IS10:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
155-
// CHECK-PPC-NEXT: [[TMP11:%.*]] = icmp eq i32 [[CPU_IS10]], 46
156-
// CHECK-PPC-NEXT: br i1 [[TMP11]], label [[IF_THEN11:%.*]], label [[IF_ELSE13:%.*]]
157-
// CHECK-PPC: if.then11:
153+
// CHECK-PPC: if.else8:
154+
// CHECK-PPC-NEXT: [[CPU_IS9:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
155+
// CHECK-PPC-NEXT: [[TMP11:%.*]] = icmp eq i32 [[CPU_IS9]], 33
156+
// CHECK-PPC-NEXT: br i1 [[TMP11]], label [[IF_THEN10:%.*]], label [[IF_ELSE12:%.*]]
157+
// CHECK-PPC: if.then10:
158158
// CHECK-PPC-NEXT: [[TMP12:%.*]] = load i32, ptr [[A_ADDR]], align 4
159-
// CHECK-PPC-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP12]], 3
160-
// CHECK-PPC-NEXT: store i32 [[SUB12]], ptr [[RETVAL]], align 4
159+
// CHECK-PPC-NEXT: [[MUL11:%.*]] = mul nsw i32 [[TMP12]], 4
160+
// CHECK-PPC-NEXT: store i32 [[MUL11]], ptr [[RETVAL]], align 4
161161
// CHECK-PPC-NEXT: br label [[RETURN]]
162-
// CHECK-PPC: if.else13:
163-
// CHECK-PPC-NEXT: [[CPU_IS14:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
164-
// CHECK-PPC-NEXT: [[TMP13:%.*]] = icmp eq i32 [[CPU_IS14]], 47
165-
// CHECK-PPC-NEXT: br i1 [[TMP13]], label [[IF_THEN15:%.*]], label [[IF_ELSE17:%.*]]
166-
// CHECK-PPC: if.then15:
162+
// CHECK-PPC: if.else12:
163+
// CHECK-PPC-NEXT: [[CPU_IS13:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
164+
// CHECK-PPC-NEXT: [[TMP13:%.*]] = icmp eq i32 [[CPU_IS13]], 45
165+
// CHECK-PPC-NEXT: br i1 [[TMP13]], label [[IF_THEN14:%.*]], label [[IF_ELSE16:%.*]]
166+
// CHECK-PPC: if.then14:
167167
// CHECK-PPC-NEXT: [[TMP14:%.*]] = load i32, ptr [[A_ADDR]], align 4
168-
// CHECK-PPC-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP14]], 7
169-
// CHECK-PPC-NEXT: store i32 [[ADD16]], ptr [[RETVAL]], align 4
168+
// CHECK-PPC-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP14]], 3
169+
// CHECK-PPC-NEXT: store i32 [[ADD15]], ptr [[RETVAL]], align 4
170170
// CHECK-PPC-NEXT: br label [[RETURN]]
171-
// CHECK-PPC: if.else17:
172-
// CHECK-PPC-NEXT: [[CPU_IS18:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
173-
// CHECK-PPC-NEXT: [[TMP15:%.*]] = icmp eq i32 [[CPU_IS18]], 48
174-
// CHECK-PPC-NEXT: br i1 [[TMP15]], label [[IF_THEN19:%.*]], label [[IF_END:%.*]]
175-
// CHECK-PPC: if.then19:
171+
// CHECK-PPC: if.else16:
172+
// CHECK-PPC-NEXT: [[CPU_IS17:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
173+
// CHECK-PPC-NEXT: [[TMP15:%.*]] = icmp eq i32 [[CPU_IS17]], 46
174+
// CHECK-PPC-NEXT: br i1 [[TMP15]], label [[IF_THEN18:%.*]], label [[IF_ELSE20:%.*]]
175+
// CHECK-PPC: if.then18:
176176
// CHECK-PPC-NEXT: [[TMP16:%.*]] = load i32, ptr [[A_ADDR]], align 4
177-
// CHECK-PPC-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP16]], 7
178-
// CHECK-PPC-NEXT: store i32 [[SUB20]], ptr [[RETVAL]], align 4
177+
// CHECK-PPC-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP16]], 3
178+
// CHECK-PPC-NEXT: store i32 [[SUB19]], ptr [[RETVAL]], align 4
179+
// CHECK-PPC-NEXT: br label [[RETURN]]
180+
// CHECK-PPC: if.else20:
181+
// CHECK-PPC-NEXT: [[CPU_IS21:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
182+
// CHECK-PPC-NEXT: [[TMP17:%.*]] = icmp eq i32 [[CPU_IS21]], 47
183+
// CHECK-PPC-NEXT: br i1 [[TMP17]], label [[IF_THEN22:%.*]], label [[IF_ELSE24:%.*]]
184+
// CHECK-PPC: if.then22:
185+
// CHECK-PPC-NEXT: [[TMP18:%.*]] = load i32, ptr [[A_ADDR]], align 4
186+
// CHECK-PPC-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP18]], 7
187+
// CHECK-PPC-NEXT: store i32 [[ADD23]], ptr [[RETVAL]], align 4
188+
// CHECK-PPC-NEXT: br label [[RETURN]]
189+
// CHECK-PPC: if.else24:
190+
// CHECK-PPC-NEXT: [[CPU_IS25:%.*]] = call i32 @llvm.ppc.fixed.addr.ld(i32 3)
191+
// CHECK-PPC-NEXT: [[TMP19:%.*]] = icmp eq i32 [[CPU_IS25]], 48
192+
// CHECK-PPC-NEXT: br i1 [[TMP19]], label [[IF_THEN26:%.*]], label [[IF_END:%.*]]
193+
// CHECK-PPC: if.then26:
194+
// CHECK-PPC-NEXT: [[TMP20:%.*]] = load i32, ptr [[A_ADDR]], align 4
195+
// CHECK-PPC-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP20]], 7
196+
// CHECK-PPC-NEXT: store i32 [[SUB27]], ptr [[RETVAL]], align 4
179197
// CHECK-PPC-NEXT: br label [[RETURN]]
180198
// CHECK-PPC: if.end:
181-
// CHECK-PPC-NEXT: br label [[IF_END21:%.*]]
182-
// CHECK-PPC: if.end21:
183-
// CHECK-PPC-NEXT: br label [[IF_END22:%.*]]
184-
// CHECK-PPC: if.end22:
185-
// CHECK-PPC-NEXT: br label [[IF_END23:%.*]]
186-
// CHECK-PPC: if.end23:
187-
// CHECK-PPC-NEXT: br label [[IF_END24:%.*]]
188-
// CHECK-PPC: if.end24:
189-
// CHECK-PPC-NEXT: br label [[IF_END25:%.*]]
190-
// CHECK-PPC: if.end25:
191-
// CHECK-PPC-NEXT: br label [[IF_END26:%.*]]
192-
// CHECK-PPC: if.end26:
193-
// CHECK-PPC-NEXT: [[TMP17:%.*]] = load i32, ptr [[A_ADDR]], align 4
194-
// CHECK-PPC-NEXT: [[ADD27:%.*]] = add nsw i32 [[TMP17]], 5
195-
// CHECK-PPC-NEXT: store i32 [[ADD27]], ptr [[RETVAL]], align 4
199+
// CHECK-PPC-NEXT: br label [[IF_END28:%.*]]
200+
// CHECK-PPC: if.end28:
201+
// CHECK-PPC-NEXT: br label [[IF_END29:%.*]]
202+
// CHECK-PPC: if.end29:
203+
// CHECK-PPC-NEXT: br label [[IF_END30:%.*]]
204+
// CHECK-PPC: if.end30:
205+
// CHECK-PPC-NEXT: br label [[IF_END31:%.*]]
206+
// CHECK-PPC: if.end31:
207+
// CHECK-PPC-NEXT: br label [[IF_END32:%.*]]
208+
// CHECK-PPC: if.end32:
209+
// CHECK-PPC-NEXT: br label [[IF_END33:%.*]]
210+
// CHECK-PPC: if.end33:
211+
// CHECK-PPC-NEXT: br label [[IF_END34:%.*]]
212+
// CHECK-PPC: if.end34:
213+
// CHECK-PPC-NEXT: br label [[IF_END35:%.*]]
214+
// CHECK-PPC: if.end35:
215+
// CHECK-PPC-NEXT: [[TMP21:%.*]] = load i32, ptr [[A_ADDR]], align 4
216+
// CHECK-PPC-NEXT: [[ADD36:%.*]] = add nsw i32 [[TMP21]], 5
217+
// CHECK-PPC-NEXT: store i32 [[ADD36]], ptr [[RETVAL]], align 4
196218
// CHECK-PPC-NEXT: br label [[RETURN]]
197219
// CHECK-PPC: return:
198-
// CHECK-PPC-NEXT: [[TMP18:%.*]] = load i32, ptr [[RETVAL]], align 4
199-
// CHECK-PPC-NEXT: ret i32 [[TMP18]]
220+
// CHECK-PPC-NEXT: [[TMP22:%.*]] = load i32, ptr [[RETVAL]], align 4
221+
// CHECK-PPC-NEXT: ret i32 [[TMP22]]
200222
//
201223
int test_ppc(int a) {
202224
if (__builtin_cpu_supports("arch_3_00")) // HWCAP2
@@ -205,6 +227,10 @@ int test_ppc(int a) {
205227
return a - 5;
206228
else if (__builtin_cpu_is("power7")) // CPUID
207229
return a + a;
230+
else if (__builtin_cpu_is("pwr7")) // CPUID
231+
return a * 3;
232+
else if (__builtin_cpu_is("ppc970")) // CPUID
233+
return a * 4;
208234
else if (__builtin_cpu_is("power8"))
209235
return a + 3;
210236
else if (__builtin_cpu_is("power9"))

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