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llvm/lib/Target/RISCV/RISCVSchedMIPSP8700.td

Lines changed: 3 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,6 @@ def p8700WriteEitherALU : ProcResGroup<[p8700ALQ, p8700IssueAL2]>;
4141
def p8700GpDiv : ProcResource<1>;
4242
def p8700GpMul : ProcResource<1>;
4343

44-
let Latency = 1 in {
4544
def : WriteRes<WriteIALU, [p8700WriteEitherALU]>;
4645
def : WriteRes<WriteIALU32, [p8700WriteEitherALU]>;
4746
def : WriteRes<WriteShiftImm, [p8700WriteEitherALU]>;
@@ -52,7 +51,6 @@ def : WriteRes<WriteShiftReg32, [p8700WriteEitherALU]>;
5251
// Handle zba.
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def : WriteRes<WriteSHXADD, [p8700WriteEitherALU]>;
5453
def : WriteRes<WriteSHXADD32, [p8700WriteEitherALU]>;
55-
}
5654

5755
// Handle zbb.
5856
let Latency = 2 in {
@@ -63,15 +61,13 @@ def : WriteRes<WriteCLZ32, [p8700IssueAL2]>;
6361
def : WriteRes<WriteCTZ32, [p8700IssueAL2]>;
6462
def : WriteRes<WriteCPOP32, [p8700IssueAL2]>;
6563
}
66-
let Latency = 1 in {
6764
def : WriteRes<WriteRotateReg, [p8700WriteEitherALU]>;
6865
def : WriteRes<WriteRotateImm, [p8700WriteEitherALU]>;
6966
def : WriteRes<WriteRotateReg32, [p8700WriteEitherALU]>;
7067
def : WriteRes<WriteRotateImm32, [p8700WriteEitherALU]>;
7168
def : WriteRes<WriteREV8, [p8700WriteEitherALU]>;
7269
def : WriteRes<WriteORCB, [p8700WriteEitherALU]>;
7370
def : WriteRes<WriteIMinMax, [p8700WriteEitherALU]>;
74-
}
7571

7672
let Latency = 0 in {
7773
def : WriteRes<WriteNop, [p8700WriteEitherALU]>;
@@ -104,10 +100,8 @@ def : WriteRes<WriteAtomicSTW, [p8700IssueLSU]>;
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def : WriteRes<WriteAtomicSTD, [p8700IssueLSU]>;
105101
}
106102

107-
let Latency = 1 in {
108103
def : WriteRes<WriteFST32, [p8700IssueLSU]>;
109104
def : WriteRes<WriteFST64, [p8700IssueLSU]>;
110-
}
111105

112106
let Latency = 7 in {
113107
def : WriteRes<WriteFMovI32ToF32, [p8700IssueLSU]>;
@@ -121,7 +115,7 @@ def : WriteRes<WriteIMul, [p8700GpMul]>;
121115
def : WriteRes<WriteIMul32, [p8700GpMul]>;
122116
}
123117

124-
let Latency = 8, ReleaseAtCycles = [5] in {
118+
let Latency = 7, ReleaseAtCycles = [7] in {
125119
def : WriteRes<WriteIDiv, [p8700GpDiv]>;
126120
def : WriteRes<WriteIDiv32, [p8700GpDiv]>;
127121
}
@@ -132,10 +126,8 @@ def : WriteRes<WriteIRem, []>;
132126
def : WriteRes<WriteIRem32, []>;
133127

134128
// Handle CTI Pipeline.
135-
let Latency = 1 in {
136129
def : WriteRes<WriteJmp, [p8700IssueCTI]>;
137130
def : WriteRes<WriteJalr, [p8700IssueCTI]>;
138-
}
139131
let Latency = 2 in {
140132
def : WriteRes<WriteJal, [p8700IssueCTI]>;
141133
def : WriteRes<WriteJalr, [p8700IssueCTI]>;
@@ -145,8 +137,8 @@ def : WriteRes<WriteJalr, [p8700IssueCTI]>;
145137
def p8700FPQ : ProcResource<3> { let BufferSize = 16; }
146138
def p8700IssueFPUS : ProcResource<1> { let Super = p8700FPQ; }
147139
def p8700IssueFPUL : ProcResource<1> { let Super = p8700FPQ; }
148-
def p8700FpuApu : ProcResource<1>;
149-
def p8700FpuLong : ProcResource<1>;
140+
def p8700FpuApu : ProcResource<1>;
141+
def p8700FpuLong : ProcResource<1>;
150142

151143
let Latency = 4 in {
152144
def : WriteRes<WriteFCvtI32ToF32, [p8700IssueFPUL, p8700FpuApu]>;

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