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[WebAssembly] Prototype prefetch instructions
As proposed in WebAssembly/simd#352 and using the opcodes used in the V8 prototype: https://chromium-review.googlesource.com/c/v8/v8/+/2543167. These instructions are only usable via intrinsics and clang builtins to make them opt-in while they are being benchmarked. Differential Revision: https://reviews.llvm.org/D93883
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‎clang/include/clang/Basic/BuiltinsWebAssembly.def

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -220,5 +220,8 @@ TARGET_BUILTIN(__builtin_wasm_store64_lane, "vLLi*V2LLiIi", "n", "simd128")
220220

221221
TARGET_BUILTIN(__builtin_wasm_eq_i64x2, "V2LLiV2LLiV2LLi", "nc", "simd128")
222222

223+
TARGET_BUILTIN(__builtin_wasm_prefetch_t, "vv*", "n", "simd128")
224+
TARGET_BUILTIN(__builtin_wasm_prefetch_nt, "vv*", "n", "simd128")
225+
223226
#undef BUILTIN
224227
#undef TARGET_BUILTIN

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17171,6 +17171,16 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1717117171
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_shuffle);
1717217172
return Builder.CreateCall(Callee, Ops);
1717317173
}
17174+
case WebAssembly::BI__builtin_wasm_prefetch_t: {
17175+
Value *Ptr = EmitScalarExpr(E->getArg(0));
17176+
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_prefetch_t);
17177+
return Builder.CreateCall(Callee, Ptr);
17178+
}
17179+
case WebAssembly::BI__builtin_wasm_prefetch_nt: {
17180+
Value *Ptr = EmitScalarExpr(E->getArg(0));
17181+
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_prefetch_nt);
17182+
return Builder.CreateCall(Callee, Ptr);
17183+
}
1717417184
default:
1717517185
return nullptr;
1717617186
}

‎clang/test/CodeGen/builtins-wasm.c

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1002,3 +1002,13 @@ i8x16 shuffle(i8x16 x, i8x16 y) {
10021002
// WEBASSEMBLY-SAME: i32 15
10031003
// WEBASSEMBLY-NEXT: ret
10041004
}
1005+
1006+
void prefetch_t(void *p) {
1007+
return __builtin_wasm_prefetch_t(p);
1008+
// WEBASSEMBLY: call void @llvm.wasm.prefetch.t(i8* %p)
1009+
}
1010+
1011+
void prefetch_nt(void *p) {
1012+
return __builtin_wasm_prefetch_nt(p);
1013+
// WEBASSEMBLY: call void @llvm.wasm.prefetch.nt(i8* %p)
1014+
}

‎llvm/include/llvm/IR/IntrinsicsWebAssembly.td

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -311,6 +311,20 @@ def int_wasm_eq :
311311
[llvm_v2i64_ty, llvm_v2i64_ty],
312312
[IntrNoMem, IntrSpeculatable]>;
313313

314+
// TODO: Remove this after experiments have been run. Use the target-agnostic
315+
// int_prefetch if this becomes specified at some point.
316+
def int_wasm_prefetch_t :
317+
Intrinsic<[], [llvm_ptr_ty],
318+
[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
319+
ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
320+
"", [SDNPMemOperand]>;
321+
322+
def int_wasm_prefetch_nt :
323+
Intrinsic<[], [llvm_ptr_ty],
324+
[IntrInaccessibleMemOrArgMemOnly, IntrWillReturn,
325+
ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
326+
"", [SDNPMemOperand]>;
327+
314328
//===----------------------------------------------------------------------===//
315329
// Thread-local storage intrinsics
316330
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -427,7 +427,8 @@ class WebAssemblyAsmParser final : public MCTargetAsmParser {
427427
bool checkForP2AlignIfLoadStore(OperandVector &Operands, StringRef InstName) {
428428
// FIXME: there is probably a cleaner way to do this.
429429
auto IsLoadStore = InstName.find(".load") != StringRef::npos ||
430-
InstName.find(".store") != StringRef::npos;
430+
InstName.find(".store") != StringRef::npos ||
431+
InstName.find("prefetch") != StringRef::npos;
431432
auto IsAtomic = InstName.find("atomic.") != StringRef::npos;
432433
if (IsLoadStore || IsAtomic) {
433434
// Parse load/store operands of the form: offset:p2align=align

‎llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -197,6 +197,8 @@ inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
197197
WASM_LOAD_STORE(LOAD8_SPLAT)
198198
WASM_LOAD_STORE(LOAD_LANE_I8x16)
199199
WASM_LOAD_STORE(STORE_LANE_I8x16)
200+
WASM_LOAD_STORE(PREFETCH_T)
201+
WASM_LOAD_STORE(PREFETCH_NT)
200202
return 0;
201203
WASM_LOAD_STORE(LOAD16_S_I32)
202204
WASM_LOAD_STORE(LOAD16_U_I32)

‎llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -756,6 +756,16 @@ bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
756756
Info.align = MemAlign;
757757
return true;
758758
}
759+
case Intrinsic::wasm_prefetch_t:
760+
case Intrinsic::wasm_prefetch_nt: {
761+
Info.opc = ISD::INTRINSIC_VOID;
762+
Info.memVT = MVT::i8;
763+
Info.ptrVal = I.getArgOperand(0);
764+
Info.offset = 0;
765+
Info.align = Align(1);
766+
Info.flags = MachineMemOperand::MOLoad;
767+
return true;
768+
}
759769
default:
760770
return false;
761771
}

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1285,3 +1285,43 @@ defm "" : SIMDQFM<F64x2, 254, 255>;
12851285

12861286
defm Q15MULR_SAT_S :
12871287
SIMDBinary<I16x8, int_wasm_q15mulr_saturate_signed, "q15mulr_sat_s", 156>;
1288+
1289+
//===----------------------------------------------------------------------===//
1290+
// Experimental prefetch instructions: prefetch.t, prefetch.nt
1291+
//===----------------------------------------------------------------------===//
1292+
1293+
let mayLoad = true, UseNamedOperandTable = true in {
1294+
defm PREFETCH_T_A32 :
1295+
SIMD_I<(outs), (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
1296+
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
1297+
"prefetch.t\t${off}(${addr})$p2align",
1298+
"prefetch.t\t$off$p2align", 0xc5>;
1299+
defm PREFETCH_T_A64 :
1300+
SIMD_I<(outs), (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
1301+
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
1302+
"prefetch.t\t${off}(${addr})$p2align",
1303+
"prefetch.t\t$off$p2align", 0xc5>;
1304+
defm PREFETCH_NT_A32 :
1305+
SIMD_I<(outs), (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
1306+
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
1307+
"prefetch.nt\t${off}(${addr})$p2align",
1308+
"prefetch.nt\t$off$p2align", 0xc6>;
1309+
defm PREFETCH_NT_A64 :
1310+
SIMD_I<(outs), (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
1311+
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
1312+
"prefetch.nt\t${off}(${addr})$p2align",
1313+
"prefetch.nt\t$off$p2align", 0xc6>;
1314+
} // mayLoad, UseNamedOperandTable
1315+
1316+
multiclass PrefetchPatNoOffset<PatFrag kind, string inst> {
1317+
def : Pat<(kind I32:$addr), (!cast<NI>(inst # "_A32") 0, 0, $addr)>,
1318+
Requires<[HasAddr32]>;
1319+
def : Pat<(kind I64:$addr), (!cast<NI>(inst # "_A64") 0, 0, $addr)>,
1320+
Requires<[HasAddr64]>;
1321+
}
1322+
1323+
foreach inst = [["PREFETCH_T", "int_wasm_prefetch_t"],
1324+
["PREFETCH_NT", "int_wasm_prefetch_nt"]] in {
1325+
defvar node = !cast<Intrinsic>(inst[1]);
1326+
defm : PrefetchPatNoOffset<node, inst[0]>;
1327+
}

‎llvm/test/CodeGen/WebAssembly/simd-prefetch-offset.ll

Lines changed: 235 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,235 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
3+
4+
; Test experimental prefetch instructions
5+
6+
target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
7+
target triple = "wasm32-unknown-unknown"
8+
9+
declare void @llvm.wasm.prefetch.t(i8*)
10+
declare void @llvm.wasm.prefetch.nt(i8*)
11+
@gv = global i8 0
12+
13+
;===----------------------------------------------------------------------------
14+
; prefetch.t
15+
;===----------------------------------------------------------------------------
16+
17+
define void @prefetch_t_no_offset(i8* %p) {
18+
; CHECK-LABEL: prefetch_t_no_offset:
19+
; CHECK: .functype prefetch_t_no_offset (i32) -> ()
20+
; CHECK-NEXT: # %bb.0:
21+
; CHECK-NEXT: local.get 0
22+
; CHECK-NEXT: prefetch.t 0
23+
; CHECK-NEXT: # fallthrough-return
24+
tail call void @llvm.wasm.prefetch.t(i8* %p)
25+
ret void
26+
}
27+
28+
define void @prefetch_t_with_folded_offset(i8* %p) {
29+
; CHECK-LABEL: prefetch_t_with_folded_offset:
30+
; CHECK: .functype prefetch_t_with_folded_offset (i32) -> ()
31+
; CHECK-NEXT: # %bb.0:
32+
; CHECK-NEXT: local.get 0
33+
; CHECK-NEXT: i32.const 24
34+
; CHECK-NEXT: i32.add
35+
; CHECK-NEXT: prefetch.t 0
36+
; CHECK-NEXT: # fallthrough-return
37+
%q = ptrtoint i8* %p to i32
38+
%r = add nuw i32 %q, 24
39+
%s = inttoptr i32 %r to i8*
40+
tail call void @llvm.wasm.prefetch.t(i8* %s)
41+
ret void
42+
}
43+
44+
define void @prefetch_t_with_folded_gep_offset(i8* %p) {
45+
; CHECK-LABEL: prefetch_t_with_folded_gep_offset:
46+
; CHECK: .functype prefetch_t_with_folded_gep_offset (i32) -> ()
47+
; CHECK-NEXT: # %bb.0:
48+
; CHECK-NEXT: local.get 0
49+
; CHECK-NEXT: i32.const 6
50+
; CHECK-NEXT: i32.add
51+
; CHECK-NEXT: prefetch.t 0
52+
; CHECK-NEXT: # fallthrough-return
53+
%s = getelementptr inbounds i8, i8* %p, i32 6
54+
tail call void @llvm.wasm.prefetch.t(i8* %s)
55+
ret void
56+
}
57+
58+
define void @prefetch_t_with_unfolded_gep_negative_offset(i8* %p) {
59+
; CHECK-LABEL: prefetch_t_with_unfolded_gep_negative_offset:
60+
; CHECK: .functype prefetch_t_with_unfolded_gep_negative_offset (i32) -> ()
61+
; CHECK-NEXT: # %bb.0:
62+
; CHECK-NEXT: local.get 0
63+
; CHECK-NEXT: i32.const -6
64+
; CHECK-NEXT: i32.add
65+
; CHECK-NEXT: prefetch.t 0
66+
; CHECK-NEXT: # fallthrough-return
67+
%s = getelementptr inbounds i8, i8* %p, i32 -6
68+
tail call void @llvm.wasm.prefetch.t(i8* %s)
69+
ret void
70+
}
71+
72+
define void @prefetch_t_with_unfolded_offset(i8* %p) {
73+
; CHECK-LABEL: prefetch_t_with_unfolded_offset:
74+
; CHECK: .functype prefetch_t_with_unfolded_offset (i32) -> ()
75+
; CHECK-NEXT: # %bb.0:
76+
; CHECK-NEXT: local.get 0
77+
; CHECK-NEXT: i32.const 24
78+
; CHECK-NEXT: i32.add
79+
; CHECK-NEXT: prefetch.t 0
80+
; CHECK-NEXT: # fallthrough-return
81+
%q = ptrtoint i8* %p to i32
82+
%r = add nsw i32 %q, 24
83+
%s = inttoptr i32 %r to i8*
84+
tail call void @llvm.wasm.prefetch.t(i8* %s)
85+
ret void
86+
}
87+
88+
define void @prefetch_t_with_unfolded_gep_offset(i8* %p) {
89+
; CHECK-LABEL: prefetch_t_with_unfolded_gep_offset:
90+
; CHECK: .functype prefetch_t_with_unfolded_gep_offset (i32) -> ()
91+
; CHECK-NEXT: # %bb.0:
92+
; CHECK-NEXT: local.get 0
93+
; CHECK-NEXT: i32.const 6
94+
; CHECK-NEXT: i32.add
95+
; CHECK-NEXT: prefetch.t 0
96+
; CHECK-NEXT: # fallthrough-return
97+
%s = getelementptr i8, i8* %p, i32 6
98+
tail call void @llvm.wasm.prefetch.t(i8* %s)
99+
ret void
100+
}
101+
102+
define void @prefetch_t_from_numeric_address() {
103+
; CHECK-LABEL: prefetch_t_from_numeric_address:
104+
; CHECK: .functype prefetch_t_from_numeric_address () -> ()
105+
; CHECK-NEXT: # %bb.0:
106+
; CHECK-NEXT: i32.const 42
107+
; CHECK-NEXT: prefetch.t 0
108+
; CHECK-NEXT: # fallthrough-return
109+
%s = inttoptr i32 42 to i8*
110+
tail call void @llvm.wasm.prefetch.t(i8* %s)
111+
ret void
112+
}
113+
114+
define void @prefetch_t_from_global_address() {
115+
; CHECK-LABEL: prefetch_t_from_global_address:
116+
; CHECK: .functype prefetch_t_from_global_address () -> ()
117+
; CHECK-NEXT: # %bb.0:
118+
; CHECK-NEXT: i32.const gv
119+
; CHECK-NEXT: prefetch.t 0
120+
; CHECK-NEXT: # fallthrough-return
121+
tail call void @llvm.wasm.prefetch.t(i8* @gv)
122+
ret void
123+
}
124+
125+
;===----------------------------------------------------------------------------
126+
; prefetch.nt
127+
;===----------------------------------------------------------------------------
128+
129+
define void @prefetch_nt_no_offset(i8* %p) {
130+
; CHECK-LABEL: prefetch_nt_no_offset:
131+
; CHECK: .functype prefetch_nt_no_offset (i32) -> ()
132+
; CHECK-NEXT: # %bb.0:
133+
; CHECK-NEXT: local.get 0
134+
; CHECK-NEXT: prefetch.nt 0
135+
; CHECK-NEXT: # fallthrough-return
136+
tail call void @llvm.wasm.prefetch.nt(i8* %p)
137+
ret void
138+
}
139+
140+
define void @prefetch_nt_with_folded_offset(i8* %p) {
141+
; CHECK-LABEL: prefetch_nt_with_folded_offset:
142+
; CHECK: .functype prefetch_nt_with_folded_offset (i32) -> ()
143+
; CHECK-NEXT: # %bb.0:
144+
; CHECK-NEXT: local.get 0
145+
; CHECK-NEXT: i32.const 24
146+
; CHECK-NEXT: i32.add
147+
; CHECK-NEXT: prefetch.nt 0
148+
; CHECK-NEXT: # fallthrough-return
149+
%q = ptrtoint i8* %p to i32
150+
%r = add nuw i32 %q, 24
151+
%s = inttoptr i32 %r to i8*
152+
tail call void @llvm.wasm.prefetch.nt(i8* %s)
153+
ret void
154+
}
155+
156+
define void @prefetch_nt_with_folded_gep_offset(i8* %p) {
157+
; CHECK-LABEL: prefetch_nt_with_folded_gep_offset:
158+
; CHECK: .functype prefetch_nt_with_folded_gep_offset (i32) -> ()
159+
; CHECK-NEXT: # %bb.0:
160+
; CHECK-NEXT: local.get 0
161+
; CHECK-NEXT: i32.const 6
162+
; CHECK-NEXT: i32.add
163+
; CHECK-NEXT: prefetch.nt 0
164+
; CHECK-NEXT: # fallthrough-return
165+
%s = getelementptr inbounds i8, i8* %p, i64 6
166+
tail call void @llvm.wasm.prefetch.nt(i8* %s)
167+
ret void
168+
}
169+
170+
define void @prefetch_nt_with_unfolded_gep_negative_offset(i8* %p) {
171+
; CHECK-LABEL: prefetch_nt_with_unfolded_gep_negative_offset:
172+
; CHECK: .functype prefetch_nt_with_unfolded_gep_negative_offset (i32) -> ()
173+
; CHECK-NEXT: # %bb.0:
174+
; CHECK-NEXT: local.get 0
175+
; CHECK-NEXT: i32.const -6
176+
; CHECK-NEXT: i32.add
177+
; CHECK-NEXT: prefetch.nt 0
178+
; CHECK-NEXT: # fallthrough-return
179+
%s = getelementptr inbounds i8, i8* %p, i64 -6
180+
tail call void @llvm.wasm.prefetch.nt(i8* %s)
181+
ret void
182+
}
183+
184+
define void @prefetch_nt_with_unfolded_offset(i8* %p) {
185+
; CHECK-LABEL: prefetch_nt_with_unfolded_offset:
186+
; CHECK: .functype prefetch_nt_with_unfolded_offset (i32) -> ()
187+
; CHECK-NEXT: # %bb.0:
188+
; CHECK-NEXT: local.get 0
189+
; CHECK-NEXT: i32.const 24
190+
; CHECK-NEXT: i32.add
191+
; CHECK-NEXT: prefetch.nt 0
192+
; CHECK-NEXT: # fallthrough-return
193+
%q = ptrtoint i8* %p to i32
194+
%r = add nsw i32 %q, 24
195+
%s = inttoptr i32 %r to i8*
196+
tail call void @llvm.wasm.prefetch.nt(i8* %s)
197+
ret void
198+
}
199+
200+
define void @prefetch_nt_with_unfolded_gep_offset(i8* %p) {
201+
; CHECK-LABEL: prefetch_nt_with_unfolded_gep_offset:
202+
; CHECK: .functype prefetch_nt_with_unfolded_gep_offset (i32) -> ()
203+
; CHECK-NEXT: # %bb.0:
204+
; CHECK-NEXT: local.get 0
205+
; CHECK-NEXT: i32.const 6
206+
; CHECK-NEXT: i32.add
207+
; CHECK-NEXT: prefetch.nt 0
208+
; CHECK-NEXT: # fallthrough-return
209+
%s = getelementptr i8, i8* %p, i64 6
210+
tail call void @llvm.wasm.prefetch.nt(i8* %s)
211+
ret void
212+
}
213+
214+
define void @prefetch_nt_from_numeric_address() {
215+
; CHECK-LABEL: prefetch_nt_from_numeric_address:
216+
; CHECK: .functype prefetch_nt_from_numeric_address () -> ()
217+
; CHECK-NEXT: # %bb.0:
218+
; CHECK-NEXT: i32.const 42
219+
; CHECK-NEXT: prefetch.nt 0
220+
; CHECK-NEXT: # fallthrough-return
221+
%s = inttoptr i32 42 to i8*
222+
tail call void @llvm.wasm.prefetch.nt(i8* %s)
223+
ret void
224+
}
225+
226+
define void @prefetch_nt_from_global_address() {
227+
; CHECK-LABEL: prefetch_nt_from_global_address:
228+
; CHECK: .functype prefetch_nt_from_global_address () -> ()
229+
; CHECK-NEXT: # %bb.0:
230+
; CHECK-NEXT: i32.const gv
231+
; CHECK-NEXT: prefetch.nt 0
232+
; CHECK-NEXT: # fallthrough-return
233+
tail call void @llvm.wasm.prefetch.nt(i8* @gv)
234+
ret void
235+
}

‎llvm/test/MC/WebAssembly/simd-encodings.s

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -736,4 +736,10 @@ main:
736736
# CHECK: i32x4.extadd_pairwise_i16x8_u # encoding: [0xfd,0xa6,0x01]
737737
i32x4.extadd_pairwise_i16x8_u
738738

739+
# CHECK: prefetch.t 16 # encoding: [0xfd,0xc5,0x01,0x00,0x10]
740+
prefetch.t 16
741+
742+
# CHECK: prefetch.nt 16 # encoding: [0xfd,0xc6,0x01,0x00,0x10]
743+
prefetch.nt 16
744+
739745
end_function

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