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[X86][MC] Support Enc/Dec for EGPR for promoted AMX-TILE instruction (#76210)
R16-R31 was added into GPRs in #70958, This patch supports the encoding/decoding for promoted AMX-TILE instruction in EVEX space. RFC: https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
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‎llvm/lib/Target/X86/X86InstrAMX.td

+39-29
Original file line numberDiff line numberDiff line change
@@ -14,35 +14,45 @@
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//===----------------------------------------------------------------------===//
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// AMX instructions
1616

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let Predicates = [HasAMXTILE, In64BitMode] in {
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let SchedRW = [WriteSystem] in {
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let hasSideEffects = 1,
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Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
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def LDTILECFG : I <0x49, MRM0m, (outs), (ins opaquemem:$src),
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"ldtilecfg\t$src",
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[(int_x86_ldtilecfg addr:$src)]>, VEX, T8;
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let hasSideEffects = 1 in
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def STTILECFG : I <0x49, MRM0m, (outs), (ins opaquemem:$src),
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"sttilecfg\t$src",
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[(int_x86_sttilecfg addr:$src)]>, VEX, T8, PD;
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let mayLoad = 1 in
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def TILELOADD : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
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(ins sibmem:$src),
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"tileloadd\t{$src, $dst|$dst, $src}", []>,
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VEX, T8, XD;
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let mayLoad = 1 in
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def TILELOADDT1 : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
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(ins sibmem:$src),
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"tileloaddt1\t{$src, $dst|$dst, $src}", []>,
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VEX, T8, PD;
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multiclass AMX_TILE_COMMON<string Suffix, Predicate HasEGPR> {
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let Predicates = [HasAMXTILE, HasEGPR, In64BitMode] in {
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let hasSideEffects = 1,
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Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
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def LDTILECFG#Suffix : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
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"ldtilecfg\t$src",
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[(int_x86_ldtilecfg addr:$src)]>,
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T8, PS;
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let hasSideEffects = 1 in
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def STTILECFG#Suffix : I<0x49, MRM0m, (outs), (ins opaquemem:$src),
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"sttilecfg\t$src",
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[(int_x86_sttilecfg addr:$src)]>,
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T8, PD;
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let mayLoad = 1 in
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def TILELOADD#Suffix : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
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(ins sibmem:$src),
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"tileloadd\t{$src, $dst|$dst, $src}", []>,
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T8, XD;
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let mayLoad = 1 in
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def TILELOADDT1#Suffix : I<0x4b, MRMSrcMemFSIB, (outs TILE:$dst),
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(ins sibmem:$src),
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"tileloaddt1\t{$src, $dst|$dst, $src}", []>,
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T8, PD;
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let mayStore = 1 in
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def TILESTORED#Suffix : I<0x4b, MRMDestMemFSIB, (outs),
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(ins sibmem:$dst, TILE:$src),
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"tilestored\t{$src, $dst|$dst, $src}", []>,
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T8, XS;
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}
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}
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let SchedRW = [WriteSystem] in {
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defm "" : AMX_TILE_COMMON<"", NoEGPR>, VEX;
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defm "" : AMX_TILE_COMMON<"_EVEX", HasEGPR>, EVEX, NoCD8;
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let Predicates = [HasAMXTILE, In64BitMode] in {
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let Defs = [TMM0,TMM1,TMM2,TMM3,TMM4,TMM5,TMM6,TMM7] in
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def TILERELEASE : I<0x49, MRM_C0, (outs), (ins),
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"tilerelease", [(int_x86_tilerelease)]>, VEX, T8;
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let mayStore = 1 in
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def TILESTORED : I<0x4b, MRMDestMemFSIB, (outs),
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(ins sibmem:$dst, TILE:$src),
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"tilestored\t{$src, $dst|$dst, $src}", []>,
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VEX, T8, XS;
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"tilerelease", [(int_x86_tilerelease)]>, VEX, T8, PS;
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def TILEZERO : I<0x49, MRMr0, (outs TILE:$dst), (ins),
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"tilezero\t$dst", []>,
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VEX, T8, XD;
@@ -82,8 +92,8 @@ let Predicates = [HasAMXTILE, In64BitMode] in {
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def PTILEZERO : PseudoI<(outs), (ins u8imm:$src),
8393
[(int_x86_tilezero timm:$src)]>;
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}
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} // SchedRW
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} // HasAMXTILE
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} // Predicates
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} // SchedRW
8797

8898
let Predicates = [HasAMXINT8, In64BitMode] in {
8999
let SchedRW = [WriteSystem] in {

‎llvm/test/MC/Disassembler/X86/apx/amx-tile.txt

+22
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,22 @@
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# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
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# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
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# ATT: ldtilecfg 291(%r28,%r29,4)
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# INTEL: ldtilecfg [r28 + 4*r29 + 291]
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0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
7+
8+
# ATT: sttilecfg 291(%r28,%r29,4)
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# INTEL: sttilecfg [r28 + 4*r29 + 291]
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0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00
11+
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# ATT: tileloadd 291(%r28,%r29,4), %tmm6
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# INTEL: tileloadd tmm6, [r28 + 4*r29 + 291]
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0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
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# ATT: tileloaddt1 291(%r28,%r29,4), %tmm6
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# INTEL: tileloaddt1 tmm6, [r28 + 4*r29 + 291]
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0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00
19+
20+
# ATT: tilestored %tmm6, 291(%r28,%r29,4)
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# INTEL: tilestored [r28 + 4*r29 + 291], tmm6
22+
0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00

‎llvm/test/MC/X86/apx/amx-tile-att.s

+24
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
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# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
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4+
# ERROR-COUNT-5: error:
5+
# ERROR-NOT: error:
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# CHECK: ldtilecfg 291(%r28,%r29,4)
7+
# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
8+
ldtilecfg 291(%r28,%r29,4)
9+
10+
# CHECK: sttilecfg 291(%r28,%r29,4)
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# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
12+
sttilecfg 291(%r28,%r29,4)
13+
14+
# CHECK: tileloadd 291(%r28,%r29,4), %tmm6
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# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
16+
tileloadd 291(%r28,%r29,4), %tmm6
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18+
# CHECK: tileloaddt1 291(%r28,%r29,4), %tmm6
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# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
20+
tileloaddt1 291(%r28,%r29,4), %tmm6
21+
22+
# CHECK: tilestored %tmm6, 291(%r28,%r29,4)
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# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
24+
tilestored %tmm6, 291(%r28,%r29,4)

‎llvm/test/MC/X86/apx/amx-tile-intel.s

+21
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@@ -0,0 +1,21 @@
1+
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
2+
3+
# CHECK: ldtilecfg [r28 + 4*r29 + 291]
4+
# CHECK: encoding: [0x62,0x9a,0x78,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
5+
ldtilecfg [r28 + 4*r29 + 291]
6+
7+
# CHECK: sttilecfg [r28 + 4*r29 + 291]
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# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x49,0x84,0xac,0x23,0x01,0x00,0x00]
9+
sttilecfg [r28 + 4*r29 + 291]
10+
11+
# CHECK: tileloadd tmm6, [r28 + 4*r29 + 291]
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# CHECK: encoding: [0x62,0x9a,0x7b,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
13+
tileloadd tmm6, [r28 + 4*r29 + 291]
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# CHECK: tileloaddt1 tmm6, [r28 + 4*r29 + 291]
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# CHECK: encoding: [0x62,0x9a,0x79,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
17+
tileloaddt1 tmm6, [r28 + 4*r29 + 291]
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19+
# CHECK: tilestored [r28 + 4*r29 + 291], tmm6
20+
# CHECK: encoding: [0x62,0x9a,0x7a,0x08,0x4b,0xb4,0xac,0x23,0x01,0x00,0x00]
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tilestored [r28 + 4*r29 + 291], tmm6

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