[Xtensa] Minor fix of the Xtensa::getUserRegister function.

Author: andreisfr

llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp

@@ -35,6 +35,8 @@ using namespace llvm;
 struct XtensaOperand;
 
 class XtensaAsmParser : public MCTargetAsmParser {
+  const MCRegisterInfo &MRI;
+
   enum XtensaRegisterType { Xtensa_Generic, Xtensa_SR, Xtensa_UR };
   SMLoc getLoc() const { return getParser().getTok().getLoc(); }
 
@@ -87,7 +89,8 @@ class XtensaAsmParser : public MCTargetAsmParser {
 
   XtensaAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
                   const MCInstrInfo &MII, const MCTargetOptions &Options)
-      : MCTargetAsmParser(Options, STI, MII) {
+      : MCTargetAsmParser(Options, STI, MII),
+        MRI(*Parser.getContext().getRegisterInfo()) {
     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
   }
 
@@ -618,7 +621,7 @@ ParseStatus XtensaAsmParser::parseRegister(OperandVector &Operands,
     // and such situation may lead to confilct
     if (RegType == Xtensa_UR) {
       int64_t RegCode = getLexer().getTok().getIntVal();
-      RegNo = Xtensa::getUserRegister(RegCode);
+      RegNo = Xtensa::getUserRegister(RegCode, MRI);
     } else {
       RegName = getLexer().getTok().getString();
       RegNo = MatchRegisterAltName(RegName);

llvm/lib/Target/Xtensa/Disassembler/XtensaDisassembler.cpp

@@ -123,7 +123,10 @@ static DecodeStatus DecodeURRegisterClass(MCInst &Inst, uint64_t RegNo,
   if (RegNo > 255)
     return MCDisassembler::Fail;
 
-  MCPhysReg Reg = Xtensa::getUserRegister(RegNo);
+  const XtensaDisassembler *Dis =
+      static_cast<const XtensaDisassembler *>(Decoder);
+  const MCRegisterInfo *MRI = Dis->getContext().getRegisterInfo();
+  MCPhysReg Reg = Xtensa::getUserRegister(RegNo, *MRI);
   if (!Xtensa::checkRegister(Reg, Decoder->getSubtargetInfo().getFeatureBits()))
     return MCDisassembler::Fail;
 

llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.cpp

@@ -115,11 +115,10 @@ bool Xtensa::checkRegister(MCRegister RegNo, const FeatureBitset &FeatureBits) {
 }
 
 // Get Xtensa User Register by encoding value.
-MCRegister Xtensa::getUserRegister(unsigned Code) {
-  switch (Code) {
-  case 232:
+MCRegister Xtensa::getUserRegister(unsigned Code, const MCRegisterInfo &MRI) {
+  if (MRI.getEncodingValue(Xtensa::FCR) == Code) {
     return Xtensa::FCR;
-  case 233:
+  } else if (MRI.getEncodingValue(Xtensa::FSR) == Code) {
     return Xtensa::FSR;
   }
   return Xtensa::NoRegister;

llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCTargetDesc.h

@@ -59,7 +59,7 @@ bool isValidAddrOffsetForOpcode(unsigned Opcode, int64_t Offset);
 bool checkRegister(MCRegister RegNo, const FeatureBitset &FeatureBits);
 
 // Get Xtensa User Register by register encoding value.
-MCRegister getUserRegister(unsigned Code);
+MCRegister getUserRegister(unsigned Code, const MCRegisterInfo &MRI);
 } // namespace Xtensa
 } // end namespace llvm