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Leave the logic in X86RegisterInfo::getNumSupportedRegs to next commit
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llvm/lib/Target/X86/X86RegisterInfo.cpp

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Original file line numberDiff line numberDiff line change
@@ -618,7 +618,6 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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}
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unsigned X86RegisterInfo::getNumSupportedRegs(const MachineFunction &MF) const {
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const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>();
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// All existing Intel CPUs that support AMX support AVX512 and all existing
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// Intel CPUs that support APX support AMX. AVX512 implies AVX.
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//
@@ -635,17 +634,7 @@ unsigned X86RegisterInfo::getNumSupportedRegs(const MachineFunction &MF) const {
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(X86::K6_K7 + 1 == X86::TMMCFG) &&
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(X86::TMM7 + 1 == X86::NUM_TARGET_REGS) &&
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"Register number may be incorrect");
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bool HasAVX = ST.hasAVX();
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bool HasAVX512 = ST.hasAVX512();
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bool HasAMX = ST.hasAMXTILE();
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if (HasAMX)
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return X86::TMM7 + 1;
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if (HasAVX512)
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return X86::K6_K7 + 1;
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if (HasAVX)
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return X86::YMM15 + 1;
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return X86::YMM0;
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return X86::NUM_TARGET_REGS;
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}
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bool X86RegisterInfo::isArgumentRegister(const MachineFunction &MF,

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