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Updated limit_main_loop_vf_to_avoid_dead_main_vector_loop test case in limit-vf-by-tripcount.ll that got fixed by patch #79651
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llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll

Lines changed: 11 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -279,49 +279,26 @@ exit:
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define void @limit_main_loop_vf_to_avoid_dead_main_vector_loop(ptr noalias %src, ptr noalias %dst) {
280280
; CHECK-LABEL: @limit_main_loop_vf_to_avoid_dead_main_vector_loop(
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; CHECK-NEXT: entry:
282-
; CHECK-NEXT: br i1 true, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
282+
; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
283283
; CHECK: vector.ph:
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
285285
; CHECK: vector.body:
286286
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
287287
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
288-
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 8
289-
; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 16
290-
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 24
291-
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8], ptr [[SRC:%.*]], i64 [[TMP0]], i64 0
292-
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [3 x i8], ptr [[SRC]], i64 [[TMP1]], i64 0
293-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8], ptr [[SRC]], i64 [[TMP2]], i64 0
294-
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8], ptr [[SRC]], i64 [[TMP3]], i64 0
295-
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[TMP4]], i32 0
296-
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i32 0
297-
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[TMP6]], i32 0
298-
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr [[TMP7]], i32 0
299-
; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <24 x i8>, ptr [[TMP8]], align 1
300-
; CHECK-NEXT: [[WIDE_VEC1:%.*]] = load <24 x i8>, ptr [[TMP9]], align 1
301-
; CHECK-NEXT: [[WIDE_VEC2:%.*]] = load <24 x i8>, ptr [[TMP10]], align 1
302-
; CHECK-NEXT: [[WIDE_VEC3:%.*]] = load <24 x i8>, ptr [[TMP11]], align 1
288+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [3 x i8], ptr [[SRC:%.*]], i64 [[TMP0]], i64 0
289+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i32 0
290+
; CHECK-NEXT: [[WIDE_VEC:%.*]] = load <24 x i8>, ptr [[TMP2]], align 1
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; CHECK-NEXT: [[STRIDED_VEC:%.*]] = shufflevector <24 x i8> [[WIDE_VEC]], <24 x i8> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
304-
; CHECK-NEXT: [[STRIDED_VEC4:%.*]] = shufflevector <24 x i8> [[WIDE_VEC1]], <24 x i8> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
305-
; CHECK-NEXT: [[STRIDED_VEC5:%.*]] = shufflevector <24 x i8> [[WIDE_VEC2]], <24 x i8> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
306-
; CHECK-NEXT: [[STRIDED_VEC6:%.*]] = shufflevector <24 x i8> [[WIDE_VEC3]], <24 x i8> poison, <8 x i32> <i32 0, i32 3, i32 6, i32 9, i32 12, i32 15, i32 18, i32 21>
307-
; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[TMP0]]
308-
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i8, ptr [[DST]], i64 [[TMP1]]
309-
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr [[DST]], i64 [[TMP2]]
310-
; CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds i8, ptr [[DST]], i64 [[TMP3]]
311-
; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr [[TMP12]], i32 0
312-
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i8, ptr [[TMP12]], i32 8
313-
; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i8, ptr [[TMP12]], i32 16
314-
; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds i8, ptr [[TMP12]], i32 24
315-
; CHECK-NEXT: store <8 x i8> [[STRIDED_VEC]], ptr [[TMP16]], align 1
316-
; CHECK-NEXT: store <8 x i8> [[STRIDED_VEC4]], ptr [[TMP17]], align 1
317-
; CHECK-NEXT: store <8 x i8> [[STRIDED_VEC5]], ptr [[TMP18]], align 1
318-
; CHECK-NEXT: store <8 x i8> [[STRIDED_VEC6]], ptr [[TMP19]], align 1
319-
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 32
320-
; CHECK-NEXT: br i1 true, label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
292+
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8, ptr [[DST:%.*]], i64 [[TMP0]]
293+
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i32 0
294+
; CHECK-NEXT: store <8 x i8> [[STRIDED_VEC]], ptr [[TMP4]], align 1
295+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
296+
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], 24
297+
; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
321298
; CHECK: middle.block:
322299
; CHECK-NEXT: br label [[SCALAR_PH]]
323300
; CHECK: scalar.ph:
324-
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 0, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
301+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 24, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
325302
; CHECK-NEXT: br label [[LOOP:%.*]]
326303
; CHECK: loop:
327304
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]

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