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[BasicAA] Add extra scalable typesize and offset tests. NFC
A collection of tests from #69152 and for constant offsets with scalable typesizes.
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‎llvm/test/Analysis/BasicAA/vscale.ll

Lines changed: 204 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,36 @@ define void @gep_different_base_const_offset(ptr noalias %p1, ptr noalias %p2) {
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ret void
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}
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; getelementptr @llvm.vscale tests
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; CHECK-LABEL: gep_llvm_vscale_no_alias
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep1, <vscale x 4 x i32>* %gep2
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep1, <vscale x 4 x i32>* %gep3
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep2, <vscale x 4 x i32>* %gep3
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define void @gep_llvm_vscale_no_alias(ptr %p) {
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%t1 = tail call i64 @llvm.vscale.i64()
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%t2 = shl nuw nsw i64 %t1, 3
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%gep1 = getelementptr i32, ptr %p, i64 %t2
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%gep2 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
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%gep3 = getelementptr <vscale x 4 x i32>, ptr %p, i64 2
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load <vscale x 4 x i32>, ptr %gep1
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load <vscale x 4 x i32>, ptr %gep2
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load <vscale x 4 x i32>, ptr %gep3
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ret void
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}
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declare i64 @llvm.vscale.i64()
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; CHECK-LABEL: gep_llvm_vscale_squared_may_alias
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %gep1, <vscale x 4 x i32>* %gep2
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define void @gep_llvm_vscale_squared_may_alias(ptr %p) {
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%t1 = tail call i64 @llvm.vscale.i64()
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%gep1 = getelementptr <vscale x 4 x i32>, ptr %p, i64 %t1
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%gep2 = getelementptr i32, ptr %p, i64 1
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load <vscale x 4 x i32>, ptr %gep1
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load <vscale x 4 x i32>, ptr %gep2
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ret void
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}
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120150
; getelementptr + bitcast
121151

122152
; CHECK-LABEL: gep_bitcast_1
@@ -153,6 +183,132 @@ define void @gep_bitcast_2(ptr %p) {
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ret void
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}
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; negative offset tests
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; CHECK-LABEL: gep_neg_notscalable
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16m16
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; CHECK-DAG: NoAlias: <4 x i32>* %vm16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16m16
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define void @gep_neg_notscalable(ptr %p) vscale_range(1,16) {
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%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 -1
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%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 -1
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%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %m16, i64 1
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load <4 x i32>, ptr %p
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load <4 x i32>, ptr %vm16
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load <4 x i32>, ptr %m16
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load <4 x i32>, ptr %vm16m16
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load <4 x i32>, ptr %m16pv16
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ret void
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}
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; CHECK-LABEL: gep_neg_scalable
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16m16
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define void @gep_neg_scalable(ptr %p) vscale_range(1,16) {
224+
%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 -1
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%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 -1
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%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %vm16, i64 1
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load <vscale x 4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %vm16
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load <vscale x 4 x i32>, ptr %m16
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load <vscale x 4 x i32>, ptr %vm16m16
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load <vscale x 4 x i32>, ptr %m16pv16
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ret void
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}
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; CHECK-LABEL: gep_pos_notscalable
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16m16
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; CHECK-DAG: NoAlias: <4 x i32>* %vm16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16pv16, <4 x i32>* %vm16m16
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define void @gep_pos_notscalable(ptr %p) vscale_range(1,16) {
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%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
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%m16 = getelementptr <4 x i32>, ptr %p, i64 1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 1
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%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %vm16, i64 -1
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load <4 x i32>, ptr %p
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load <4 x i32>, ptr %vm16
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load <4 x i32>, ptr %m16
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load <4 x i32>, ptr %vm16m16
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load <4 x i32>, ptr %m16pv16
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ret void
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}
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260+
; CHECK-LABEL: gep_pos_scalable
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %vm16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16m16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %m16pv16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16pv16, <vscale x 4 x i32>* %vm16m16
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define void @gep_pos_scalable(ptr %p) vscale_range(1,16) {
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%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 1
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%m16 = getelementptr <4 x i32>, ptr %p, i64 1
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%vm16m16 = getelementptr <4 x i32>, ptr %vm16, i64 1
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%m16pv16 = getelementptr <vscale x 4 x i32>, ptr %vm16, i64 -1
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load <vscale x 4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %vm16
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load <vscale x 4 x i32>, ptr %m16
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load <vscale x 4 x i32>, ptr %vm16m16
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load <vscale x 4 x i32>, ptr %m16pv16
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ret void
282+
}
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; CHECK-LABEL: v1v2types
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; CHECK-DAG: MustAlias: <4 x i32>* %p, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %p, <4 x i32>* %vm16
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; CHECK-DAG: MustAlias: <4 x i32>* %vm16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %p
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; CHECK-DAG: NoAlias: <4 x i32>* %m16, <4 x i32>* %p
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %vm16
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; CHECK-DAG: MayAlias: <4 x i32>* %m16, <4 x i32>* %vm16
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; CHECK-DAG: MustAlias: <4 x i32>* %m16, <vscale x 4 x i32>* %m16
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define void @v1v2types(ptr %p) vscale_range(1,16) {
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%vm16 = getelementptr <vscale x 4 x i32>, ptr %p, i64 -1
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%m16 = getelementptr <4 x i32>, ptr %p, i64 -1
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load <vscale x 4 x i32>, ptr %p
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load <4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %vm16
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load <4 x i32>, ptr %vm16
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load <vscale x 4 x i32>, ptr %m16
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load <4 x i32>, ptr %m16
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ret void
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}
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156312
; getelementptr recursion
157313

158314
; CHECK-LABEL: gep_recursion_level_1
@@ -269,3 +425,51 @@ define void @gep_recursion_max_lookup_depth_reached(ptr %a, ptr %p) {
269425
load i32, ptr %gep_rec_6
270426
ret void
271427
}
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429+
; CHECK-LABEL: gep_2048
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off255
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off256, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %off256
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off256
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off255
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %noff256
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off256
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define void @gep_2048(ptr %p) {
441+
%off255 = getelementptr i8, ptr %p, i64 255
442+
%noff255 = getelementptr i8, ptr %p, i64 -255
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%off256 = getelementptr i8, ptr %p, i64 256
444+
%noff256 = getelementptr i8, ptr %p, i64 -256
445+
load <vscale x 4 x i32>, ptr %p
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load <vscale x 4 x i32>, ptr %off255
447+
load <vscale x 4 x i32>, ptr %noff255
448+
load <vscale x 4 x i32>, ptr %off256
449+
load <vscale x 4 x i32>, ptr %noff256
450+
ret void
451+
}
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453+
; CHECK-LABEL: gep_2048_vscalerange
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off255
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off256, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %off255, <vscale x 4 x i32>* %off256
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %off256
460+
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %p
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off255
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; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff255, <vscale x 4 x i32>* %noff256
463+
; CHECK-DAG: MayAlias: <vscale x 4 x i32>* %noff256, <vscale x 4 x i32>* %off256
464+
define void @gep_2048_vscalerange(ptr %p) vscale_range(1,16) {
465+
%off255 = getelementptr i8, ptr %p, i64 255
466+
%noff255 = getelementptr i8, ptr %p, i64 -255
467+
%off256 = getelementptr i8, ptr %p, i64 256
468+
%noff256 = getelementptr i8, ptr %p, i64 -256
469+
load <vscale x 4 x i32>, ptr %p
470+
load <vscale x 4 x i32>, ptr %off255
471+
load <vscale x 4 x i32>, ptr %noff255
472+
load <vscale x 4 x i32>, ptr %off256
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load <vscale x 4 x i32>, ptr %noff256
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ret void
475+
}

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