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[RISCV][MC] Pass MCSubtargetInfo down to shouldForceRelocation and evaluateTargetFixup. (#73721)
Instead of using the STI stored in RISCVAsmBackend, try to get it from the MCFragment. This addresses the issue raised here https://discourse.llvm.org/t/possible-problem-related-to-subtarget-usage/75283
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22 files changed

+75
-46
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22 files changed

+75
-46
lines changed

‎llvm/include/llvm/MC/MCAsmBackend.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,8 @@ class MCAsmBackend {
101101
/// Hook to check if a relocation is needed for some target specific reason.
102102
virtual bool shouldForceRelocation(const MCAssembler &Asm,
103103
const MCFixup &Fixup,
104-
const MCValue &Target) {
104+
const MCValue &Target,
105+
const MCSubtargetInfo *STI) {
105106
return false;
106107
}
107108

@@ -124,7 +125,8 @@ class MCAsmBackend {
124125
virtual bool evaluateTargetFixup(const MCAssembler &Asm,
125126
const MCAsmLayout &Layout,
126127
const MCFixup &Fixup, const MCFragment *DF,
127-
const MCValue &Target, uint64_t &Value,
128+
const MCValue &Target,
129+
const MCSubtargetInfo *STI, uint64_t &Value,
128130
bool &WasForced) {
129131
llvm_unreachable("Need to implement hook if target has custom fixups");
130132
}

‎llvm/include/llvm/MC/MCAssembler.h

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -185,7 +185,8 @@ class MCAssembler {
185185
/// relocation.
186186
bool evaluateFixup(const MCAsmLayout &Layout, const MCFixup &Fixup,
187187
const MCFragment *DF, MCValue &Target,
188-
uint64_t &Value, bool &WasForced) const;
188+
const MCSubtargetInfo *STI, uint64_t &Value,
189+
bool &WasForced) const;
189190

190191
/// Check whether a fixup can be satisfied, or whether it needs to be relaxed
191192
/// (increased in size, in order to hold its value correctly).
@@ -221,8 +222,10 @@ class MCAssembler {
221222
/// finishLayout - Finalize a layout, including fragment lowering.
222223
void finishLayout(MCAsmLayout &Layout);
223224

224-
std::tuple<MCValue, uint64_t, bool>
225-
handleFixup(const MCAsmLayout &Layout, MCFragment &F, const MCFixup &Fixup);
225+
std::tuple<MCValue, uint64_t, bool> handleFixup(const MCAsmLayout &Layout,
226+
MCFragment &F,
227+
const MCFixup &Fixup,
228+
const MCSubtargetInfo *STI);
226229

227230
public:
228231
struct Symver {

‎llvm/lib/MC/MCAssembler.cpp

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -193,9 +193,9 @@ const MCSymbol *MCAssembler::getAtom(const MCSymbol &S) const {
193193
return S.getFragment()->getAtom();
194194
}
195195

196-
bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
197-
const MCFixup &Fixup, const MCFragment *DF,
198-
MCValue &Target, uint64_t &Value,
196+
bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout, const MCFixup &Fixup,
197+
const MCFragment *DF, MCValue &Target,
198+
const MCSubtargetInfo *STI, uint64_t &Value,
199199
bool &WasForced) const {
200200
++stats::evaluateFixup;
201201

@@ -227,7 +227,7 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
227227

228228
if (IsTarget)
229229
return getBackend().evaluateTargetFixup(*this, Layout, Fixup, DF, Target,
230-
Value, WasForced);
230+
STI, Value, WasForced);
231231

232232
unsigned FixupFlags = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags;
233233
bool IsPCRel = getBackendPtr()->getFixupKindInfo(Fixup.getKind()).Flags &
@@ -282,7 +282,8 @@ bool MCAssembler::evaluateFixup(const MCAsmLayout &Layout,
282282
}
283283

284284
// Let the backend force a relocation if needed.
285-
if (IsResolved && getBackend().shouldForceRelocation(*this, Fixup, Target)) {
285+
if (IsResolved &&
286+
getBackend().shouldForceRelocation(*this, Fixup, Target, STI)) {
286287
IsResolved = false;
287288
WasForced = true;
288289
}
@@ -796,13 +797,13 @@ void MCAssembler::writeSectionData(raw_ostream &OS, const MCSection *Sec,
796797

797798
std::tuple<MCValue, uint64_t, bool>
798799
MCAssembler::handleFixup(const MCAsmLayout &Layout, MCFragment &F,
799-
const MCFixup &Fixup) {
800+
const MCFixup &Fixup, const MCSubtargetInfo *STI) {
800801
// Evaluate the fixup.
801802
MCValue Target;
802803
uint64_t FixedValue;
803804
bool WasForced;
804-
bool IsResolved = evaluateFixup(Layout, Fixup, &F, Target, FixedValue,
805-
WasForced);
805+
bool IsResolved =
806+
evaluateFixup(Layout, Fixup, &F, Target, STI, FixedValue, WasForced);
806807
if (!IsResolved) {
807808
// The fixup was unresolved, we need a relocation. Inform the object
808809
// writer of the relocation, and give it an opportunity to adjust the
@@ -936,7 +937,7 @@ void MCAssembler::layout(MCAsmLayout &Layout) {
936937
bool IsResolved;
937938
MCValue Target;
938939
std::tie(Target, FixedValue, IsResolved) =
939-
handleFixup(Layout, Frag, Fixup);
940+
handleFixup(Layout, Frag, Fixup, STI);
940941
getBackend().applyFixup(*this, Fixup, Target, Contents, FixedValue,
941942
IsResolved, STI);
942943
}
@@ -960,7 +961,8 @@ bool MCAssembler::fixupNeedsRelaxation(const MCFixup &Fixup,
960961
MCValue Target;
961962
uint64_t Value;
962963
bool WasForced;
963-
bool Resolved = evaluateFixup(Layout, Fixup, DF, Target, Value, WasForced);
964+
bool Resolved = evaluateFixup(Layout, Fixup, DF, Target,
965+
DF->getSubtargetInfo(), Value, WasForced);
964966
if (Target.getSymA() &&
965967
Target.getSymA()->getKind() == MCSymbolRefExpr::VK_X86_ABS8 &&
966968
Fixup.getKind() == FK_Data_1)

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,8 @@ class AArch64AsmBackend : public MCAsmBackend {
100100
unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
101101

102102
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
103-
const MCValue &Target) override;
103+
const MCValue &Target,
104+
const MCSubtargetInfo *STI) override;
104105
};
105106

106107
} // end anonymous namespace
@@ -499,7 +500,8 @@ bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
499500

500501
bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
501502
const MCFixup &Fixup,
502-
const MCValue &Target) {
503+
const MCValue &Target,
504+
const MCSubtargetInfo *STI) {
503505
unsigned Kind = Fixup.getKind();
504506
if (Kind >= FirstLiteralRelocationKind)
505507
return true;

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,8 @@ class AMDGPUAsmBackend : public MCAsmBackend {
5353
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
5454
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
5555
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
56-
const MCValue &Target) override;
56+
const MCValue &Target,
57+
const MCSubtargetInfo *STI) override;
5758
};
5859

5960
} //End anonymous namespace
@@ -192,7 +193,8 @@ const MCFixupKindInfo &AMDGPUAsmBackend::getFixupKindInfo(
192193

193194
bool AMDGPUAsmBackend::shouldForceRelocation(const MCAssembler &,
194195
const MCFixup &Fixup,
195-
const MCValue &) {
196+
const MCValue &,
197+
const MCSubtargetInfo *STI) {
196198
return Fixup.getKind() >= FirstLiteralRelocationKind;
197199
}
198200

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -908,7 +908,8 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
908908

909909
bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
910910
const MCFixup &Fixup,
911-
const MCValue &Target) {
911+
const MCValue &Target,
912+
const MCSubtargetInfo *STI) {
912913
const MCSymbolRefExpr *A = Target.getSymA();
913914
const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;
914915
const unsigned FixupKind = Fixup.getKind();

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,8 @@ class ARMAsmBackend : public MCAsmBackend {
3636
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
3737

3838
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
39-
const MCValue &Target) override;
39+
const MCValue &Target,
40+
const MCSubtargetInfo *STI) override;
4041

4142
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
4243
const MCValue &Target, uint64_t Value,

‎llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -507,7 +507,8 @@ bool AVRAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
507507

508508
bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
509509
const MCFixup &Fixup,
510-
const MCValue &Target) {
510+
const MCValue &Target,
511+
const MCSubtargetInfo *STI) {
511512
switch ((unsigned)Fixup.getKind()) {
512513
default:
513514
return Fixup.getKind() >= FirstLiteralRelocationKind;

‎llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,8 @@ class AVRAsmBackend : public MCAsmBackend {
6060
const MCSubtargetInfo *STI) const override;
6161

6262
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
63-
const MCValue &Target) override;
63+
const MCValue &Target,
64+
const MCSubtargetInfo *STI) override;
6465

6566
private:
6667
Triple::OSType OSType;

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,8 @@ class HexagonAsmBackend : public MCAsmBackend {
202202
}
203203

204204
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
205-
const MCValue &Target) override {
205+
const MCValue &Target,
206+
const MCSubtargetInfo *STI) override {
206207
switch(Fixup.getTargetKind()) {
207208
default:
208209
llvm_unreachable("Unknown Fixup Kind!");

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -162,12 +162,13 @@ void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm,
162162

163163
bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
164164
const MCFixup &Fixup,
165-
const MCValue &Target) {
165+
const MCValue &Target,
166+
const MCSubtargetInfo *STI) {
166167
if (Fixup.getKind() >= FirstLiteralRelocationKind)
167168
return true;
168169
switch (Fixup.getTargetKind()) {
169170
default:
170-
return STI.hasFeature(LoongArch::FeatureRelax);
171+
return STI->hasFeature(LoongArch::FeatureRelax);
171172
case FK_Data_1:
172173
case FK_Data_2:
173174
case FK_Data_4:

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,8 @@ class LoongArchAsmBackend : public MCAsmBackend {
4141
const MCSubtargetInfo *STI) const override;
4242

4343
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
44-
const MCValue &Target) override;
44+
const MCValue &Target,
45+
const MCSubtargetInfo *STI) override;
4546

4647
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
4748
const MCRelaxableFragment *DF,

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -544,7 +544,8 @@ bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
544544

545545
bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
546546
const MCFixup &Fixup,
547-
const MCValue &Target) {
547+
const MCValue &Target,
548+
const MCSubtargetInfo *STI) {
548549
if (Fixup.getKind() >= FirstLiteralRelocationKind)
549550
return true;
550551
const unsigned FixupKind = Fixup.getKind();

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -68,7 +68,8 @@ class MipsAsmBackend : public MCAsmBackend {
6868
const MCSubtargetInfo *STI) const override;
6969

7070
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
71-
const MCValue &Target) override;
71+
const MCValue &Target,
72+
const MCSubtargetInfo *STI) override;
7273

7374
bool isMicroMips(const MCSymbol *Sym) const override;
7475
}; // class MipsAsmBackend

‎llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,8 @@ class PPCAsmBackend : public MCAsmBackend {
162162
}
163163

164164
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
165-
const MCValue &Target) override {
165+
const MCValue &Target,
166+
const MCSubtargetInfo *STI) override {
166167
MCFixupKind Kind = Fixup.getKind();
167168
switch ((unsigned)Kind) {
168169
default:

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -108,7 +108,8 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
108108
// necessary for correctness as offsets may change during relaxation.
109109
bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
110110
const MCFixup &Fixup,
111-
const MCValue &Target) {
111+
const MCValue &Target,
112+
const MCSubtargetInfo *STI) {
112113
if (Fixup.getKind() >= FirstLiteralRelocationKind)
113114
return true;
114115
switch (Fixup.getTargetKind()) {
@@ -128,7 +129,7 @@ bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
128129
return true;
129130
}
130131

131-
return STI.hasFeature(RISCV::FeatureRelax) || ForceRelocs;
132+
return STI->hasFeature(RISCV::FeatureRelax) || ForceRelocs;
132133
}
133134

134135
bool RISCVAsmBackend::fixupNeedsRelaxationAdvanced(const MCFixup &Fixup,
@@ -514,8 +515,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,
514515

515516
bool RISCVAsmBackend::evaluateTargetFixup(
516517
const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFixup &Fixup,
517-
const MCFragment *DF, const MCValue &Target, uint64_t &Value,
518-
bool &WasForced) {
518+
const MCFragment *DF, const MCValue &Target, const MCSubtargetInfo *STI,
519+
uint64_t &Value, bool &WasForced) {
519520
const MCFixup *AUIPCFixup;
520521
const MCFragment *AUIPCDF;
521522
MCValue AUIPCTarget;
@@ -565,7 +566,7 @@ bool RISCVAsmBackend::evaluateTargetFixup(
565566
Value = Layout.getSymbolOffset(SA) + AUIPCTarget.getConstant();
566567
Value -= Layout.getFragmentOffset(AUIPCDF) + AUIPCFixup->getOffset();
567568

568-
if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget)) {
569+
if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget, STI)) {
569570
WasForced = true;
570571
return false;
571572
}

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,8 +50,8 @@ class RISCVAsmBackend : public MCAsmBackend {
5050

5151
bool evaluateTargetFixup(const MCAssembler &Asm, const MCAsmLayout &Layout,
5252
const MCFixup &Fixup, const MCFragment *DF,
53-
const MCValue &Target, uint64_t &Value,
54-
bool &WasForced) override;
53+
const MCValue &Target, const MCSubtargetInfo *STI,
54+
uint64_t &Value, bool &WasForced) override;
5555

5656
bool handleAddSubRelocations(const MCAsmLayout &Layout, const MCFragment &F,
5757
const MCFixup &Fixup, const MCValue &Target,
@@ -66,7 +66,8 @@ class RISCVAsmBackend : public MCAsmBackend {
6666
createObjectTargetWriter() const override;
6767

6868
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
69-
const MCValue &Target) override;
69+
const MCValue &Target,
70+
const MCSubtargetInfo *STI) override;
7071

7172
bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
7273
const MCRelaxableFragment *DF,

‎llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -272,7 +272,8 @@ namespace {
272272
}
273273

274274
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
275-
const MCValue &Target) override {
275+
const MCValue &Target,
276+
const MCSubtargetInfo *STI) override {
276277
if (Fixup.getKind() >= FirstLiteralRelocationKind)
277278
return true;
278279
switch ((Sparc::Fixups)Fixup.getKind()) {

‎llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,8 @@ class SystemZMCAsmBackend : public MCAsmBackend {
116116
std::optional<MCFixupKind> getFixupKind(StringRef Name) const override;
117117
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
118118
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
119-
const MCValue &Target) override;
119+
const MCValue &Target,
120+
const MCSubtargetInfo *STI) override;
120121
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
121122
const MCValue &Target, MutableArrayRef<char> Data,
122123
uint64_t Value, bool IsResolved,
@@ -164,8 +165,9 @@ SystemZMCAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
164165
}
165166

166167
bool SystemZMCAsmBackend::shouldForceRelocation(const MCAssembler &,
167-
const MCFixup &Fixup,
168-
const MCValue &) {
168+
const MCFixup &Fixup,
169+
const MCValue &,
170+
const MCSubtargetInfo *STI) {
169171
return Fixup.getKind() >= FirstLiteralRelocationKind;
170172
}
171173

‎llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,8 @@ class VEAsmBackend : public MCAsmBackend {
132132
}
133133

134134
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
135-
const MCValue &Target) override {
135+
const MCValue &Target,
136+
const MCSubtargetInfo *STI) override {
136137
switch ((VE::Fixups)Fixup.getKind()) {
137138
default:
138139
return false;

‎llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,8 @@ class X86AsmBackend : public MCAsmBackend {
173173
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
174174

175175
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
176-
const MCValue &Target) override;
176+
const MCValue &Target,
177+
const MCSubtargetInfo *STI) override;
177178

178179
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
179180
const MCValue &Target, MutableArrayRef<char> Data,
@@ -645,8 +646,8 @@ const MCFixupKindInfo &X86AsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
645646
}
646647

647648
bool X86AsmBackend::shouldForceRelocation(const MCAssembler &,
648-
const MCFixup &Fixup,
649-
const MCValue &) {
649+
const MCFixup &Fixup, const MCValue &,
650+
const MCSubtargetInfo *STI) {
650651
return Fixup.getKind() >= FirstLiteralRelocationKind;
651652
}
652653

‎llvm/test/CodeGen/RISCV/relax-per-target-feature.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@ declare dso_local i32 @ext(i32)
1111
; CHECK-NEXT: c.li a0, 31
1212
; CHECK-NEXT: auipc t1, 0
1313
; CHECK-NEXT: R_RISCV_CALL_PLT ext
14+
; CHECK-NEXT: R_RISCV_RELAX *ABS*
1415
; CHECK-NEXT: jalr zero, 0(t1)
1516
define dso_local i32 @f() #0 {
1617
entry:

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