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[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
This PR emits implements the ability to emit the PPC version for both assembly and object files on AIX.
1 parent f28e522 commit f31099c

27 files changed

+265
-53
lines changed

‎llvm/include/llvm/BinaryFormat/XCOFF.h

Lines changed: 28 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -333,10 +333,33 @@ enum CFileLangId : uint8_t {
333333
TB_CPLUSPLUS = 9 ///< C++ language.
334334
};
335335

336+
// XCOFF specific CPU IDs, defined in AIX OS header: `/usr/include/aouthdr.h`.
336337
enum CFileCpuId : uint8_t {
337-
TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
338-
TCPU_COM = 3, ///< POWER and PowerPC architecture common.
339-
TCPU_970 = 19 ///< PPC970 - PowerPC 64-bit architecture.
338+
TCPU_INVALID = 0, ///< Invalid id - assumes POWER for old objects.
339+
TCPU_PPC = 1, ///< PowerPC common architecture 32 bit mode.
340+
TCPU_PPC64 = 2, ///< PowerPC common architecture 64-bit mode.
341+
TCPU_COM = 3, ///< POWER and PowerPC architecture common.
342+
TCPU_PWR = 4, ///< POWER common architecture objects.
343+
TCPU_ANY = 5, ///< Mixture of any incompatable POWER
344+
///< and PowerPC architecture implementations.
345+
TCPU_601 = 6, ///< 601 implementation of PowerPC architecture.
346+
TCPU_603 = 7, ///< 603 implementation of PowerPC architecture.
347+
TCPU_604 = 8, ///< 604 implementation of PowerPC architecture.
348+
349+
// The following are PowerPC 64-bit architectures.
350+
TCPU_620 = 16,
351+
TCPU_A35 = 17,
352+
TCPU_PWR5 = 18,
353+
TCPU_970 = 19,
354+
TCPU_PWR6 = 20,
355+
TCPU_PWR5X = 22,
356+
TCPU_PWR6E = 23,
357+
TCPU_PWR7 = 24,
358+
TCPU_PWR8 = 25,
359+
TCPU_PWR9 = 26,
360+
TCPU_PWR10 = 27,
361+
362+
TCPU_PWRX = 224 ///< RS2 implementation of POWER architecture.
340363
};
341364

342365
enum SymbolAuxType : uint8_t {
@@ -350,6 +373,7 @@ enum SymbolAuxType : uint8_t {
350373

351374
StringRef getMappingClassString(XCOFF::StorageMappingClass SMC);
352375
StringRef getRelocationTypeString(XCOFF::RelocationType Type);
376+
StringRef getTCPUString(XCOFF::CFileCpuId TCPU);
353377
Expected<SmallString<32>> parseParmsType(uint32_t Value, unsigned FixedParmsNum,
354378
unsigned FloatingParmsNum);
355379
Expected<SmallString<32>> parseParmsTypeWithVecInfo(uint32_t Value,
@@ -468,6 +492,7 @@ enum ExtendedTBTableFlag : uint8_t {
468492

469493
StringRef getNameForTracebackTableLanguageId(TracebackTable::LanguageID LangId);
470494
SmallString<32> getExtendedTBTableFlagString(uint8_t Flag);
495+
XCOFF::CFileCpuId getCpuID(StringRef CPU);
471496

472497
struct CsectProperties {
473498
CsectProperties(StorageMappingClass SMC, SymbolType ST)

‎llvm/include/llvm/MC/MCXCOFFObjectWriter.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,11 +40,16 @@ class MCXCOFFObjectTargetWriter : public MCObjectTargetWriter {
4040
};
4141

4242
class XCOFFObjectWriter : public MCObjectWriter {
43+
// AIX specific CPU type.
44+
std::string CPUType;
45+
4346
public:
4447
virtual void addExceptionEntry(const MCSymbol *Symbol, const MCSymbol *Trap,
4548
unsigned LanguageCode, unsigned ReasonCode,
4649
unsigned FunctionSize, bool hasDebug) = 0;
4750
virtual void addCInfoSymEntry(StringRef Name, StringRef Metadata) = 0;
51+
StringRef getCPUType() const { return CPUType; }
52+
void setCPU(StringRef TargetCPU) { CPUType = TargetCPU; }
4853
};
4954

5055
std::unique_ptr<MCObjectWriter>

‎llvm/lib/BinaryFormat/XCOFF.cpp

Lines changed: 59 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,8 +9,10 @@
99
#include "llvm/BinaryFormat/XCOFF.h"
1010
#include "llvm/ADT/SmallString.h"
1111
#include "llvm/ADT/StringRef.h"
12+
#include "llvm/ADT/StringSwitch.h"
1213
#include "llvm/Support/Errc.h"
1314
#include "llvm/Support/Error.h"
15+
#include "llvm/TargetParser/PPCTargetParser.h"
1416

1517
using namespace llvm;
1618

@@ -107,6 +109,63 @@ StringRef XCOFF::getNameForTracebackTableLanguageId(
107109
}
108110
#undef LANG_CASE
109111

112+
XCOFF::CFileCpuId XCOFF::getCpuID(StringRef CPUName) {
113+
StringRef CPU = PPC::normalizeCPUName(CPUName);
114+
return StringSwitch<XCOFF::CFileCpuId>(CPU)
115+
.Cases("generic", "COM", XCOFF::TCPU_COM)
116+
.Case("601", XCOFF::TCPU_601)
117+
.Cases("602", "603", "603e", "603ev", XCOFF::TCPU_603)
118+
.Cases("604", "604e", XCOFF::TCPU_604)
119+
.Case("620", XCOFF::TCPU_620)
120+
.Case("970", XCOFF::TCPU_970)
121+
.Cases("a2", "g3", "g4", "g5", "e500", XCOFF::TCPU_COM)
122+
.Cases("pwr3", "pwr4", XCOFF::TCPU_COM)
123+
.Cases("pwr5", "PWR5", XCOFF::TCPU_PWR5)
124+
.Cases("pwr5x", "PWR5X", XCOFF::TCPU_PWR5X)
125+
.Cases("pwr6", "PWR6", XCOFF::TCPU_PWR6)
126+
.Cases("pwr6x", "PWR6E", XCOFF::TCPU_PWR6E)
127+
.Cases("pwr7", "PWR7", XCOFF::TCPU_PWR7)
128+
.Cases("pwr8", "PWR8", XCOFF::TCPU_PWR8)
129+
.Cases("pwr9", "PWR9", XCOFF::TCPU_PWR9)
130+
.Cases("pwr10", "PWR10", XCOFF::TCPU_PWR10)
131+
.Cases("ppc", "PPC", "ppc32", "ppc64", XCOFF::TCPU_COM)
132+
.Case("ppc64le", XCOFF::TCPU_PWR8)
133+
.Case("future", XCOFF::TCPU_PWR10)
134+
.Cases("any", "ANY", XCOFF::TCPU_ANY)
135+
.Default(XCOFF::TCPU_INVALID);
136+
}
137+
138+
#define TCPU_CASE(A) \
139+
case XCOFF::TCPU_##A: \
140+
return #A;
141+
StringRef XCOFF::getTCPUString(XCOFF::CFileCpuId TCPU) {
142+
switch (TCPU) {
143+
TCPU_CASE(INVALID)
144+
TCPU_CASE(PPC)
145+
TCPU_CASE(PPC64)
146+
TCPU_CASE(COM)
147+
TCPU_CASE(PWR)
148+
TCPU_CASE(ANY)
149+
TCPU_CASE(601)
150+
TCPU_CASE(603)
151+
TCPU_CASE(604)
152+
TCPU_CASE(620)
153+
TCPU_CASE(A35)
154+
TCPU_CASE(PWR5)
155+
TCPU_CASE(970)
156+
TCPU_CASE(PWR6)
157+
TCPU_CASE(PWR5X)
158+
TCPU_CASE(PWR6E)
159+
TCPU_CASE(PWR7)
160+
TCPU_CASE(PWR8)
161+
TCPU_CASE(PWR9)
162+
TCPU_CASE(PWR10)
163+
TCPU_CASE(PWRX)
164+
}
165+
return "INVALID";
166+
}
167+
#undef TCPU_CASE
168+
110169
Expected<SmallString<32>> XCOFF::parseParmsType(uint32_t Value,
111170
unsigned FixedParmsNum,
112171
unsigned FloatingParmsNum) {

‎llvm/lib/MC/XCOFFObjectWriter.cpp

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1180,11 +1180,8 @@ void XCOFFWriter::writeSymbolTable(MCAssembler &Asm) {
11801180
LangID = XCOFF::TB_Fortran;
11811181
else
11821182
LangID = XCOFF::TB_CPLUSPLUS;
1183-
uint8_t CpuID;
1184-
if (is64Bit())
1185-
CpuID = XCOFF::TCPU_PPC64;
1186-
else
1187-
CpuID = XCOFF::TCPU_COM;
1183+
1184+
uint8_t CpuID = XCOFF::getCpuID(getCPUType());
11881185

11891186
int NumberOfFileAuxEntries = 1;
11901187
if (!Vers.empty())

‎llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@
3737
#include "llvm/MC/MCSymbol.h"
3838
#include "llvm/MC/MCSymbolELF.h"
3939
#include "llvm/MC/MCSymbolXCOFF.h"
40+
#include "llvm/MC/MCXCOFFObjectWriter.h"
4041
#include "llvm/MC/TargetRegistry.h"
4142
#include "llvm/Support/Casting.h"
4243
#include "llvm/Support/ErrorHandling.h"
@@ -258,7 +259,11 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
258259
}
259260

260261
void emitMachine(StringRef CPU) override {
261-
OS << "\t.machine " << CPU << '\n';
262+
const Triple &TT = Streamer.getContext().getTargetTriple();
263+
if (TT.isOSBinFormatXCOFF())
264+
OS << "\t.machine\t" << '\"' << CPU << '\"' << '\n';
265+
else
266+
OS << "\t.machine " << CPU << '\n';
262267
}
263268

264269
void emitAbiVersion(int AbiVersion) override {
@@ -422,7 +427,8 @@ class PPCTargetXCOFFStreamer : public PPCTargetStreamer {
422427
}
423428

424429
void emitMachine(StringRef CPU) override {
425-
llvm_unreachable("Machine pseudo-ops are invalid for XCOFF.");
430+
static_cast<XCOFFObjectWriter &>(Streamer.getAssemblerPtr()->getWriter())
431+
.setCPU(CPU);
426432
}
427433

428434
void emitAbiVersion(int AbiVersion) override {

‎llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@
7171
#include "llvm/Support/Threading.h"
7272
#include "llvm/Support/raw_ostream.h"
7373
#include "llvm/Target/TargetMachine.h"
74+
#include "llvm/TargetParser/PPCTargetParser.h"
7475
#include "llvm/TargetParser/Triple.h"
7576
#include "llvm/Transforms/Utils/ModuleUtils.h"
7677
#include <cassert>
@@ -3046,6 +3047,30 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
30463047
bool PPCAIXAsmPrinter::doInitialization(Module &M) {
30473048
const bool Result = PPCAsmPrinter::doInitialization(M);
30483049

3050+
// Emit the .machine directive on AIX.
3051+
const Triple &Target = TM.getTargetTriple();
3052+
XCOFF::CFileCpuId TargetCpuId = XCOFF::TCPU_INVALID;
3053+
// Walk through the "target-cpu" attribute of functions and use the newest
3054+
// level as the CPU of the module.
3055+
for (auto &F : M) {
3056+
XCOFF::CFileCpuId FunCpuId =
3057+
XCOFF::getCpuID(TM.getSubtargetImpl(F)->getCPU());
3058+
if (FunCpuId > TargetCpuId)
3059+
TargetCpuId = FunCpuId;
3060+
}
3061+
// If there is no "target-cpu" attribute within the functions, take the
3062+
// "-mcpu" value. If both are omitted, use getNormalizedPPCTargetCPU() to
3063+
// determine the default CPU.
3064+
if (!TargetCpuId) {
3065+
StringRef TargetCPU = TM.getTargetCPU();
3066+
TargetCpuId = XCOFF::getCpuID(
3067+
TargetCPU.empty() ? PPC::getNormalizedPPCTargetCPU(Target) : TargetCPU);
3068+
}
3069+
3070+
PPCTargetStreamer *TS =
3071+
static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
3072+
TS->emitMachine(XCOFF::getTCPUString(TargetCpuId));
3073+
30493074
auto setCsectAlignment = [this](const GlobalObject *GO) {
30503075
// Declarations have 0 alignment which is set by default.
30513076
if (GO->isDeclarationForLinker())

‎llvm/test/CodeGen/PowerPC/aix-cpu-version-multifunction.ll

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
2+
3+
; For the .machine directive emitted on AIX, the "target-cpu" attribute that is
4+
; the newest will be used as the CPU for the module (in this case, PWR10).
5+
6+
; CHECK: .file "file.c"
7+
; CHECK-NEXT: .csect ..text..[PR],5
8+
; CHECK-NEXT: .rename ..text..[PR],""
9+
; CHECK-NEXT: .machine "PWR10"
10+
; CHECK-NOT: .machine "PWR8"
11+
12+
source_filename = "file.c"
13+
14+
define dso_local signext i32 @testFunc1() #0 {
15+
entry:
16+
%retval = alloca i32, align 4
17+
store i32 0, ptr %retval, align 4
18+
ret i32 0
19+
}
20+
21+
define dso_local signext i32 @testFunc2() #1 {
22+
entry:
23+
%retval = alloca i32, align 4
24+
store i32 0, ptr %retval, align 4
25+
ret i32 0
26+
}
27+
28+
attributes #0 = { "target-cpu" = "pwr8" }
29+
attributes #1 = { "target-cpu" = "pwr10" }
30+

‎llvm/test/CodeGen/PowerPC/aix-cpu-version.ll

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
2+
3+
; CHECK: .file "1.c"
4+
; CHECK-NEXT: .csect ..text..[PR],5
5+
; CHECK-NEXT: .rename ..text..[PR],""
6+
; CHECK-NEXT: .machine "PWR8"
7+
8+
source_filename = "1.c"
9+
10+
define dso_local signext i32 @main() #0 {
11+
entry:
12+
%retval = alloca i32, align 4
13+
store i32 0, ptr %retval, align 4
14+
ret i32 0
15+
}
16+
17+
attributes #0 = {"target-cpu"="pwr8"}

‎llvm/test/CodeGen/PowerPC/aix-extern-weak.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -68,8 +68,7 @@ declare extern_weak void @foo_ext_weak(ptr)
6868
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
6969
; CHECKSYM-NEXT: Section: N_DEBUG
7070
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
71-
; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
72-
; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
71+
; CHECKSYM-NEXT: CPU Version ID: TCPU_COM (0x3)
7372
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
7473
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
7574
; CHECKSYM: Symbol {

‎llvm/test/CodeGen/PowerPC/aix-extern.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,8 +91,7 @@ declare i32 @bar_extern(ptr)
9191
; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
9292
; CHECKSYM-NEXT: Section: N_DEBUG
9393
; CHECKSYM-NEXT: Source Language ID: TB_CPLUSPLUS (0x9)
94-
; CHECKSYM32-NEXT: CPU Version ID: TCPU_COM (0x3)
95-
; CHECKSYM64-NEXT: CPU Version ID: TCPU_PPC64 (0x2)
94+
; CHECKSYM-NEXT: CPU Version ID: TCPU_COM (0x3)
9695
; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
9796
; CHECKSYM-NEXT: NumberOfAuxEntries: 2
9897
; CHECKSYM: Symbol {

‎llvm/test/CodeGen/PowerPC/aix-filename-c.ll

Lines changed: 54 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,57 @@
1-
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
2-
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
3-
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
4-
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
1+
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr9 < %s | FileCheck --check-prefixes=ASM %s
2+
3+
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr9 -filetype=obj -o %t.o < %s
4+
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ32 %s
5+
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr9 -filetype=obj -o %t64.o < %s
6+
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ64 %s
57

68
source_filename = "1.c"
79

8-
; OBJ: Name: .file
9-
; OBJ: Source Language ID: TB_C (0x0)
10-
; OBJ32: CPU Version ID: TCPU_COM (0x3)
11-
; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
12-
; OBJ: Name: 1.c
10+
; ASM: .file "1.c",,"LLVM{{.*}}"
11+
; ASM-NEXT: .csect ..text..[PR],5
12+
; ASM-NEXT: .rename ..text..[PR],""
13+
; ASM-NEXT: .machine "PWR9"
14+
15+
; OBJ32: Symbol {
16+
; OBJ32-NEXT: Index: 0
17+
; OBJ32-NEXT: Name: .file
18+
; OBJ32-NEXT: Value (SymbolTableIndex): 0x0
19+
; OBJ32-NEXT: Section: N_DEBUG
20+
; OBJ32-NEXT: Source Language ID: TB_C (0x0)
21+
; OBJ32-NEXT: CPU Version ID: TCPU_PWR9 (0x1A)
22+
; OBJ32-NEXT: StorageClass: C_FILE (0x67)
23+
; OBJ32-NEXT: NumberOfAuxEntries: 2
24+
; OBJ32-NEXT: File Auxiliary Entry {
25+
; OBJ32-NEXT: Index: 1
26+
; OBJ32-NEXT: Name: 1.c
27+
; OBJ32-NEXT: Type: XFT_FN (0x0)
28+
; OBJ32-NEXT: }
29+
; OBJ32-NEXT: File Auxiliary Entry {
30+
; OBJ32-NEXT: Index: 2
31+
; OBJ32-NEXT: Name: LLVM
32+
; OBJ32-NEXT: Type: XFT_CV (0x2)
33+
; OBJ32-NEXT: }
34+
; OBJ32-NEXT: }
35+
36+
; OBJ64: Symbol {
37+
; OBJ64-NEXT: Index: 0
38+
; OBJ64-NEXT: Name: .file
39+
; OBJ64-NEXT: Value (SymbolTableIndex): 0x0
40+
; OBJ64-NEXT: Section: N_DEBUG
41+
; OBJ64-NEXT: Source Language ID: TB_C (0x0)
42+
; OBJ64-NEXT: CPU Version ID: TCPU_PWR9 (0x1A)
43+
; OBJ64-NEXT: StorageClass: C_FILE (0x67)
44+
; OBJ64-NEXT: NumberOfAuxEntries: 2
45+
; OBJ64-NEXT: File Auxiliary Entry {
46+
; OBJ64-NEXT: Index: 1
47+
; OBJ64-NEXT: Name: 1.c
48+
; OBJ64-NEXT: Type: XFT_FN (0x0)
49+
; OBJ64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
50+
; OBJ64-NEXT: }
51+
; OBJ64-NEXT: File Auxiliary Entry {
52+
; OBJ64-NEXT: Index: 2
53+
; OBJ64-NEXT: Name: LLVM
54+
; OBJ64-NEXT: Type: XFT_CV (0x2)
55+
; OBJ64-NEXT: Auxiliary Type: AUX_FILE (0xFC)
56+
; OBJ64-NEXT: }
57+
; OBJ64-NEXT: }

‎llvm/test/CodeGen/PowerPC/aix-filename-cpp.ll

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,11 @@
11
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
2-
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
2+
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ %s
33
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
4-
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
4+
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ %s
55

66
source_filename = "1.cpp"
77

88
; OBJ: Name: .file
99
; OBJ: Source Language ID: TB_CPLUSPLUS (0x9)
10-
; OBJ32: CPU Version ID: TCPU_COM (0x3)
11-
; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
10+
; OBJ: CPU Version ID: TCPU_PWR7 (0x18)
1211
; OBJ: Name: 1.cpp

‎llvm/test/CodeGen/PowerPC/aix-filename-f.ll

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,11 @@
11
; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
2-
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ,OBJ32 %s
2+
; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=OBJ %s
33
; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -filetype=obj -o %t64.o < %s
4-
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ,OBJ64 %s
4+
; RUN: llvm-readobj --symbols %t64.o | FileCheck --check-prefixes=OBJ %s
55

66
source_filename = "1.f95"
77

88
; OBJ: Name: .file
99
; OBJ: Source Language ID: TB_Fortran (0x1)
10-
; OBJ32: CPU Version ID: TCPU_COM (0x3)
11-
; OBJ64: CPU Version ID: TCPU_PPC64 (0x2)
10+
; OBJ: CPU Version ID: TCPU_PWR7 (0x18)
1211
; OBJ: Name: 1.f95

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