@@ -3143,6 +3143,44 @@ multiclass sve_fp_2op_u_zd<bits<3> opc, string asm, SDPatternOperator op> {
31433143 def : SVE_1_Op_Pat<nxv2f64, op, nxv2f64, !cast<Instruction>(NAME # _D)>;
31443144}
31453145
3146+ //===----------------------------------------------------------------------===//
3147+ // SVE Floating Point Unary Operations - Zeroing Predicate Group
3148+ //===----------------------------------------------------------------------===//
3149+
3150+ class sve_fp_z2op_p_zd<bits<7> opc,string asm, RegisterOperand i_zprtype,
3151+ RegisterOperand o_zprtype>
3152+ : I<(outs o_zprtype:$Zd), (ins PPR3bAny:$Pg, i_zprtype:$Zn),
3153+ asm, "\t$Zd, $Pg/z, $Zn",
3154+ "",
3155+ []>, Sched<[]> {
3156+ bits<3> Pg;
3157+ bits<5> Zd;
3158+ bits<5> Zn;
3159+ let Inst{31-24} = 0b01100100;
3160+ let Inst{23-22} = opc{6-5};
3161+ let Inst{21-19} = 0b011;
3162+ let Inst{18-16} = opc{4-2};
3163+ let Inst{15} = 0b1;
3164+ let Inst{14-13} = opc{1-0};
3165+ let Inst{12-10} = Pg;
3166+ let Inst{9-5} = Zn;
3167+ let Inst{4-0} = Zd;
3168+
3169+ let hasSideEffects = 0;
3170+ let mayRaiseFPException = 1;
3171+ }
3172+
3173+ multiclass sve_fp_z2op_p_zd_hsd<bits<5> opc, string asm> {
3174+ def _H : sve_fp_z2op_p_zd<{ 0b01, opc }, asm, ZPR16, ZPR16>;
3175+ def _S : sve_fp_z2op_p_zd<{ 0b10, opc }, asm, ZPR32, ZPR32>;
3176+ def _D : sve_fp_z2op_p_zd<{ 0b11, opc }, asm, ZPR64, ZPR64>;
3177+ }
3178+
3179+ multiclass sve_fp_z2op_p_zd_frint<bits<2> opc, string asm> {
3180+ def _S : sve_fp_z2op_p_zd<{ 0b0010, opc{1}, 0, opc{0} }, asm, ZPR32, ZPR32>;
3181+ def _D : sve_fp_z2op_p_zd<{ 0b0010, opc{1}, 1, opc{0} }, asm, ZPR64, ZPR64>;
3182+ }
3183+
31463184//===----------------------------------------------------------------------===//
31473185// SVE Integer Arithmetic - Binary Predicated Group
31483186//===----------------------------------------------------------------------===//
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