Implement the DeviceMemoryBarrierWithGroupSync HLSL Function

[farzonl]

• Implement DeviceMemoryBarrierWithGroupSync clang builtin,
• Link DeviceMemoryBarrierWithGroupSync clang builtin with hlsl_intrinsics.h
• Add sema checks for DeviceMemoryBarrierWithGroupSync to CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
• Add codegen for DeviceMemoryBarrierWithGroupSync to EmitHLSLBuiltinExpr in CGBuiltin.cpp
• Add codegen tests to clang/test/CodeGenHLSL/builtins/DeviceMemoryBarrierWithGroupSync.hlsl
• Add sema tests to clang/test/SemaHLSL/BuiltIns/DeviceMemoryBarrierWithGroupSync-errors.hlsl
• Create the int_dx_DeviceMemoryBarrierWithGroupSync intrinsic in IntrinsicsDirectX.td
• Create the DXILOpMapping of int_dx_DeviceMemoryBarrierWithGroupSync to 80 in DXIL.td
• Create the DeviceMemoryBarrierWithGroupSync.ll and DeviceMemoryBarrierWithGroupSync_errors.ll tests in llvm/test/CodeGen/DirectX/
• Create the int_spv_DeviceMemoryBarrierWithGroupSync intrinsic in IntrinsicsSPIRV.td
• In SPIRVInstructionSelector.cpp create the DeviceMemoryBarrierWithGroupSync lowering and map it to int_spv_DeviceMemoryBarrierWithGroupSync in SPIRVInstructionSelector::selectIntrinsic.
• Create SPIR-V backend test case in llvm/test/CodeGen/SPIRV/hlsl-intrinsics/DeviceMemoryBarrierWithGroupSync.ll

DirectX

DXIL Opcode	DXIL OpName	Shader Model	Shader Stages
80	Barrier	6.0	()

SPIR-V

OpControlBarrier:

Description:

Wait for all active invocations within the specified
Scope to reach the current point of execution.

All active invocations within Execution scope reach
this point of execution before any invocation proceeds beyond it.

When Execution is Workgroup or larger, behavior is undefined
unless all invocations within Execution execute the same dynamic
instance of this instruction.

If Semantics is not None, this instruction also serves as an
OpMemoryBarrier instruction, and also performs
and adheres to the description and semantics of an OpMemoryBarrier
instruction with the same Memory and Semantics operands. This allows
atomically specifying both a control barrier and a memory barrier (that
is, without needing two instructions). If Semantics is None,
Memory is ignored.

Before version 1.3, it is only valid to use this instruction with
TessellationControl, GLCompute, or Kernel execution
models. There is no such restriction starting with
version 1.3.

If used with the TessellationControl execution
model, it also implicitly synchronizes the Output
Storage Class: Writes to Output variables
performed by any invocation executed prior to a OpControlBarrier are
visible to any other invocation proceeding beyond that
OpControlBarrier.

Word Count	Opcode	Results	Operands
4	224	Scope <id> Execution	Scope <id> Memory	Memory Semantics <id> Semantics

Test Case(s)

Example 1

//dxc DeviceMemoryBarrierWithGroupSync_test.hlsl -T lib_6_8 -enable-16bit-types -O0

export void fn() {
    return DeviceMemoryBarrierWithGroupSync();
}

HLSL:

Blocks execution of all threads in a group until all device memory accesses have been completed and all threads in the group have reached this call.

Syntax

void DeviceMemoryBarrierWithGroupSync(void);

Parameters

This function has no parameters.

Return value

This function does not return a value.

Remarks

The behavior of calls to this function that are within diverging branches of a thread group are undefined.

Minimum Shader Model

This function is supported in the following shader models.

Shader Model	Supported
Shader Model 5 and higher shader models	yes

 

This function is supported in the following types of shaders:

Vertex	Hull	Domain	Geometry	Pixel	Compute
					x

 

See also

Intrinsic Functions

Shader Model 5